SU1151948A1 - Translazor from residual class system code to positional code - Google Patents

Abstract

THE RESET CLASS SYSTEM CODE CONVERTER INTO THE POSITION CODE containing the input register, the AND groups of the elements, the adder and the output register whose outputs are the outputs of the converter. informational inputs of which are connected to the inputs of the input register, characterized in that, in order to improve speed, the adder is modular in it and a decoder group and a coder group are entered, the encoder inputs are connected to the outputs of the corresponding decoder groups, whose inputs are connected to the outputs of the corresponding bit group The inputs of the input register, the outputs of each encoder group are connected to the first inputs of the elements AND of the corresponding group, the second inputs of which are connected to the corresponding inputs s modular adder. (L

Description

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00 I The invention relates to a computational technique and is intended to convert codes represented in the residual class system (SOC) into a positional binary code for interfacing the peripheral oeopy with a processor operating in the SUC. The purpose of the invention is to increase the speed of the converter. The drawing shows a block diagram of the proposed device, where as an example, the converter is divided into two fragments. The proposed device contains an input register 1, the outputs of which are connected to the inputs of the decoders 2 and 3, consisting of AND 4 elements, whose outputs are connected to the corresponding inputs of encoders 5 and b, and the outputs of the encoders through the elements 7 and 8 of the groups are connected to the corresponding inputs modular adder 9, the outputs of which are connected to the inputs of the output register 10. Information inputs No outputs J2 of the converter are connected to the inputs and outputs of the input and output registers. The control input 13 and 14 are connected to the inputs of the elements And groups 7 and 8. The proposed device uses the following principle of operation. . Let the SOC be given with the bases P, PJ, ..., PO. For a given SOK, the number A will be represented in the range O - P R. - 1, the residuals A (ci, cij, ..., 0 /) (1) We will represent the given SOC by two composite bases R. and, moreover, S / and so as the chosen JUICE always imposes a condition on your choice of {base x}, then they are represented only by the product, P, ..., P, and we introduce some restriction, putting P. ci Pj, Japrdaer, for JUICE from the base mi P P Pj this is achieved by the fact that P ,, - P, RgG, since P, P, .... P are mutually simple numbers, then (,) 1, i.e. 82 is also a number. Mutually simple. In this case, the number A will be represented in the new ROC by the residuals A (/ 5, ..., A2) AW ,, ,, ..., oif | ) (3) and, as is easy to see for the above example, / Lt (d, d), / 3 (dL, d) with D and 2 being in the O1 range of PI P - 1; o - To obtain the number A in the position code, you must perform the operation A /, B + / 32B2 - r „P (4) where B, Bj are the orthogonal bases for the new RNS, determined from the relations B of the EU (mod Pj); B, 1 (mod R.); Bj 0 (mod PIJ); B 2 l (nrod P ,,) and the values of B and Bj are constant for a specifically specified SOC; rn is the rank value of the number A. Thus, the process of converting a number from a SOC to a positional number system reduces the number of residuals, which is a number to a SOC, to two residues, which are subsequently converted into a positional number system using the method of orthogonal bases . Similarly, the partitioning of the system1 1 of the basis of the JUICE can be made on a larger number of groups. . | The proposed device works as follows. At the initial moment of time, the number A, represented by the residuals Vb ,,,. in the single-position code, the buses 11 are entered into the input register 1. The state of the output buses of the input register 1 is decrypted by the decoders 2 and 3. Moreover, the number of inputs of the AND 4 elements is determined by the number of bases included in this group. So, for example, for a reduced PRSH4ER with four bases with Р 3, Р «4, РЭ 5, РП 7, splitting into two groups can 4, - 3; 4 where the group of digits 0; 0 indicates that one input of the And 4 element of the decoder 2 is connected to the output zero bus of the input register C corresponding to p «3, and the second digit to the base d., Ra shows that the second input of the eleaE 4 is connected to the bus O of the input register 1, according to the basis of P4 7, the inputs of the element 4, decoder 2 are connected to the bus base P 3 and bus 1 of the base P4 7. The inputs of the other elements 4 and 4 of the decoder 2 and the decoder 3 are similarly connected. At the outputs of the decoder 2 and 3 codes in the ranges O - (P; - 1) are represented in one position onnogo code. These single-point codes are converted by the help of encoders 5 and 6 in. the binary code corresponding to the product of one-position codes at the outputs of the decoder 2 and 3 by the values of the coefficients of the orthogonal basis for the composite bases and P, P. So for the 4, P, 5, 3, Pr of the example P, the bases of Pi 7 for the composite

11519484

R Rc. 21, Pj. the coefficients of the orthogonal basis are B. 400, Bj 21, then the output of the encoder 5 represents the j result in the binary transform code

(400, / 3,) mod Р „

where / 3, is the remainder of the number on the composite base.

The output of the encoder is the result in the binary code of the transformation (21 / i) mod Г „, where / e is the remainder of the number on the composite base P, P, In this case, the output of elements 1 4 of the decoder 2 is not connected to any input encoder 5. The output element And 4 is connected to (400-1) mod 420 11001000, the inputs of the encoder 5. The output element A2. connected to (400 - 2) mod - 420 380., 10111000 encoder 5. Similarly, all the remaining outputs of the decoder 2 are connected in the same way. The inputs of the decoder 3. After a time longer than the duration of the transients in the decoders 2 and 3 and encoders 5 and 6, control input 13 is given a pulse, which opens a group of elements And 7 and thus an operand in binary code corresponding to the value (/ i, B) mod P is entered into the modular adder. After the first operand is written to the modular adder 9, the signal from input 13 is removed to: an enable signal is fed to input 14. This opens a group of elements AND 8 and the value (/ bjB) mod P is added to the content of modular adder 9. After the end of the summation, the result transferred to the output register 10, from which the output 12 is removed the result of the conversion. Thus, the conversion process in the proposed device is reduced to two conversion cycles.

Claims (1)

RESIDUAL CLASS SYSTEM CONVERTER TO POSITION CODE, containing an input register, groups of AND elements, an adder and an output register, the outputs of which are the outputs of the converter, the information inputs of which are connected to the inputs of the input register, characterized in that, c _z to improve performance, it the adder is modular and a group of decoders and a group of encoders are introduced into it, the inputs of the encoders are connected to the outputs of the respective decoders of the group, the inputs of which are connected to the outputs accordingly groups of bits of the input register, the outputs of each coder band are connected to first inputs of AND gates of the corresponding group, the second inputs of which are connected to respective inputs of a modular adder. SU.1151948> 51948