SU1116422A1 - Information input/output device - Google Patents

Abstract

An INPUT / OUTPUT INFORMATION DEVICE containing AND elements, an OR group, encoders, indicators, a group of counters, an AND element, an OR element, an address setting device, a switch and a keyboard, an address setting device and a switch, are input and output inputs and outputs. The device ;, va, respectively, the installation inputs the account of the ad groups are the input RESET of the device, the outputs through the encoders are connected to the inputs of the indicators, characterized in that. that, in order to simplify the device, it contains counters, the first and second triggers, the non-inverting output of the first trigger and the installation input to the unit of the second trigger U AIBLEOTCIL are informational output and the device start input, respectively, the output of the element OR is connected to the first inputs of the AND elements of the group , the second input of one of which and the first input of the AND element are the first clock input of the device, the first inputs of the OR elements of the group are connected to the keyboard outputs, the input of which is the second clock input One device that inverts the output of the first trigger is connected to the third input of one of the AND group elements, the outputs of the AND group elements are connected to the inputs of the OR elements, the outputs of which are connected to the counting counting inputs (O. kov group, the output of one of which is connected to the installation input into the unit of the first trigger, and the outputs of the others with the inputs of other elements of the group, noninversion of the output of the second trigger connected to the second inputs of the elements I and CM, the inverting output to the input of setting the zero of the first trigger And is connected to a counting input, a counter, the installation input of which is the device RESET input, and the overflow code is connected to the installation input to the second trigger flush.

Description

The invention relates to computing technology, in particular, to input-output devices of source data to digital and digital-analogue acquisitions. An input and output information device is known, comprising a control panel, registers, bit switches, code converters, auxiliary logic elements whether inverters, delay lines, etc., which provide data input from punched tapes or punched cards, as well as information output to media (punched cards or punched tapes) .1 However, this device requires Routing information on punched tapes or punched cards or using special devices for reading information from punched cards or punched tapes, which is constructively difficult. The closest in technical essence to the invention is a device for inputting output information that is prototyped and containing elements And groups , elements of the group, encoders, indicators, group counters, an AND element, an OR element, an address setting device, a switch, and a keyboard with their connections. Information input from the control panel is carried out in decimal form, which is then converted into binary-decimal form with the help of the encoder, and through the assemblies, divided into two streams, simultaneously arrives. into the arithmetic unit, and through the coincidence schemes (AND schemes) and assembly schemes (OR schemes) to the input of the Indination register 21. The device’s drawback is its complexity. The purpose of the invention is to simplify the arrangement. : This goal is achieved by the fact that the device for inputting information contains elements AND groups, elements OR groups, encoder indicators, group counters, AND element, OR element, address setting device, switch and keyboard, address setting outputs and switch are address outputs and outputs Input and. B. output device respectively, the installation inputs of the group counters are the input; The device reset, the outputs through the ciphers are connected to the indicator inputs, the counter is entered, the first and second triggers are non-inverted (the first output of the first trigger and the installation input of the second trigger are information output and input The input of the device, respectively, the output of the OR element is connected to the first the inputs of the AND elements of the group, the second input of one of which and the first input of the AND element are the first clock input of the device, the first inputs of the OR elements of the group are connected to the keyboard outputs, the input of which is The first clock input of the device, the inverting output of the first trigger, is connected to the third input of one of the elements AND groups, the outputs of the elements AND groups are connected to the inputs of the elements OR groups, the outputs of which are connected to the counting inputs of the group counters, the output of one of which is connected trigger, and the outputs of others - with the inputs of other elements of the AND group, the non-inverting output of the second trigger is connected to the second inputs of the AND and OR elements, the inverting output to the input of setting the first trigger, the output of the AND element is connected to the counting input of the counter, the installation input of which is the Device Reset input, and the overflow output - to the input of setting the second trigger to zero. I Figure 1 shows a diagram of the proposed device; figure 2 - diagram of the transmitter; on fig.Z - timing diagrams. The device includes a calculator 1, an arithmetic unit 2, a storage unit 3, a control unit A, a control panel 5, an address setting device 6, a switch 7, keys 8-10, a second trigger 11, element 12, an element OR 13, a counter 14, the first trigger 15, elements AND 16-18 groups, elements OR 19-21 groups, binary decade 22-24, counters 25-27 groups, encoders 28-30, indicators 31-33, inputs and outputs 34-47 calculator blocks, 48 clock pulse generator frequency divider 49, 50 command counter, 51 decoder of the arithmetic operation type, 52 overhead operations decoder and d Encoder 53 address selection signals.

In FIG. 3, 5A is the dial frequency signal G- (output 44 of the control unit 4) 55 is the time for key 8 to turn on when the low-order digit of the input number is dialed; 56 - signal at the 2nd input of the element OR 19J 57 - time to press the key 10 when dialing the highest bit of the input number J 58 - signal at the 2nd input of the element OR 21J 59 - FT signal frequency (output 42 of the control unit 4); 60 signal of the beginning of the operation of the calculator 1 at the output of the counter 50 commands,

61-signal Input with switch

7 (input 46 on control unit 4;

62- input start command (output 43 of control unit 4) 5 63 —signal Input to the single output of the trigger 11; 64 - counter output 27 of the last decade; 65 - time interval, proportional to the value of the input number on a single trigger output

15 (input 38 of the arithmetic unit 2) 66 - signal Output from the switch 7 of the control console 5 (input 47 of the control unit 4), 67 - reset signal for the counters 25-27 and counter 14 (output 41 of the control unit 4), 68 - time intervals , propodionalnyh values of the output number

(output 35 of arithmetic unit 2), i,.

 The device works in modes

input and output information.

In the mode of input of information by the operator, the device operates as follows.

On the remote control 5 of the control unit (Fig. 1), with the help of the address setting unit 6, the cell address of the storage unit 3 is set into which information is to be entered. The control unit 4 at output 44 continuously generates a signal with a set frequency P, (FIG. 3, diagram 54), which is fed to keys 8-W. When the operator closes one of the keys, for example 8, (fig.Z, diagram 55), the signal P „goes through the element OR 19 to the input of the counter 25 (fig.Z, diagram 56).

When a predetermined digit appears on the indicator 31, the operator opens the {r key 8, and the signals k at the input of the counter 25 are stopped. In this case (fig. 3, diagrams 55 and 56), the chip of the frequency of the frequency Rc passed to the input of the counter 25 ,. The rest of the digitized A number is also set for decades 23 and 24

(FIG. 3, diagrams 57 and 58 for decade 23). Thus, by the end of the dialing, the numbers 25-27 will appear in the recorded numbers, displayed on the indicators 31-33.

When the operator sets the switch 7 to the Input position (Fig. 3, chart 61), the Signal input signal arrives at input 46 of control unit 4 (in FIG. 2, a service operations decoder 52). According to this signal, the control unit 4 at the operation time of the calculator 1 determined by the program generates an input cycle command (FIG. 3, diagram 62) and outputs it from output 43 to the single trigger input 11, setting it to state 1 (FIG. 3, diagram 63 ). The signal from the zero output of the trigger 11 removes the reset from the zero input of the trigger 15, allowing it to be set to state 1. The signal from the single output of the trigger 11 (Fig. 3, diagram 63) opens and opens element I 12. for passing the clock frequency FJ from the output 42 of the control unit 4 to the input of the counter 14, as well as through the element OR 13 opens the elements AND of group 16-18, combining the counters 25-27 into a single P-decade counter. In this case, the element AND 16 is opened by a signal from the zero output of the trigger 15 for passing the clock frequency T to the input of the counters 25-27.

The output signal of the counter 14 is supplied to the zero input of the trigger 11 and sets it to the state O (FIG. 3, diagram 63). The signal from the single output of the trigger 11 closes the element OR 13, which closes the elements AND 16-18, and from the zero code sets the zero status trigger 15. From the moment the signal starts Entering (FIG. 3), the clock frequency starts arrive through the open element AND 16 at the input of the counters 25-27. As was said before, in the counters 25.26 and 27, by the time the input began, the binary-decimal code of the input number A. The total capacity of the counters 25-27 is 10 (in our case with P 3, A c 1000).

Consequently, to completely fill the counters 25-27, the number of itch pulses of the clock frequency T m 5 equal to Aj, which is defined by the expression: Aj A, - A ,,, must be sent to their inputs through element 16. (1) where A is the number of pulses of the input number, Af, is the total capacity of counters A. is the number of pulses recorded to completely fill the counter. And the pulses will go to the counter 25-27 during the time T, defined by the expression: Ta A. where Tj is the filling time of the counters 25-27, A, the number of pulses recorded for (FULLY filled counters 25-27 period of the clock frequency After filling the counters 25-27 in the last decade 24 code, over time Tj, an overflow signal is generated (Fig. 3, diagram 64), which arrives at the single input of the trigger 15 and sets it to state 1. The signal from the zero output of the trigger 15 will close the AND element 16, and the passage of the clock frequency P, to the input of the counters 25-27 will stop Thus, after time Tj, a zero code appears in the meter indicating the number has been entered. The signal from the single output of trigger 15 arrives at the input 38 of the arithmetic unit 2 and ends at the end of the input signal. The duration of the time interval (Fig. 3, diagram 65) is determined by the ratio, -m, b - T (3) values from (2) Substituting we get T e7 - (. (Consequently, the duration of the time interval arriving, -signal of the trigger output 15h in the arithmetic unit 2 is proportional to the value of the input number A. In the arithmetic The time interval is converted at the appropriate scale into a binary code and according to the commands of the control unit 4 (outputs 39 and 40 of the decoder 52 of the service 2 operations shown in FIG. 2) is recorded in the cell of the storage unit 3 whose address is determined by the setter 6. In the output mode Information device operates as follows. The operator sets on the control panel 5 (Fig. 1) using the address setting unit 6, the cell address of the storage unit 3, from which information is to be output, and switch 7 is set to the Output position. In this case, the Output signal (Fig., .3, Chart 66) is fed to the input 47 of the control unit 4, which (Fig. 2) is fed to the input of the decoder 52 overhead operations. The signal Output unit 4 controls on code 41 (FIG. 1) during the time allotted by the work program of calculator 1 in the information output mode, generates a Reset signal (FIG. 3, diagram 67), which is fed to the reset inputs of counters 14.25-27 , 1 When the counter 14 is reset, the signal from its output sets the trigger 11 to the zero state, while the signal from the zero output of the trigger 11 sets the trigger 15 to the zero state. The signal from the zero output of the trigger 15 prepares the element And 16 to work in the mode of information output. At the same time, the storage unit 3, according to the commands of the control unit 4, provides information from a cell whose address is selected on the address setting unit 6. control panel 5. The information from the storage unit 3 enters the arithmetic unit 2, where the duration of which is transformed into a time interval is proportional to the value of the output number (in FIG. 3, chart 68). The duration of the time interval. T is formed in the arithmetic unit 2 by the time of writing down to zero the output number recorded in the buffer register of block 2. Tgya signal (the time interval for output 35 of the arithmetic unit 2 goes to the input of the element OR 13 and then to the inputs of the elements OR 13 and further the inputs of the elements And 16, 17 and 18, while the element And 16 is prepared for the time of the Translator to pass the input frequency counters 25-27 of the clock frequency ivf, and the open elements And 17 and 18 for the time the outputs of the information 71 of the nation () form single counter 25-27. Thus, the number of pulses will go to the input of counters 25-27 The clock frequency is corresponding to the output number, and is defined by the expression: The state of each counter 25-27 is decrypted by encoders 28-30 and 228 is led to indicators 31-33 to indicate the output number in decimal form. Introduction of the binary counter and triggers , logical chains, alternating with binary-decimal decades, as well as fundamentally new connections with the elements of the device, greatly simplified the proposed device in comparison with the known.

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Claims (1)

INFORMATION I / O DEVICE containing a group of AND elements, a group of OR elements, encoders, indicators, a group of counters, an AND element, an OR element, an address dial, a switch and a keyboard, the outputs of an address dial and a switch are address inputs and outputs of Input and Output Devices , wa respectively, the inputs of the installation of the group counters are the input RESET device, the outputs through the encoders are connected to the inputs of the indicators, characterized in that. what. in order to simplify the device, it contains counters, the first and second triggers, the non-inverting output of the first trigger and the installation input to the unit of the second trigger are information output and input The beginning of the device input, respectively, the output of the OR element is connected to the first inputs of the elements AND groups, the second input of one of of which the first input of the AND element is the first clock input of the device, the first inputs of the elements OR groups are connected to the outputs of the keyboard, the input of which is the second clock input of the device, invert The output of the first trigger is connected to the third input of one of the elements of the AND group, the outputs of the elements and groups are connected to the inputs _{from the} elements of the OR group, the outputs of which ® are connected to the counting inputs of the counters of the group, the output of one of which is connected to the unit input in the unit of the first trigger and the outputs of others with the inputs of other elements of the AND group, the non-inverting output of the second trigger is connected to the second inputs of the elements AND and OR, the inverting output is to the input of the first trigger to zero, the output of the element And is connected to the counting input th. counter, the installation input of which is the RESET device input, and the overflow output - with the installation input at zero of the second trigger. SU ,, „1116422>