SG96266A1 - Method of fabricating a poly-poly capacitor with a sige bicmos integration scheme - Google Patents

Method of fabricating a poly-poly capacitor with a sige bicmos integration scheme

Info

Publication number
SG96266A1
SG96266A1 SG200107801A SG200107801A SG96266A1 SG 96266 A1 SG96266 A1 SG 96266A1 SG 200107801 A SG200107801 A SG 200107801A SG 200107801 A SG200107801 A SG 200107801A SG 96266 A1 SG96266 A1 SG 96266A1
Authority
SG
Singapore
Prior art keywords
poly
fabricating
capacitor
integration scheme
sige bicmos
Prior art date
Application number
SG200107801A
Other languages
English (en)
Inventor
Duane Coolbaugh Douglas
Stuart Dunn James
Arthur St Onge Stephen
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of SG96266A1 publication Critical patent/SG96266A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors

Landscapes

  • Power Engineering (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Control Of Electrical Variables (AREA)
  • Networks Using Active Elements (AREA)
SG200107801A 2000-12-21 2001-12-13 Method of fabricating a poly-poly capacitor with a sige bicmos integration scheme SG96266A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/745,361 US6440811B1 (en) 2000-12-21 2000-12-21 Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme

Publications (1)

Publication Number Publication Date
SG96266A1 true SG96266A1 (en) 2003-05-23

Family

ID=24996373

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200107801A SG96266A1 (en) 2000-12-21 2001-12-13 Method of fabricating a poly-poly capacitor with a sige bicmos integration scheme

Country Status (8)

Country Link
US (1) US6440811B1 (ja)
EP (1) EP1225628B1 (ja)
JP (1) JP3782962B2 (ja)
KR (1) KR100407538B1 (ja)
AT (1) ATE331299T1 (ja)
DE (1) DE60120897T2 (ja)
SG (1) SG96266A1 (ja)
TW (1) TW543155B (ja)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6426265B1 (en) * 2001-01-30 2002-07-30 International Business Machines Corporation Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology
US6911964B2 (en) * 2002-11-07 2005-06-28 Duke University Frame buffer pixel circuit for liquid crystal display
JP4789421B2 (ja) * 2003-03-12 2011-10-12 三星電子株式会社 フォトン吸収膜を有する半導体素子及びその製造方法
TWI233689B (en) * 2003-04-14 2005-06-01 Samsung Electronics Co Ltd Capacitors of semiconductor devices including silicon-germanium and metallic electrodes and methods of fabricating the same
KR100618869B1 (ko) * 2004-10-22 2006-09-13 삼성전자주식회사 커패시터를 포함하는 반도체 소자 및 그 제조방법
KR100617057B1 (ko) * 2004-12-30 2006-08-30 동부일렉트로닉스 주식회사 커패시터 구조 및 그 제조방법
KR100634241B1 (ko) * 2005-05-30 2006-10-13 삼성전자주식회사 반도체 커패시터 및 그 제조 방법
KR100731087B1 (ko) * 2005-10-28 2007-06-22 동부일렉트로닉스 주식회사 바이씨모스 소자 및 그의 제조방법
US11355617B2 (en) * 2019-10-01 2022-06-07 Qualcomm Incorporated Self-aligned collector heterojunction bipolar transistor (HBT)

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5823470A (ja) * 1981-08-06 1983-02-12 Oki Electric Ind Co Ltd 半導体装置
US4914546A (en) * 1989-02-03 1990-04-03 Micrel Incorporated Stacked multi-polysilicon layer capacitor
US5195017A (en) 1989-12-13 1993-03-16 Texas Instruments Incorporated Method for forming a polysilicon to polysilicon capacitor and apparatus formed therefrom
US5104822A (en) * 1990-07-30 1992-04-14 Ramtron Corporation Method for creating self-aligned, non-patterned contact areas and stacked capacitors using the method
WO1992014262A1 (en) 1991-02-01 1992-08-20 Sierra Semiconductor Corporation Semiconductor structure and method for making same
US5130885A (en) * 1991-07-10 1992-07-14 Micron Technology, Inc. Dram cell in which a silicon-germanium alloy layer having a rough surface morphology is utilized for a capacitive surface
JP2630874B2 (ja) * 1991-07-29 1997-07-16 三洋電機株式会社 半導体集積回路の製造方法
US5173437A (en) 1991-08-01 1992-12-22 Chartered Semiconductor Manufacturing Pte Ltd Double polysilicon capacitor formation compatable with submicron processing
US5286991A (en) 1992-08-26 1994-02-15 Pioneer Semiconductor Corporation Capacitor for a BiCMOS device
JP2616569B2 (ja) 1994-09-29 1997-06-04 日本電気株式会社 半導体集積回路装置の製造方法
JP2621821B2 (ja) 1995-03-06 1997-06-18 日本電気株式会社 半導体記憶装置の容量素子の製造方法
FR2756103B1 (fr) * 1996-11-19 1999-05-14 Sgs Thomson Microelectronics Fabrication de circuits integres bipolaires/cmos et d'un condensateur
JP2953425B2 (ja) * 1997-03-31 1999-09-27 日本電気株式会社 半導体装置の製造方法
US5939753A (en) 1997-04-02 1999-08-17 Motorola, Inc. Monolithic RF mixed signal IC with power amplification
CN1112731C (zh) 1997-04-30 2003-06-25 三星电子株式会社 制造用于模拟功能的电容器的方法
US5930635A (en) * 1997-05-02 1999-07-27 National Semiconductor Corporation Complementary Si/SiGe heterojunction bipolar technology
US6150706A (en) * 1998-02-27 2000-11-21 Micron Technology, Inc. Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer
US6218315B1 (en) * 2000-02-24 2001-04-17 International Business Machines Corporation HTO (high temperature oxide) deposition for capacitor dielectrics
US6507063B2 (en) * 2000-04-17 2003-01-14 International Business Machines Corporation Poly-poly/MOS capacitor having a gate encapsulating first electrode layer

Also Published As

Publication number Publication date
DE60120897T2 (de) 2006-12-21
DE60120897D1 (de) 2006-08-03
JP2002237541A (ja) 2002-08-23
ATE331299T1 (de) 2006-07-15
EP1225628A2 (en) 2002-07-24
TW543155B (en) 2003-07-21
US6440811B1 (en) 2002-08-27
KR20020050702A (ko) 2002-06-27
KR100407538B1 (ko) 2003-11-28
JP3782962B2 (ja) 2006-06-07
EP1225628B1 (en) 2006-06-21
EP1225628A3 (en) 2004-11-10

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