SG48716A1 - Plastic-molded-type hollow semiconductor device and process for manufacturing same - Google Patents

Plastic-molded-type hollow semiconductor device and process for manufacturing same

Info

Publication number
SG48716A1
SG48716A1 SG1996000408A SG1996000408A SG48716A1 SG 48716 A1 SG48716 A1 SG 48716A1 SG 1996000408 A SG1996000408 A SG 1996000408A SG 1996000408 A SG1996000408 A SG 1996000408A SG 48716 A1 SG48716 A1 SG 48716A1
Authority
SG
Singapore
Prior art keywords
molded
plastic
semiconductor device
manufacturing same
type hollow
Prior art date
Application number
SG1996000408A
Other languages
English (en)
Inventor
Namiki Moriga
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of SG48716A1 publication Critical patent/SG48716A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
SG1996000408A 1992-12-18 1993-12-17 Plastic-molded-type hollow semiconductor device and process for manufacturing same SG48716A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33905392A JP3192507B2 (ja) 1992-12-18 1992-12-18 樹脂シール中空型半導体装置の製造方法

Publications (1)

Publication Number Publication Date
SG48716A1 true SG48716A1 (en) 1998-05-18

Family

ID=18323815

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996000408A SG48716A1 (en) 1992-12-18 1993-12-17 Plastic-molded-type hollow semiconductor device and process for manufacturing same

Country Status (6)

Country Link
US (1) US5977628A (ko)
EP (1) EP0602662B1 (ko)
JP (1) JP3192507B2 (ko)
KR (1) KR0133970B1 (ko)
DE (1) DE69317373T2 (ko)
SG (1) SG48716A1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI261350B (en) * 2005-09-02 2006-09-01 Wintek Corp Electronic member with conductive connection structure
JP2009143234A (ja) * 2008-12-24 2009-07-02 Nippon Mining & Metals Co Ltd キャリア付金属箔
CN103262235A (zh) * 2010-12-16 2013-08-21 株式会社村田制作所 电子部件的制造方法
US8906747B2 (en) * 2012-05-23 2014-12-09 Freescale Semiconductor, Inc. Cavity-type semiconductor package and method of packaging same
JP5358724B1 (ja) 2012-06-28 2013-12-04 太陽誘電株式会社 弾性波デバイス内蔵モジュール及び通信装置
JP6106404B2 (ja) 2012-10-30 2017-03-29 太陽誘電株式会社 電子部品モジュール
JP7200114B2 (ja) * 2017-09-25 2023-01-06 ソニーセミコンダクタソリューションズ株式会社 半導体装置
WO2022270633A1 (ja) * 2021-06-24 2022-12-29 京セラ株式会社 非接触通信媒体

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1081411A (en) * 1975-12-24 1980-07-15 Philipp W.H. Schuessler Method for hermetically sealing an electronic circuit package
JPS6221254A (ja) * 1985-07-22 1987-01-29 Akita Denshi Kk 電子装置
JPS6237949A (ja) * 1985-08-12 1987-02-18 Matsushita Electronics Corp 電子部品塔載用パツケ−ジ
JPS6384051A (ja) * 1986-09-26 1988-04-14 Matsushita Electronics Corp 半導体装置の製造方法
JPH02185058A (ja) * 1989-01-12 1990-07-19 Mitsubishi Electric Corp 樹脂シール中空パツケージのシール方法
JP2503685B2 (ja) * 1989-10-23 1996-06-05 日本電気株式会社 ヒ―トシンク付半導体装置
JPH03145746A (ja) * 1989-10-31 1991-06-20 Toshiba Corp 中空パッケージ
US5064968A (en) * 1990-01-16 1991-11-12 Hughes Aircraft Company Domed lid for integrated circuit package
US5081327A (en) * 1990-03-28 1992-01-14 Cabot Corporation Sealing system for hermetic microchip packages
ATE186795T1 (de) * 1990-07-21 1999-12-15 Mitsui Chemicals Inc Halbleiteranordnung mit einer packung
EP0472866A3 (en) * 1990-07-23 1994-09-07 Nat Semiconductor Corp Ferroelectric device packaging techniques

Also Published As

Publication number Publication date
EP0602662A1 (en) 1994-06-22
US5977628A (en) 1999-11-02
EP0602662B1 (en) 1998-03-11
KR0133970B1 (ko) 1998-04-18
DE69317373D1 (de) 1998-04-16
DE69317373T2 (de) 1998-07-16
JP3192507B2 (ja) 2001-07-30
KR940016700A (ko) 1994-07-23
JPH06188326A (ja) 1994-07-08

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