SG191306A1

SG191306A1 - Test system and package holder

Info

Publication number: SG191306A1
Application number: SG2013048301A
Authority: SG
Inventors: Kohei Hironaka
Original assignee: Nhk Spring Co Ltd
Priority date: 2010-12-22
Filing date: 2011-12-20
Publication date: 2013-08-30
Also published as: WO2012086653A1; TWI460445B; SG10201510500XA; JPWO2012086653A1; TW201237440A; JP6039425B2

Abstract

TEST SYSTEM AND PACKAGE HOLDER5 A test system includes a tray (10) having a pluralityof holder holes (11) for holding semiconductor packages (20) serving as test objects, contact probes connected toelectrodes of the semiconductor packages (20), a probe holder for holding the contact probes, and a positioning10 unit that is arranged on the probe holder and sets positions of the semiconductor packages (20) with respectto the holder holes (11) when a test is performed, and therefore, it is possible to shorten the time needed totest singulated test objects, with a simple structure.15Fig. 1

Description

DESCRIPTION

TEST SYSTEM AND PACKAGE HOLDER

Field

[0001] The present invention relates to a test system and a package holder used to connect electronic circuit substrates.

Background

[0002] Conventionally, in a test system that performs a continuity state test or an operating characteristics test on a test object, such as a semiconductor package for encapsulating a semiconductor integrated circuit or a liquid crystal panel, a probe unit accommodating a plurality of conductive contact probes is used to establish an electrical connection between the test object and a signal processing apparatus that outputs a test signal.

Regarding the probe unit, with the progress of high integration and miniaturization of a semiconductor integrated circuit and a liquid crystal panel in recent years, a technology has been developed that can be adapted to a high-integrated and miniaturized test object by reducing a pitch between the contact probe.

[0003] Meanwhile, in the continuity state test and the operating characteristics test on the test object, there is a demand to shorten the time needed for the tests.

Manufacturers of the test object perform a test by bringing a plurality of semiconductor packages and a plurality of contact probes into contact with one another in order to shorten a test time.

[0004] Conventionally, a substrate test has been performed, in which a plurality of substrates are simultaneously tested while the substrates are connected to a package-carrier connected body without being singulated (see, for example, Patent Literature 1). By causing a substrate test apparatus to simultaneously test a plurality of substrates, the time needed for the test can be shortened. After the substrates are tested, each of the substrates is separated from the package-carrier connected body by a pressing machine.

[0005] On the other hand, as a method for testing singulated substrates, Patent Literature 2 discloses a component test method, in which each of substrates placed in a recess of a tray is moved by causing sliding movement due to instant movement, inertial movement by vibration, or inclination in order to set the positions of the substrates with respect to the recesses, and thereafter, the substrates are tested. Patent Literature 3 discloses a substrate jig board, in which a plurality of connected pressing members press the corners of a plurality of substrates placed at openings in order to set the positions of the substrates. Patent Literature 4 discloses a substrate test method, in which the priorities for nets and wiring patterns of circuit substrates are determined and the circuit substrates are sequentially tested so that the test time of the circuit substrates can be shortened.

Citation List

Patent Literature

[0006] Patent Literature 1: Japanese Patent Application

Laid-open No. 11-23646

Patent Literature 2: Japanese Patent Application Laid- open No. 2007-3326

Patent Literature 3: Japanese Patent Application Laid- open No. 2008-101959

Patent Literature 4: Japanese Patent Application Laid- open No. 2008-28140¢6

Summary Technical Problem

[0007] However, in the substrate test apparatus disclosed in Patent Literature 1, only substrates using a package-carrier connected body can be tested. Therefore, to test singulated substrates (semiconductor packages), it is necessary to sequentially test the substrates or to place the substrates at respective predetermined positions on a tray. Therefore, there is a problem in that the time needed for the test increases.

[0008] In addition, in the component test method disclosed in Patent Literature 2 and the substrate jig board disclosed in Patent Literature 3, while it is possible to set the positions of a plurality of substrates and test the substrates simultaneously, there is a problem in that a structure of the apparatus becomes complicated.

In the substrate test method disclosed in Patent Literature 4, while the test time needed for one substrate can be shortened, there is a problem in that the time needed for the overall test increases because the substrates are tested individually.

[0009] The present invention has been made in view of the above circumstances, and an object thereof is to provide a test system and a package holder capable of shorten the time needed for a test of singulated test objects, with a simple structure.

Solution to Problem

[0010] To solve the problem described above and achieve the object, a test system according to the present invention includes: a tray having a plurality of holder holes for holding packages serving as test objects; contact probes that are connected to electrodes of the packages when a test is performed; a probe holder for holding the contact probes; a positioning unit that is arranged on the probe holder and sets positions of the packages with respect to the holder holes when the test is performed.

[0011] Moreover, the test system according to the invention described above further includes a cover that covers an upper surface of the tray, that includes openings to expose the electrodes of the packages, and that comes into contact with at least a part of the packages held by the tray.

[0012] Moreover, in the the test system according to the invention described above, the positioning unit includes a plurality of pins whose ends have tapered shapes extending from the probe holder in a direction perpendicular to a principal surface of the probe holder, the tray has insertion holes in which the ends of the pins are insertable, and the pins come into contact with an outer edge of each of the packages to move the package to a predetermined position when the test is performed.

[0013] Moerover, in the the test system according to the invention described above, the pins are movable back and force in a direction perpendicular to the principal surface of the probe holder.

[0014] Moerover, in the the test system according to the invention described above, the positioning unit is a plate spring that comes into contact with a principal surface of each of the packages to move the package to a predetermined position of each of the holder holes when the test is performed, and the plate spring protrudes from the principal surface of the probe holder so as to extend in an oblique direction toward the predetermined position.

[0015] Moreover, a package holder according to the present invention includes: a tray having a plurality of holder holes for holding packages serving as test objects; and a cover that covers an upper surface of the tray, that includes openings for exposing electrodes of the packages,

and that comes into contact with at least a part of the packages held by the tray.

Advantageous Effects of Invention

[0016] In a test system and a package holder according 5 to the present invention, a positioning means for setting the positions of packages serving as test objects is provided on a probe unit side, and the tray and the probe unit are brought close to each other so that it becomes possible to set the packages serving as the test object held by the tray, and at the same time, establish a connection between the contact probes and electrodes of the packages serving as the test objects. Therefore, it becomes possible to shorten the time needed for the test of singulated test objects, with a simple structure.

Brief Description of Drawings

[0017] FIG. 1 is a perspective view illustrating a configuration of a test system according to a first embodiment of the present invention.

FIG. 2 is an exploded perspective view illustrating the configuration of the test system according to the first embodiment of the present invention.

FIG. 3 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 1 and 2.

FIG. 4 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 1 and 2.

FIG. 5 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 1 and 2.

FIG. 6 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 1 and 2.

FIG. 7 is a partial cross-sectional view illustrating a configuration of a main part of the test system according to the first embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating a configuration of a main part of the test system according to the first embodiment of the present invention.

FIG. 9 is a cross-sectional view illustrating a configuration of a main part of the test system according to the first embodiment of the present invention.

FIG. 10 is a partial cross-sectional view illustrating other configurations of a main part of the test system according to the first embodiment of the present invention.

FIG. 11 is a perspective view illustrating a configuration of a test system according to a second embodiment of the present invention.

FIG. 12 is an exploded perspective view illustrating the configuration of the test system according to the second embodiment of the present invention.

FIG. 13 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 11 and 12.

FIG. 14 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 11 and 12.

FIG. 15 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 11 and 12.

FIG. 16 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 11 and 12.

FIG. 17 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 11 and 12.

FIG. 18 is a perspective view illustrating a configuration of a main part of the test system illustrated in FIGS. 11 and 12.

FIG. 19 is a partial cross-sectional view illustrating a configuration of a main part of the test system according to the second embodiment of the present invention.

FIG. 20 is a cross-sectional view illustrating a configuration of a main part of the test system according to the second embodiment of the present invention.

FIG. 21 is a cross-sectional view illustrating a configuration of a main part of the test system according to the second embodiment of the present invention.

Description of Embodiments

[0018] Exemplary embodiments of the present invention will be explained in detail below with reference to accompanying drawings. The present invention is not limited to the embodiments below. In the drawings referred to in the explanation below, shapes, sizes, and positional relations are schematically illustrated to a degree that the present invention can be understood. Namely, the present invention is not limited to the shapes, sizes, and positional relations illustrated in the drawings.

[0019] (First Embodiment)

FIG. 1 is a perspective view illustrating a configuration of a test system according to a first embodiment. FIG. 2 is an exploded perspective view illustrating the configuration of the test system according to the first embodiment. A test system 1 illustrated in

FIGS. 1 and 2 is a device used to perform an electrical characteristics test on semiconductor packages 20 serving as test objects, and is a device for electrically connecting the semiconductor packages 20 and a circuit substrate that outputs a test signal to the semiconductor packages 20.

[0020] The test system 1 includes an approximately disc- shaped tray 10 for holding the semiconductor packages 20, each of which has an approximately rectangular shape, an approximately disc-shaped cover 30 that can come into contact with at least end portions of the semiconductor packages 20 held by the tray 10, and a probe unit 40 that electrically connects the semiconductor packages 20 and a circuit substrate.

[0021] The tray 10 includes, as illustrated in a perspective view in FIG. 3, holder holes 11 that are formed on a principal surface 10a of the tray 10 and that can hold the semiconductor packages 20. Insertion holes 1la, into which pins 43 serving as a positioning means to be described later are insertable, are formed in each of the holder holes 11. At least two insertion holes lla are formed in each of the holder holes 11. When the two insertion holes lla are formed in the holder hole 11, they are formed at positions corresponding to two adjacent sides of the semiconductor package 20 to be held. The tray 10 is made of a material suitable for use at a test temperature.

If a material with a linear expansion coefficient equal or close to the linear expansion coefficients of the semiconductor packages is used, it becomes possible to accurately set the positions even when the semiconductor packages serving as the test objects expand.

[0022] Each of the semiconductor packages 20 is a BGA (Ball Grid Array), and solder balls 21 serving as electrodes are arranged in an approximate rectangular shape on a surface 20a as illustrated in a perspective view in

FIG. 4.

[0023] The cover 30 has approximately the same outer edge shape as that of the tray 10 and covers the tray 10.

As illustrated in a perspective view in FIG. 5, the cover 30 includes circular openings 31 arranged in accordance with the holder holes 11. Each of the openings 31 is a circle with a diameter slightly smaller than the diagonal line of the semiconductor package 20. When the cover 30 is fixed to the tray 10, the openings 31 come into contact with end portions of the semiconductor packages 20 even if the tray 10 is turned upside down; therefore, it is possible to prevent the semiconductor packages 20 from coming off from the holder holes 1la. The tray 10 and the cover 30 are fixed to each other by screwing, fitting, or the like. The cover 30 comes into contact with the probe unit 40 on a surface 30a side.

[0024] The probe unit 40 includes a plurality of conductive contact probes 50 (hereinafter, simply referred to as the “probes 50”), each of which comes into contact with the semiconductor package 20 and the circuit substrate that are two different contacted objects, and a probe holder 41 serving as a holding unit for accommodating and holding the probes 50 according to a predetermined pattern.

In the first embodiment, a probe unit that can simultaneously come into contact with four semiconductor packages will be explained by way of example.

[0025] The probe holder 41 is formed by laminating a first member 4la located on a lower surface side in FIG. 6 and a second member 41b located on an upper surface side.

The same number of first holder holes 42a and second holder holes 42b (holder holes 42) for accommodating the probes 50 are formed in the first member 4la and the second member 41b, respectively. The first holder hole 42a and the second holder hole 42b for accommodating each of the probes 50 are formed so that the respective axes coincide with each other. The probe holder 41 includes pins 43, which are formed so as to protrude from a surface 40a facing the cover 30 and which have tapered end shapes so as to be inserted into the insertion holes 1la of the tray 10.

Meanwhile, FIG. 6 illustrates a perspective view in which the probe unit 40 illustrated in FIGS. 1 and 2 is turned upside down.

[0026] On the surface 40a of the probe unit 40 that comes into contact with the cover 30, columnar projecting portions 40b that are insertable into the openings 31 of the cover 30 are formed, and the holder holes 42 are arranged so that the probes 50 can be arranged in the same arrangement pattern as that of the semiconductor packages 20. A plurality of the projecting portions 40b are formed on the surface 40a of the probe unit in accordance with the arrangement of the openings 31.

[0027] Each of the holder holes 42 includes the first holder hole 42a and the second holder hole 42b, each of which is in the form of stepped holes with different diameters along a penetrating direction. Specifically, the first holder hole 42a includes a small-diameter portion 42c with an opening on an upper end surface of the probe holder 41 and a large-diameter portion 42d with a diameter greater than the diameter of the small-diameter portion 42c. On the other hand, the second holder hole 42b includes a small-diameter portion 42e with an opening on a lower end surface of the probe holder 41 and a large-diameter portion 42f with a diameter greater than the diameter of the small- diameter portion 42e. The shapes of the first holder hole 42a and the second holder hole 42b are determined in accordance with the configuration of the probe 50 to be accommodated. Therefore, the function to prevent the probe 50 from coming off from the probe holder 41 can be realized.

[0028] The probe 50 illustrated in FIG. 7 is formed by using a conductive material, and includes a first plunger 51 that comes into contact with an electrode on the circuit substrate side, a second plunger 52 that comes into contact with the solder ball 21 when the semiconductor package 20 is tested, and a spring member 53 that is disposed between the first plunger 51 and the second plunger 52 to connect the first plunger 51 and the second plunger 52 in an extendable and retractable manner. The first plunger 51, the second plunger 52, and the spring member 53 of the probe 50 have the same axis.

[0029] The first plunger 51 includes an end portion 5la which has a tapered end shape so as to come into contact with the electrode on the circuit substrate side, a flange portion 5lb with a diameter greater than the diameter of the end portion 5la, and a base end portion b5lc which extends to a side opposite to the end portion 51a via the flange portion 51b, which has a diameter smaller than the diameter of the flange portion 51b, and to which an end portion of the spring member 53 is press fitted.

[0030] The second plunger 52 includes an end portion 52a which has a plurality of claw portions in tapered end shapes, a flange portion 52b with a diameter greater than the diameter of the end portion 52a, and a base end portion 52c which is disposed opposite to the end portion 52a of the flange portion 52b, which has a diameter smaller than the diameter of the flange portion 52b, and to which an end portion of the spring member 53 is press fitted.

[0031] The spring member 53 includes a tightly wound portion 53a on the first plunger 51 side and a loosely wound portion 53b on the second plunger 52 side. An end of the tightly wound portion 53a is press fitted to the base end portion 5lc and comes into contact with the flange portion 51b. On the other hand, an end of the loosely wound portion 53b is press fitted to the base end portion 52c and comes into contact with the flange portion 52b.

The spring member 53 is elastically deformed in a connection direction of the semiconductor package 20.

[0032] When the semiconductor package 20 is tested, the spring member 53 is compressed along the longitudinal direction due to a contact load applied by the semiconductor package 20. If the spring member 53 is compressed, the tightly wound portion 53a comes into contact with a base end portion 52d of the second plunger 52. Therefore, the electrical continuity can be obtained reliably.

[0033] Next, a configuration of the pins 43 and the positioning of the semiconductor package 20 by the pins 43 will be explained with reference to FIGS. 8 and 9. Each of the pins 43 is held within a first holder hole 41c and a second holder hole 41d formed in the probe holder 41. The pin 43 has an approximately columnar shape, and includes an end portion 43a in a tapered end shape, a flange portion 43b that is connected to an end different from the end portion 43a side and that has a diameter greater than the maximum diameter of the end portion 43a, and a boss portion 43c that is connected to an end of the flange portion 43b on a side different from the side connected to the end portion 43a and that has a diameter smaller than the diameter of the flange portion 43b.

[0034] The diameter of the first holder hole 41c is smaller than the diameter of the second holder hole 41d.

The flange portion 43b comes into contact with a stepped shape formed by the first holder hole 41c and the second holder hole 41d, so that the pin 43 can be prevented from coming off from the probe holder 41. In addition, the boss portion 43c of the pin 43 is press fitted to a coil-shaped spring member 44 whose one end is fixed to a bottom surface of the second holder hole 41d. Therefore, the pin 43 can move back and forth in the insertion direction of the insertion hole 1la. It may be possible to arrange a spring member between the end surface of the flange portion 43b and the bottom surface of the second holder hole 41d without arranging the boss portion 43c on the pin 43.

[0035] To set the position of the semiconductor package 20, the surface 40a side of the probe unit 40 is brought close to the cover 30, so that each of the pins 43 is inserted while being guided along a wall surface of the insertion hole 1la of the tray 10 (see FIG. 8). At this time, the side surface of the pin 43 comes into contact with an end portion of the semiconductor package 20 and applies a force to the semiconductor package 20. With this force, the semiconductor package 20 moves to the wall surface side opposite to the insertion hole lla of the holder hole 11. Furthermore, as illustrated in FIG. 6, the pins 43 are arranged in accordance with the insertion holes lla arranged on adjacent two sides of the outer edge (four sides) of a rectangle. Therefore, the semiconductor package 20 is moved to one of the four corners of the holder hole 11.

[0036] When the cover 30 and the probe unit 40 come into contact with each other and the semiconductor package 20 comes into contact with two adjacent wall surfaces among four wall surfaces of the holder hole 11, the positioning of the semiconductor package 20 with respect to the holder hole 11 is complete. At the same time, the end portions 52a of the probes 50 come into contact with the solder balls 21 of the semiconductor package 20 (see FIG. 9). At this time, because the end portions bla illustrated in FIG. 7 are connected to the circuit substrate (not illustrated),

the semiconductor package 20 and the circuit substrate are electrically connected.

[0037] According to the first embodiment as described above, the pins for positioning the semiconductor packages is provided on the probe unit side, a plurality of insertion holes in which the pins are insertable are provided on the tray that holds the semiconductor packages, and the tray and the probe unit are brought close to each other so that it becomes possible to set the positions of a plurality of the semiconductor packages on the tray, and at the same time, establish a connection with the electrodes of the semiconductor packages. Therefore, it becomes possible to accurately test singulated test objects and shorten the time needed for the test of the singulated test objects, with a simple structure.

[0038] In addition, the cover with the openings that can come into contact with a part of the semiconductor packages is provided. Therefore, even when the tray is rotated, the upper surfaces of the semiconductor packages can be held by the cover and the conveying stability of the semiconductor packages can be ensured. Furthermore, the technology may be applied to a wafer test apparatus by adjusting the size of a tray with respect to a cassette for accommodating a wafer.

[0039] Moreover, the structure of the first embodiment can be implemented by only providing positioning pins on the probe unit side and providing insertion holes for inserting the pins on the tray side. Therefore, it is possible to accurately perform a test and shorten a test time with a simple structure. Furthermore, the structure can be implemented by only providing the insertion holes on the existing trays.

[0040] Furthermore, the pins 43 may be made of metal,

resin, or a material in which a base material made of metal is coated with resin. The pins 43 can be designed according to a material of the semiconductor packages 20 or the like.

[0041] As the semiconductor packages to be used, a PGA (Pin Grid Array) or the like may be applied in addition to a BGA as described above.

[0042] The probe may be a pogo pin 54 as illustrated in

FIG. 10. The pogo pin 54 illustrated in FIG. 10 is held by the probe holder 41c in which one end of the holder hole has a stepped shape, and includes, at both ends, end portions 54a and 54b that can move back and forth in one longitudinal direction. The end portions 54a and 54b come into contact with the circuit substrate and the semiconductor package to establish an electrical connection between the circuit substrate and the semiconductor package.

[0043] (Second Embodiment)

FIG. 11 is a perspective view illustrating a configuration of a test system according to a second embodiment. FIG. 12 is an exploded perspective view illustrating the configuration of the test system according to the second embodiment. A test system 2 illustrated in

FIGS. 11 and 12 is a device used to perform an electrical characteristics test on semiconductor packages 70 serving as test objects, and is a device for electrically connecting the semiconductor packages 70 and a circuit substrate that outputs a test signal to the semiconductor packages 70.

[0044] The test system 2 includes an approximately disc- shaped tray 60 for holding the semiconductor packages 70, each of which has an approximately rectangular shape, an approximately disc-shaped cover 80 that can come into contact with a part of the principal surfaces of the semiconductor packages 70 held by the tray 60, and a probe unit 90 that electrically connect the semiconductor packages 70 and the circuit substrate.

[0045] The tray 60 includes, as illustrated in a perspective view in FIG. 13, holder holes 61 that are formed on a principal surface 60a of the tray 60 and that can hold the semiconductor packages 70. As illustrated in the cross-sectional view in FIG. 14, each of the holder holes 61 includes a first holder hole 6la that has an approximately rectangular opening for holding the semiconductor package 70 and a second holder hole 61b that communicates with the opening surface of the first holder hole 6la and that has an approximately rectangular opening greater than the first holder hole 6la. The arrangement height of the first holder hole 6la and the second holder hole 6lb corresponds to the protrusion height of a lead 71 of the semiconductor package 70 and the height of an end portion, which will be described below.

[00406] The semiconductor package 70 is a rectangular QFP (Quad Flat Package), and, as illustrated in a perspective view in FIG. 15, the lead 71 serving as an electrode is arranged so as to protrude from a surface perpendicular to a principal surface 70a. The lead 71 has a shape that protrudes from the surface perpendicular to the principal surface 70a and is bent so that the height (extension height) of the end portion becomes equal to the height of the upper surface of the semiconductor package 70.

[0047] The cover 80 has approximately the same outer edge shape as that of the tray 60 and covers the tray 60.

As illustrated in a perspective view in FIG. 16, the cover 80 includes openings 81 arranged in accordance with the holder holes 61. Each of the openings 81 includes a circular first opening 8la with a diameter smaller than the diameter of the principal surface 70a of the semiconductor package 70 and four second openings 8lb formed in accordance with the outer edge shape of the holder hole 61.

When the cover 80 is fixed to the tray 60, the openings 81 come into contact with end portions of the semiconductor packages 70 even if the tray 60 is turned upside down; therefore, it is possible to prevent the semiconductor packages 70 from coming off from the holder holes 61. The cover 80 comes into contact with the probe unit 90 on a surface 80a side. The tray 60 and the cover 80 are fixed to each other by screwing, fitting, or the like.

[0048] The probe unit 90 includes conductive contact probes 100 (hereinafter, simply referred to as the “probes 100”), each of which comes into contact with the semiconductor package 70 and the circuit substrate that are two different contacted objects, and a probe holder 91 serving as a holding unit for accommodating and holding the probes 100 according to a predetermined pattern. In the probe holder 91, as illustrated in FIGS. 17 and 18, projecting portions 90b are formed on a surface 90a in accordance with the lead 71 of each of the semiconductor packages 70 and the second openings 8lb of the cover 80.

Holder holes 92 for holding the contact probes 100 are formed on a surface of the projecting portion 90b parallel to the surface 90a. On the surface 90a, the four projecting portions 90b are arranged in a rectangular shape corresponding to each of the semiconductor packages 70.

[0049] The probe holder 91 is formed by laminating a first member 91a located on a lower surface side in FIG. 17 and a second member 91b located on an upper surface side.

The same number of first holder holes 92a and second holder holes 92b (holder holes 92) for accommodating the probes 100 are formed on the first member 91a and the second member 91b, respectively. The first holder hole 92a and the second holder hole 92b for accommodating each of the probes 100 are formed so that the respective axes coincide with each other. The probe holder 91 includes plate springs 93, as a positioning means, that are provided on the surface 90a facing the cover 80 and that can come into contact with the principal surface of the semiconductor package 70. Meanwhile, FIG. 17 illustrates a perspective view in which the probe unit 90 illustrated in FIGS. 11 and 12 is turned upside down.

[0050] On the surface 90a of the probe unit 90 that comes into contact with the cover 80, the projecting portions 90b are formed that have approximately columnar shapes and that are insertable into the second openings 81b of the cover 80, and the holder holes 92 are arranged in the same arrangement pattern as that of the lead 71 of each of the semiconductor packages 70. A plurality of the projecting portions 90b are formed on the surface 90a of the probe unit in accordance with the arrangement of the second openings 8lb.

[0051] As illustrated in a partial cross-sectional view in FIG. 19, each of the holder holes 92 includes the first holder hole 92a and the second holder hole 92b, each of which is in the form of stepped holes with different diameters along a penetrating direction. Specifically, the first holder hole 92a includes a small-diameter portion 92c with an opening on an upper end surface of the probe holder 91 and a large-diameter portion 92d with a diameter greater than the diameter of the small-diameter portion 92c. On the other hand, the second holder hole 92b includes a small-diameter portion 92e with an opening on a lower end surface of the probe holder 91 and a large-diameter portion 92f with a diameter greater than the diameter of the small-

diameter portion 92e. The shapes of the first holder hole 92a and the second holder hole 92b are determined in accordance with the configuration of the probe 100 to be accommodated. Therefore, the function to prevent the probe 100 from coming off from the probe holder 91 can be realized.

[0052] Each of the plate springs 93 is fixed to the surface 90a with a screw 93a and extends so as to protrude in an oblique direction from the surface 90a. As illustrated in FIGS. 17 and 18, the plate spring 93 is fixed at least to the second member 91b with the screw 93a.

As illustrated in FIG. 18, the plate spring 93 is arranged so as to extend toward one of corners (vertices) of the outer edges (four sides) formed by the projecting portions 90b, and moves the semiconductor package 70 toward one of the four corners of the first holder hole 6la. The plate spring 93 may be made of metal, resin, or a material in which the surface of a base material made of metal is coated with resin. It is preferable that at least a portion of the plate spring 93 that comes into contact with the semiconductor package 70 has a high frictional force.

[0053] The probe 100 illustrated in FIG. 19 is formed by using a conductive material, and includes a first plunger 101 that has the same configuration as the first plunger 51 illustrated in FIG. 7, a second plunger 102 that comes into contact with the lead 71 when the semiconductor integrated circuit 70 is tested, and a spring member 103 that is disposed between the first plunger 101 and the second plunger 102 to connect the first plunger 101 and second plunger 102 in an extendable and retractable manner. The first plunger 101, the second plunger 102, and the spring member 103 of the probe 100 have the same axis. The first plunger 101 includes an end portion 10la, a flange portion

101b, and a base end portion 10lc respectively corresponding to the end portion 5la, the flange portion 51b and the base end portion 51c illustrated in FIG. 7.

[0054] The second plunger 102 includes an end portion 102a which has a tapered end shape so as to come into contact with the lead 71, a flange portion 102b with a diameter greater than the diameter of the end portion 102a, and a base end portion 102c which is disposed opposite to the end portion 102a of the flange portion 102b, which has a diameter smaller than the diameter of the flange portion 102b, and to which an end portion of the spring member 103 is press fitted.

[0055] The spring member 103 includes a tightly wound portion 103a on the first plunger 101 side and a loosely wound portion 103b on the second plunger 102 side. An end of the tightly wound portion 103a is press fitted to the base end portion 10lc and comes into contact with the flange portion 10lb. On the other hand, an end of the loosely wound portion 103b is press fitted to the base end portion 102c and comes into contact with the flange portion 102b. The spring member 103 is elastically deformed in a connection direction of the semiconductor package 70.

[0056] When the semiconductor package 70 is tested, the spring member 103 is compressed along the longitudinal direction due to a contact load applied by the semiconductor package 70. If the spring member 103 is compressed, the tightly wound portion 103a comes into contact with a base end portion 102d of the second plunger 102.

[0057] Next, the positioning of the semiconductor package 70 by the plate spring 93 will be explained with reference to FIGS. 20 and 21. The surface 90a side of the probe unit 90 is brought close to the cover 80, so that the plate spring 93 comes into contact with the semiconductor package 70 and applies a force to the semiconductor package 70. Therefore, the semiconductor package 70 moves in the extending direction (to the right in FIG. 20) of the plate spring 93. At this time, the plate spring 93 comes into contact with the principal surface 70a of the semiconductor package 70 to move the semiconductor package 70. With this force, the semiconductor package 70 moves to a boundary wall surface side between the first holder hole 6la and the second holder hole 61lb.

[0058] When the cover 80 and the probe unit 90 come into contact with each other and the semiconductor package 70 comes into contact with two adjacent wall surfaces among four wall surfaces of the holder hole 61, the positioning of the semiconductor package 70 with respect to the holder hole 61 is complete. At the same time, the end portion 102a of the probe 100 comes into contact with the lead 71 of the semiconductor package 70 (see FIG. 21). At this time, because the end portion 10la illustrated in FIG. 19 is connected to the circuit substrate (not illustrated), the semiconductor package 70 and the circuit substrate are electrically connected.

[0059] According to the second embodiment as described above, even when a QFP is used as the semiconductor package, similarly to the first embodiment, the pins for positioning the semiconductor packages are provided on the probe unit side, a plurality of insertion holes in which the pins are insertable are provided on the tray that holds the semiconductor packages, and the tray and the probe unit are brought close to each other so that it becomes possible to set the positions of a plurality of the semiconductor packages on the tray, and at the same time, establish a connection with the electrodes of the semiconductor packages. Therefore, it becomes possible to accurately test singulated test objects and shorten the time needed for the test of the singulated test objects, with a simple structure.

[0060] Even in the test system according to the second embodiment, it may be possible to perform positioning by using the pins of the test system of the first embodiment as described above. In this case, it is preferable to arrange the pins at positions that come into contact with at least two corners among the four corners of each of the semiconductor packages 70 and move the semiconductor package 70 to the remaining corner sides for positioning.

It is more preferable to arrange the pins at positions that come into contact with three corners of the semiconductor package 70.

[0061] It may be possible to apply the configuration to a QFN (Quad Flat Non-leaded Package) or an SOP (Small

Outline Package) by adjusting the arrangement and the heights of the second openings 8lb of the cover 80 and the projecting portions 90b of the probe unit 90.

[0062] Furthermore, in the first and the second embodiments described above, it is explained that the probe unit cope with four semiconductor packages. However, it is sufficient that the probe unit can come into contact with at least two semiconductor packages. The probe unit may simultaneously come into contact with all of the semiconductor packages in accordance with the tray.

Industrial Applicability

[0063] As described above, a test system and a package holder of the present invention are useful for connecting singulated electrical circuit substrates to establish electrical continuity with a simple structure.

Reference Signs List

[0064] 1, 2 TEST SYSTEM 10, 60 TRAY 11, 61 HOLDER HOLE 11a INSERTION HOLE 20, 70 SEMICONDUCTOR PACKAGE 21 SOLDER BALL 30, 80 COVER 31, 81 OPENING 40, 90 PROBE UNIT 41, 91 PROBE HOLDER 42, 92 HOLDER HOLE 43 PIN 50, 100 PROBE 6la FIRST HOLDER HOLE 61lb SECOND HOLDER HOLE 71 LEAD 8la FIRST OPENING 8lb SECOND OPENING 93 PLATE SPRING

Claims

1. A test system comprising: a tray having a plurality of holder holes for holding packages serving as test objects; contact probes that are connected to electrodes of the packages when a test is performed; a probe holder for holding the contact probes; a positioning unit that is arranged on the probe holder and sets positions of the packages with respect to the holder holes when the test is performed.

2. The test system according to claim 1, further comprising a cover that covers an upper surface of the tray, that includes openings to expose the electrodes of the packages, and that comes into contact with at least a part of the packages held by the tray.

3. The test system according to claim 1 or 2, wherein the positioning unit includes a plurality of pins whose ends have tapered shapes extending from the probe holder in a direction perpendicular to a principal surface of the probe holder, the tray has insertion holes in which the ends of the pins are insertable, and the pins come into contact with an outer edge of each of the packages to move the package to a predetermined position when the test is performed.

4, The test system according to claim 3, wherein the pins are movable back and force in a direction perpendicular to the principal surface of the probe holder.

5. The test system according to claim 1 or 2, wherein the positioning unit is a plate spring that comes into contact with a principal surface of each of the packages to move the package to a predetermined position of each of the holder holes when the test is performed, and the plate spring protrudes from the principal surface of the probe holder so as to extend in an oblique direction toward the predetermined position.

6. A package holder comprising: a tray having a plurality of holder holes for holding packages serving as test objects; and a cover that covers an upper surface of the tray, that includes openings for exposing electrodes of the packages, and that comes into contact with at least a part of the packages held by the tray.