SG171350A1 - Device and method for at least partially encapsulating a closed flat carrier with electronic components - Google Patents

Device and method for at least partially encapsulating a closed flat carrier with electronic components Download PDF

Info

Publication number
SG171350A1
SG171350A1 SG2011036100A SG2011036100A SG171350A1 SG 171350 A1 SG171350 A1 SG 171350A1 SG 2011036100 A SG2011036100 A SG 2011036100A SG 2011036100 A SG2011036100 A SG 2011036100A SG 171350 A1 SG171350 A1 SG 171350A1
Authority
SG
Singapore
Prior art keywords
carrier
encapsulating material
mould
encapsulating
electronic components
Prior art date
Application number
SG2011036100A
Other languages
English (en)
Inventor
Wilhelmus Gerardus Jozef Gal
Henricus Antonius Maria Fierkens
Original Assignee
Fico Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fico Bv filed Critical Fico Bv
Publication of SG171350A1 publication Critical patent/SG171350A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Casings For Electric Apparatus (AREA)
SG2011036100A 2008-11-21 2009-11-17 Device and method for at least partially encapsulating a closed flat carrier with electronic components SG171350A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL2002240A NL2002240C2 (nl) 2008-11-21 2008-11-21 Inrichting en werkwijze voor het tenminste gedeeltelijk omhullen van een gesloten vlakke drager met elektronische componenten.
PCT/NL2009/050687 WO2010059042A1 (en) 2008-11-21 2009-11-17 Device and method for at least partially encapsulating a closed flat carrier with electronic components

Publications (1)

Publication Number Publication Date
SG171350A1 true SG171350A1 (en) 2011-07-28

Family

ID=40602956

Family Applications (1)

Application Number Title Priority Date Filing Date
SG2011036100A SG171350A1 (en) 2008-11-21 2009-11-17 Device and method for at least partially encapsulating a closed flat carrier with electronic components

Country Status (7)

Country Link
KR (2) KR20160121607A (zh)
CN (1) CN102224582B (zh)
MY (1) MY172851A (zh)
NL (1) NL2002240C2 (zh)
SG (1) SG171350A1 (zh)
TW (1) TWI581379B (zh)
WO (1) WO2010059042A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104916549B (zh) * 2014-10-31 2018-08-14 深圳市东方聚成科技有限公司 一种具有弧边的指纹识别芯片的封装设备及封装和切割方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1060559A (zh) * 1990-10-10 1992-04-22 三星电子株式会社 用带有倾斜浇口的设备将半导体器件密封在模制物料中
US6881611B1 (en) * 1996-07-12 2005-04-19 Fujitsu Limited Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device
KR100484962B1 (ko) * 1996-07-12 2005-04-25 후지쯔 가부시끼가이샤 반도체 장치의 제조 방법 및 반도체 장치
US6117382A (en) * 1998-02-05 2000-09-12 Micron Technology, Inc. Method for encasing array packages
US6469399B2 (en) * 1999-02-08 2002-10-22 Advanced Semiconductor Engineering, Inc. Semiconductor package
US6294825B1 (en) * 1999-02-22 2001-09-25 Micron Technology, Inc. Asymmetrical mold of multiple-part matrixes
JP3494586B2 (ja) * 1999-03-26 2004-02-09 アピックヤマダ株式会社 樹脂封止装置及び樹脂封止方法
JP2001212848A (ja) * 2000-02-04 2001-08-07 Towa Corp 樹脂成形用金型
US6838319B1 (en) * 2000-08-31 2005-01-04 Micron Technology, Inc. Transfer molding and underfilling method and apparatus including orienting the active surface of a semiconductor substrate substantially vertically
US7132311B2 (en) * 2002-07-26 2006-11-07 Intel Corporation Encapsulation of a stack of semiconductor dice
US6869824B2 (en) * 2002-10-29 2005-03-22 Ultratera Corporation Fabrication method of window-type ball grid array semiconductor package
US20040158978A1 (en) * 2003-02-14 2004-08-19 Lee Sang-Hyeop Molding method and mold for encapsulating both sides of PCB module with wafer level package mounted PCB
US20040178514A1 (en) * 2003-03-12 2004-09-16 Lee Sang-Hyeop Method of encapsulating semiconductor devices on a printed circuit board, and a printed circuit board for use in the method
TWI234211B (en) * 2003-12-26 2005-06-11 Advanced Semiconductor Eng Method for forming an underfilling layer on a bumped wafer
DE112004002527T5 (de) * 2004-01-06 2008-03-06 Infineon Technologies Ag Verfahren zum Verkapseln von Schaltkreischips
TWI265613B (en) * 2005-08-24 2006-11-01 Advanced Semiconductor Eng Heat sink
TWI300613B (en) * 2006-03-15 2008-09-01 Advanced Semiconductor Eng Molding apparatus for encapsulating semiconductor devices
JP4155999B2 (ja) * 2006-06-02 2008-09-24 株式会社ソニー・コンピュータエンタテインメント 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
MY172851A (en) 2019-12-12
NL2002240C2 (nl) 2010-05-25
CN102224582A (zh) 2011-10-19
KR101947610B1 (ko) 2019-02-14
TW201029120A (en) 2010-08-01
TWI581379B (zh) 2017-05-01
KR20110095375A (ko) 2011-08-24
CN102224582B (zh) 2015-04-22
WO2010059042A1 (en) 2010-05-27
KR20160121607A (ko) 2016-10-19

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