SG144858A1 - Method for reducing and homogenizing the thickness of a semiconductor layer which lies on the surface of an electrically insulating material - Google Patents

Method for reducing and homogenizing the thickness of a semiconductor layer which lies on the surface of an electrically insulating material

Info

Publication number
SG144858A1
SG144858A1 SG200800583-7A SG2008005837A SG144858A1 SG 144858 A1 SG144858 A1 SG 144858A1 SG 2008005837 A SG2008005837 A SG 2008005837A SG 144858 A1 SG144858 A1 SG 144858A1
Authority
SG
Singapore
Prior art keywords
semiconductor layer
thickness
homogenizing
lies
reducing
Prior art date
Application number
SG200800583-7A
Other languages
English (en)
Inventor
Diego Feijoo
Oliver Riemenschneider
Reinhold Wahlich
Original Assignee
Siltronic Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic Ag filed Critical Siltronic Ag
Publication of SG144858A1 publication Critical patent/SG144858A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
SG200800583-7A 2007-02-07 2008-01-22 Method for reducing and homogenizing the thickness of a semiconductor layer which lies on the surface of an electrically insulating material SG144858A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102007006151A DE102007006151B4 (de) 2007-02-07 2007-02-07 Verfahren zur Verringerung und Homogenisierung der Dicke einer Halbleiterschicht, die sich auf der Oberfläche eines elektrisch isolierenden Materials befindet

Publications (1)

Publication Number Publication Date
SG144858A1 true SG144858A1 (en) 2008-08-28

Family

ID=39156375

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200800583-7A SG144858A1 (en) 2007-02-07 2008-01-22 Method for reducing and homogenizing the thickness of a semiconductor layer which lies on the surface of an electrically insulating material

Country Status (8)

Country Link
US (1) US7988876B2 (ja)
EP (1) EP1956643B1 (ja)
JP (1) JP5072633B2 (ja)
KR (1) KR100922834B1 (ja)
CN (1) CN101241856B (ja)
DE (1) DE102007006151B4 (ja)
SG (1) SG144858A1 (ja)
TW (1) TWI415184B (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2991099B1 (fr) * 2012-05-25 2014-05-23 Soitec Silicon On Insulator Procede de traitement d'une structure semi-conducteur sur isolant en vue d'uniformiser l'epaisseur de la couche semi-conductrice
JP7039706B2 (ja) * 2018-07-20 2022-03-22 富士フイルム株式会社 処理液および処理方法
US11869774B2 (en) * 2020-09-25 2024-01-09 Changxin Memory Technologies, Inc. Method for improving etching rate of wet etching

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0405886B1 (en) * 1989-06-26 1996-11-27 Hashimoto Chemical Industries Co., Ltd. Surface treatment agent for fine surface treatment
US5277835A (en) * 1989-06-26 1994-01-11 Hashimoto Chemical Industries Co., Ltd. Surface treatment agent for fine surface treatment
JPH0834198B2 (ja) * 1990-11-28 1996-03-29 信越半導体株式会社 Ｓｏｉ基板における単結晶薄膜層の膜厚制御方法
JPH0817166B2 (ja) 1991-04-27 1996-02-21 信越半導体株式会社 超薄膜ｓｏｉ基板の製造方法及び製造装置
DE69333152T2 (de) * 1992-01-30 2004-05-27 Canon K.K. Verfahren zur Herstellung eines Halbleitersubstrates
JP3119384B2 (ja) 1992-01-31 2000-12-18 キヤノン株式会社 半導体基板及びその作製方法
JP3250673B2 (ja) * 1992-01-31 2002-01-28 キヤノン株式会社 半導体素子基体とその作製方法
JP2663923B2 (ja) * 1995-06-15 1997-10-15 日本電気株式会社 Ｓｏｉ基板の製造方法
US5756403A (en) * 1995-12-29 1998-05-26 Philips Electronics North America Method of preferentially etching a semiconductor substrate with respect to epitaxial layers
US6391793B2 (en) * 1999-08-30 2002-05-21 Micron Technology, Inc. Compositions for etching silicon with high selectivity to oxides and methods of using same
JP2004128079A (ja) 2002-09-30 2004-04-22 Speedfam Co Ltd Ｓｏｉウェハーのための多段局所ドライエッチング方法
JP4509488B2 (ja) * 2003-04-02 2010-07-21 株式会社Ｓｕｍｃｏ 貼り合わせ基板の製造方法
US7256104B2 (en) * 2003-05-21 2007-08-14 Canon Kabushiki Kaisha Substrate manufacturing method and substrate processing apparatus
US7115207B2 (en) * 2003-07-01 2006-10-03 International Businss Machines Corporation Moly mask construction and process
DE10344351A1 (de) * 2003-09-24 2005-05-19 Infineon Technologies Ag Verfahren zum anisotropen Ätzen von Silizium
JP2005228965A (ja) * 2004-02-13 2005-08-25 Elpida Memory Inc 半導体装置の製造方法およびその製造装置
JP2005347587A (ja) * 2004-06-04 2005-12-15 Sony Corp ドライエッチング後の洗浄液組成物および半導体装置の製造方法
DE102004054566B4 (de) * 2004-11-11 2008-04-30 Siltronic Ag Verfahren und Vorrichtung zum Einebnen einer Halbleiterscheibe sowie Halbleiterscheibe mit verbesserter Ebenheit
JP4693642B2 (ja) * 2006-01-30 2011-06-01 株式会社東芝 半導体装置の製造方法および洗浄装置

Also Published As

Publication number Publication date
DE102007006151B4 (de) 2008-11-06
JP5072633B2 (ja) 2012-11-14
KR100922834B1 (ko) 2009-10-20
CN101241856A (zh) 2008-08-13
EP1956643B1 (de) 2014-04-09
JP2008193100A (ja) 2008-08-21
TW200834709A (en) 2008-08-16
TWI415184B (zh) 2013-11-11
US20080188084A1 (en) 2008-08-07
US7988876B2 (en) 2011-08-02
EP1956643A1 (de) 2008-08-13
DE102007006151A1 (de) 2008-08-14
KR20080074023A (ko) 2008-08-12
CN101241856B (zh) 2011-08-31

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SG144858A1 (en) Method for reducing and homogenizing the thickness of a semiconductor layer which lies on the surface of an electrically insulating material