SG115421A1 - Integrated circuit metallization using a titanium/aluminium alloy - Google Patents

Integrated circuit metallization using a titanium/aluminium alloy

Info

Publication number
SG115421A1
SG115421A1 SG200106489A SG200106489A SG115421A1 SG 115421 A1 SG115421 A1 SG 115421A1 SG 200106489 A SG200106489 A SG 200106489A SG 200106489 A SG200106489 A SG 200106489A SG 115421 A1 SG115421 A1 SG 115421A1
Authority
SG
Singapore
Prior art keywords
titanium
integrated circuit
aluminium alloy
circuit metallization
metallization
Prior art date
Application number
SG200106489A
Other languages
English (en)
Inventor
D Snyder Ridky
G Long Robert
W Hula David
D Crook Mark
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of SG115421A1 publication Critical patent/SG115421A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/564Details not otherwise provided for, e.g. protection against moisture
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051Deposition of metallic or metal-silicide layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/143Digital devices
    • H01L2924/1433Application-specific integrated circuit [ASIC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
SG200106489A 2000-10-27 2001-10-19 Integrated circuit metallization using a titanium/aluminium alloy SG115421A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/698,459 US6646346B1 (en) 2000-10-27 2000-10-27 Integrated circuit metallization using a titanium/aluminum alloy

Publications (1)

Publication Number Publication Date
SG115421A1 true SG115421A1 (en) 2005-10-28

Family

ID=24805338

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200106489A SG115421A1 (en) 2000-10-27 2001-10-19 Integrated circuit metallization using a titanium/aluminium alloy

Country Status (4)

Country Link
US (2) US6646346B1 (ja)
JP (2) JP2002151515A (ja)
DE (1) DE10152913A1 (ja)
SG (1) SG115421A1 (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7121997B2 (en) * 1999-06-09 2006-10-17 Ethicon, Inc. Surgical instrument and method for treating female urinary incontinence
US7001841B2 (en) * 2002-08-26 2006-02-21 Matsushita Electric Industrial Co., Ltd. Production method of semiconductor device
US8035183B2 (en) * 2003-05-05 2011-10-11 Udt Sensors, Inc. Photodiodes with PN junction on both front and back sides
KR20090128900A (ko) * 2008-06-11 2009-12-16 크로스텍 캐피탈, 엘엘씨 Coms 이미지 센서의 제조방법
US8399909B2 (en) 2009-05-12 2013-03-19 Osi Optoelectronics, Inc. Tetra-lateral position sensing detector
JP7070848B2 (ja) 2018-07-26 2022-05-18 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4995049A (en) * 1990-05-29 1991-02-19 Eastman Kodak Company Optoelectronic integrated circuit
JPH05267292A (ja) * 1992-03-19 1993-10-15 Fujitsu Ltd 半導体装置の製造方法
US5747879A (en) * 1995-09-29 1998-05-05 Intel Corporation Interface between titanium and aluminum-alloy in metal stack for integrated circuit
US5700718A (en) * 1996-02-05 1997-12-23 Micron Technology, Inc. Method for increased metal interconnect reliability in situ formation of titanium aluminide
US5838052A (en) * 1996-03-07 1998-11-17 Micron Technology, Inc. Reducing reflectivity on a semiconductor wafer by annealing titanium and aluminum
JPH09289212A (ja) * 1996-04-19 1997-11-04 Ricoh Co Ltd 半導体装置の積層配線およびその製造方法
JP3500308B2 (ja) * 1997-08-13 2004-02-23 インターナショナル・ビジネス・マシーンズ・コーポレーション 集積回路
JPH11214506A (ja) * 1998-01-20 1999-08-06 Nec Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JP2007110103A (ja) 2007-04-26
US6903017B2 (en) 2005-06-07
US6646346B1 (en) 2003-11-11
JP4636414B2 (ja) 2011-02-23
DE10152913A1 (de) 2002-05-29
US20040038453A1 (en) 2004-02-26
JP2002151515A (ja) 2002-05-24

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