SG11201810302QA - Deep junction electronic device and process for manufacturing thereof - Google Patents

Deep junction electronic device and process for manufacturing thereof

Info

Publication number
SG11201810302QA
SG11201810302QA SG11201810302QA SG11201810302QA SG11201810302QA SG 11201810302Q A SG11201810302Q A SG 11201810302QA SG 11201810302Q A SG11201810302Q A SG 11201810302QA SG 11201810302Q A SG11201810302Q A SG 11201810302QA SG 11201810302Q A SG11201810302Q A SG 11201810302QA
Authority
SG
Singapore
Prior art keywords
layer
international
semiconductor material
substrate
monocrystalline semiconductor
Prior art date
Application number
SG11201810302QA
Inventor
Fulvio Mazzamuto
Original Assignee
Laser Systems & Solutions Of Europe
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laser Systems & Solutions Of Europe filed Critical Laser Systems & Solutions Of Europe
Publication of SG11201810302QA publication Critical patent/SG11201810302QA/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electromagnetism (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 07 December 2017 (07.12.2017) WIP0 I PCT iii11111111 111111111111111111111111111111111111111111111111111111111111111111111111111111111 (10) International Publication Number WO 2017/207653 Al (51) International Patent Classification: H01L 21/02 (2006.01) HOlL 21/268 (2006.01) H01L 21/265 (2006.01) (21) International Application Number: PCT/EP2017/063195 (22) International Filing Date: 31 May 2017 (31.05.2017) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 16172286.3 31 May 2016 (31.05.2016) EP (71) Applicant: LASER SYSTEMS & SOLUTIONS OF EU- ROPE [FR/FR]; 14-38 rue Alexandre, 92230 GENNEVIL- LIERS (FR). (72) Inventor: MAZZAMUTO, Fulvio; 151 bis rue Marcadet, 75018 PARIS (FR). (74) Agent: CHAUVIN, Vincent et al.; 32 me de l'Arcade, 75008 PARIS (FR). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: with international search report (Art. 21(3)) before the expiration of the time limit for amending the claims and to be republished in the event of receipt of amendments (Rule 48.2(h)) = (54) Title: DEEP JUNCTION ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING THEREOF 19 Fig.12 W O 20 17 / 207 65 3 Al (57) : The invention concerns a process for manufacturing a deep junction electronic device comprising the steps of: b) Depositing a layer (5) of non monocrystalline semiconductor material on a plane surface (9) of a substrate (1) of a monocrystalline semiconductor material; c) Incorporating inactivated dopant elements prior to step b) into said substrate (1) and/or, respectively, during or after step b) into said layer (5), so as to form an inactivated doped layer (7, 27); d) Exposing, an external surface (19) of the layer (5) formed at step b) to a laser thermal anneal beam (30), so as to melt said layer (5) down to the substrate (1) and so as to activate said dopant elements incorporated at step c); e) Stopping exposure to the laser beam so as to induce epi-like crystallization of the melted layer (5), so that said substrate (1) and/or, respectively, an epi-like monocrystalline semiconductor material, comprises a layer (17, 27) of activated doped monocrystalline semiconductor material.
SG11201810302QA 2016-05-31 2017-05-31 Deep junction electronic device and process for manufacturing thereof SG11201810302QA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP16172286.3A EP3252800A1 (en) 2016-05-31 2016-05-31 Deep junction electronic device and process for manufacturing thereof
PCT/EP2017/063195 WO2017207653A1 (en) 2016-05-31 2017-05-31 Deep junction electronic device and process for manufacturing thereof

Publications (1)

Publication Number Publication Date
SG11201810302QA true SG11201810302QA (en) 2018-12-28

Family

ID=56098063

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201810302QA SG11201810302QA (en) 2016-05-31 2017-05-31 Deep junction electronic device and process for manufacturing thereof

Country Status (8)

Country Link
US (1) US10566189B2 (en)
EP (2) EP3252800A1 (en)
JP (1) JP2019523986A (en)
KR (1) KR102478873B1 (en)
CN (1) CN109196622B (en)
MY (1) MY197787A (en)
SG (1) SG11201810302QA (en)
WO (1) WO2017207653A1 (en)

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CN113497158B (en) * 2020-04-07 2023-03-21 珠海格力电器股份有限公司 Fast recovery semiconductor device and manufacturing method thereof
WO2021214028A1 (en) * 2020-04-22 2021-10-28 Istituto Nazionale Di Fisica Nucleare (Infn) P+ or n+ type doping process for semiconductors
CN115702476A (en) 2020-06-17 2023-02-14 应用材料公司 Gate interface engineering using doped layers
CN115117198A (en) * 2022-05-16 2022-09-27 上海交通大学 Preparation method of delta doping layer and electronic device

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JPS5752128A (en) * 1980-09-16 1982-03-27 Hitachi Ltd Manufacture of semiconductor device
JPS6255689A (en) * 1985-09-03 1987-03-11 富士通株式会社 Mounting of liquid crystal display unit
US6890835B1 (en) * 2000-10-19 2005-05-10 International Business Machines Corporation Layer transfer of low defect SiGe using an etch-back process
JP4511092B2 (en) 2000-12-11 2010-07-28 セイコーエプソン株式会社 Manufacturing method of semiconductor device
US6982212B2 (en) 2001-11-30 2006-01-03 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device
WO2006033041A1 (en) * 2004-09-22 2006-03-30 Koninklijke Philips Electronics N.V. Integrated circuit fabrication using solid phase epitaxy and silicon on insulator technology
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JP2012146716A (en) * 2011-01-07 2012-08-02 Toshiba Corp Manufacturing method of semiconductor device
EP2899749A1 (en) * 2014-01-24 2015-07-29 Excico France Method for forming polycrystalline silicon by laser irradiation

Also Published As

Publication number Publication date
EP3465738A1 (en) 2019-04-10
CN109196622A (en) 2019-01-11
CN109196622B (en) 2024-04-02
EP3252800A1 (en) 2017-12-06
JP2019523986A (en) 2019-08-29
US20190214251A1 (en) 2019-07-11
MY197787A (en) 2023-07-14
KR102478873B1 (en) 2022-12-19
US10566189B2 (en) 2020-02-18
WO2017207653A1 (en) 2017-12-07
KR20190015262A (en) 2019-02-13

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