JP5675204B2 - Manufacturing method of IGBT - Google Patents

Description

The present invention relates to the manufacture how of the IGBT.

  Conventionally, there is known an IGBT manufacturing method capable of manufacturing a punch-through type IGBT having a low on-resistance. FIG. 9 is a diagram illustrating a conventional method for manufacturing an IGBT. 9A to 9D are process diagrams.

In the conventional IGBT manufacturing method, as shown in FIG. 9, a process of preparing an epitaxial substrate 810 in which an n ⁺ type epitaxial layer 814 and an n ⁻ type epitaxial layer 812 are sequentially stacked on the surface of a p ⁺ type silicon layer 816 ( 9A), the step of forming the MOS structure 820 on the first main surface side surface of the epitaxial substrate 810 (FIG. 9B), and the epitaxial substrate 810 from the second main surface side of the epitaxial substrate 810. Is a process of thinning the p ⁺ type silicon layer 816 (see FIG. 9C), and a step of forming a collector electrode 834 on the surface of the p ⁺ type silicon layer 816 (see FIG. 9D). .) In this order. In FIG. 9, reference numeral 822 indicates a p-type base region, reference numeral 824 indicates an n ⁺ -type emitter region, reference numeral 826 indicates a gate insulating film, reference numeral 828 indicates a gate electrode, and reference numeral 830 indicates an interlayer insulating film. Reference numeral 832 denotes an emitter electrode.

According to a conventional IGBT manufacturing method, a punch-through IGBT is provided, which includes a collector layer made of a p ⁺ type silicon layer 816, a buffer layer made of an n ⁺ type epitaxial layer 814, and a drift layer made of an n ⁻ type epitaxial layer 812. Can be manufactured.
Further, according to the conventional IGBT manufacturing method, since it includes “a step of grinding and polishing the epitaxial substrate 810 from the second main surface side of the epitaxial substrate 810 to thin the p ⁺ -type silicon layer 816”, the p ⁺ -type The silicon layer 816 (collector layer) can be thinned to some extent, and an IGBT with low on-resistance can be manufactured.

However, in the conventional IGBT manufacturing method, it is not easy to precisely control the thicknesses of the n ⁺ type epitaxial layer 814 and the n ⁻ type epitaxial layer 812 in the process of manufacturing the epitaxial substrate 810. In the process of grinding / polishing the epitaxial substrate 810, it is not easy to precisely control the amount of grinding / polishing (thickness) due to uneven thickness of the tape to which the epitaxial substrate 810 is attached. Therefore, in consideration of variations in the thicknesses of the n ⁺ type epitaxial layer 814 and the n ⁻ type epitaxial layer 812 and variations in the amount of grinding / polishing (thickness), the p ⁺ type silicon layer 816 (collector layer) is practically used. It is difficult to make the thickness 10 μm or less. Therefore, this is a limitation in further reducing the on-resistance of the IGBT.

  In view of this, another IGBT manufacturing method that can manufacture an IGBT having a lower on-resistance than the conventional IGBT manufacturing method has been proposed (see, for example, Patent Document 1). FIG. 10 is a diagram showing another conventional IGBT manufacturing method. FIG. 10A to FIG. 10G are process diagrams.

As shown in FIG. 10, another conventional IGBT manufacturing method includes a step of preparing an n ⁻ -type silicon substrate 912 (see FIG. 10A), and a first main surface side of the n ⁻ -type silicon substrate 912. forming a MOS structure 920 on the surface (FIG. 10 (b) see.) and, n ^- n from the second main surface side of -type silicon substrate 912 ^- the type silicon substrate 912 is ground and polished to the n ^- -type silicon A step of thinning the substrate 912 (see FIG. 10C), a step of introducing an n-type impurity into a deep position on the second main surface side of the n ⁻ -type silicon substrate 912 (see FIG. 10D), and , A step of introducing a p-type impurity into a shallow position on the second main surface side of the n ⁻ -type silicon substrate 912 (see FIG. 10E), and laser light from the second main surface side of the n ⁻ -type silicon substrate 912 Activates n-type and p-type impurities By the step of forming an ^{n +} -type silicon layer 914 and the ^{p +} -type silicon layer 916 (see FIG. 10 (f).) And the step of forming the collector electrode 934 on the surface of the ^{p +} -type silicon layer 916 (FIG. 10 (G)) in this order. In FIG. 10, reference numeral 914 ′ denotes an n-type impurity introduction layer, reference numeral 916 ′ denotes a p-type impurity introduction layer, reference numeral 922 denotes a p-type base region, and reference numeral 924 denotes an n ⁺ -type emitter region. , 926 indicates a gate insulating film, Numeral 928 indicates a gate electrode, 930 indicates an interlayer insulating film, and 932 indicates an emitter electrode.

According to another conventional IGBT manufacturing method, a punch-through type including a collector layer made of a p ⁺ type silicon layer 916, a buffer layer made of an n ⁺ type silicon layer 914, and a drift layer made of an n ⁻ type silicon substrate 912 is provided. It becomes possible to manufacture this IGBT.
Further, according to the method of manufacturing another conventional IGBT, n ^- the second main surface side of -type silicon substrate 912 ^- n as well as n-type impurity is introduced into the deeper position in the second main surface side of -type silicon substrate 912 Since the n ⁺ type silicon layer 914 (buffer layer) and the p ⁺ type silicon layer 916 (collector layer) are formed by introducing a p-type impurity at a shallow position, as in the conventional IGBT manufacturing method. There is no need to “control the thickness of the n ⁺ -type epitaxial layer and the n ⁻ -type epitaxial layer precisely” or “grind and polish the epitaxial substrate”. For this reason, according to another conventional IGBT manufacturing method, the p ⁺ -type silicon layer 916 (collector layer) can be made to have a thickness of 10 μm or less, compared with the IGBT manufactured by the conventional IGBT manufacturing method. In addition, an IGBT having a low on-resistance can be manufactured.

JP 2002-314084 A

However, in another conventional IGBT manufacturing method, it is necessary to introduce an n-type impurity into a deep position on the second main surface side of the n ⁻ -type silicon substrate 912. Therefore, an acceleration voltage of several hundred keV to several MeV is applied. There is a problem that it is necessary to use an ion implantation apparatus with a high acceleration voltage that can be applied, and it is not easy to reduce the manufacturing cost. Such a problem is also present when manufacturing an IGBT in which the n-type and the p-type have an inverse relationship.

  Therefore, an object of the present invention is to provide an IGBT manufacturing method capable of manufacturing an IGBT having lower on-resistance than an IGBT manufactured by a conventional IGBT manufacturing method at a low manufacturing cost. Another object of the present invention is to provide an IGBT having a lower on-resistance than a conventional IGBT and having a low manufacturing cost.

[1] An IGBT manufacturing method of the present invention is an IGBT manufacturing method for manufacturing a punch-through type IGBT, and includes a first step of preparing a semiconductor substrate containing a first conductivity type impurity, and the semiconductor A second step of forming a MOS structure on the first main surface side surface of the substrate; a third step of grinding and polishing the semiconductor substrate from the second main surface side of the semiconductor substrate to thin the semiconductor substrate; A fourth step of introducing a first conductivity type impurity into the semiconductor substrate from the second main surface side of the semiconductor substrate; and a semiconductor material constituting the semiconductor substrate on the second main surface side surface of the semiconductor substrate And a fifth step of forming a semiconductor layer containing a second conductivity type impurity opposite to the first conductivity type impurity, and a laser beam from the second main surface side of the semiconductor substrate. Irradiate to melt the semiconductor layer And a sixth step of, characterized in that it comprises in that order.

  According to the IGBT manufacturing method of the present invention, after performing the third step of thinning the semiconductor substrate, “fourth step of introducing the first conductivity type impurity into the semiconductor substrate from the second main surface side of the semiconductor substrate”. And “a fifth step of forming a semiconductor layer made of the same semiconductor material as that constituting the semiconductor substrate and containing a second conductivity type impurity on the surface on the second main surface side of the semiconductor substrate” , "Sixth step of irradiating laser beam from the second main surface side of the semiconductor substrate to melt the semiconductor layer" in this order, whereby the collector layer, the buffer layer, and the drift layer are respectively formed on the semiconductor substrate. 2 It becomes possible to manufacture a punch-through type IGBT formed at a predetermined depth on the main surface side.

According to the IGBT manufacturing method of the present invention, after the third step of thinning the semiconductor substrate is performed, “the first conductivity type impurity is introduced into the semiconductor substrate from the second main surface side of the semiconductor substrate”. 4 steps ”and“ 5th step of forming a semiconductor layer made of the same semiconductor material as the semiconductor material constituting the semiconductor substrate and containing the second conductivity type impurity on the surface of the semiconductor substrate on the second main surface side ”. And “sixth step of irradiating a laser beam from the second main surface side of the semiconductor substrate to melt the semiconductor layer” in this order to manufacture a punch-through type IGBT. This eliminates the need for “controlling the thickness of the n ⁺ -type epitaxial layer and the n ⁻ -type epitaxial layer precisely” and “grinding and polishing the epitaxial substrate” as in the conventional IGBT manufacturing method. For this reason, according to the IGBT manufacturing method of the present invention, the collector layer can be made to have a thickness of 10 μm or less, and an IGBT having a lower on-resistance than the IGBT manufactured by the conventional IGBT manufacturing method is manufactured. It becomes possible.

  According to the IGBT manufacturing method of the present invention, after the third step of thinning the semiconductor substrate is performed, “the first conductivity type impurity is introduced into the semiconductor substrate from the second main surface side of the semiconductor substrate”. 4 steps ”and“ 5th step of forming a semiconductor layer made of the same semiconductor material as the semiconductor material constituting the semiconductor substrate and containing the second conductivity type impurity on the surface of the semiconductor substrate on the second main surface side ”. And “sixth step of irradiating a laser beam from the second main surface side of the semiconductor substrate to melt the semiconductor layer” in this order to manufacture a punch-through type IGBT. In the “fourth step of introducing the first conductivity type impurity into the semiconductor substrate from the second main surface side of the semiconductor substrate”, the first conductivity type impurity is introduced into a deep position on the second main surface side of the semiconductor substrate. There is no need to do it. For this reason, according to the IGBT manufacturing method of the present invention, it is not necessary to use a high acceleration voltage ion implanter that can apply an acceleration voltage of several hundred keV to several MeV, and it is manufactured more than other conventional IGBT manufacturing methods. It becomes the manufacturing method of IGBT which can reduce cost.

  As a result, the IGBT manufacturing method of the present invention is an IGBT manufacturing method capable of manufacturing an IGBT having lower on-resistance than an IGBT manufactured by a conventional IGBT manufacturing method at a low manufacturing cost.

  In the IGBT manufacturing method of the present invention, the “semiconductor layer made of the same semiconductor material as that constituting the semiconductor substrate” means, for example, silicon when the semiconductor material constituting the semiconductor substrate is silicon. The semiconductor layer which consists of. Silicon may contain impurities. Further, the silicon does not need to be single crystal silicon, and may be polycrystalline silicon (polysilicon) or amorphous silicon (amorphous silicon).

[2] In the method for manufacturing an IGBT of the present invention, in the fourth step, the semiconductor substrate is formed by ion-implanting a first conductivity type impurity from the second main surface side of the semiconductor substrate at an acceleration voltage of 100 keV or less. It is preferable to introduce a first conductivity type impurity into the inside of the substrate.

  According to such a method, the first conductivity type impurity is introduced into a relatively shallow region on the second main surface side of the semiconductor substrate in the fourth step, but the second step of the semiconductor substrate in the subsequent fifth step. Since the semiconductor layer is formed on the surface on the main surface side, as a result, the buffer layer can be formed at a deep position on the second main surface side of the semiconductor substrate.

[3] In the method of manufacturing an IGBT of the present invention, in the fourth step, a step of applying a solution containing a first conductivity type impurity to the surface on the second main surface side of the semiconductor substrate; It is preferable to include a step of irradiating laser light from the two principal surface sides and introducing a first conductivity type impurity into the semiconductor substrate in this order.

Even by such a method, the first conductivity type impurity is introduced into a relatively shallow region on the second main surface side of the semiconductor substrate in the fourth step, but in the subsequent fifth step, the second main impurity of the semiconductor substrate is introduced. Since the semiconductor layer is formed on the surface side surface, it is possible to form the buffer layer at a deep position on the second main surface side of the semiconductor substrate as a result.
Further, by adopting such a method, the first conductivity type impurity can be introduced into the semiconductor substrate without using an ion implantation apparatus, and an IGBT can be manufactured at a much lower manufacturing cost. It becomes possible.

[4] In the IGBT manufacturing method of the present invention, in the fifth step, a semiconductor layer made of the same semiconductor material as the semiconductor material constituting the semiconductor substrate is formed on the second main surface side surface of the semiconductor substrate. A step of forming by a vapor phase method, a step of introducing a second conductivity type impurity into the semiconductor layer by ion-implanting the second conductivity type impurity from the surface side of the semiconductor layer at an acceleration voltage of 100 keV or less; Are preferably included in this order.

  As described above, the collector layer, the buffer layer, and the drift layer are respectively formed on the second main surface of the semiconductor substrate by separately forming the semiconductor layer containing the second conductivity type impurity on the surface of the semiconductor substrate on the second main surface side. A punch-through IGBT formed at a predetermined depth on the side can be manufactured.

[5] In the IGBT manufacturing method of the present invention, in the fifth step, a semiconductor layer made of the same semiconductor material as the semiconductor material constituting the semiconductor substrate is formed on the surface on the second main surface side of the semiconductor substrate. A step of forming by a vapor phase method and a step of introducing a second conductivity type impurity into the surface of the semiconductor layer by applying a solution containing the second conductivity type impurity to the surface of the semiconductor layer in this order are included. It is preferable.

Also with this method, it becomes possible to separately form a semiconductor layer containing the second conductivity type impurity on the surface on the second main surface side of the semiconductor substrate. As a result, the collector layer, the buffer layer In addition, it is possible to manufacture a punch-through type IGBT in which the drift layer is formed at a predetermined depth on the second main surface side of the semiconductor substrate.
Further, by adopting such a method, the semiconductor layer described above can be formed without using an ion implantation apparatus, and an IGBT can be manufactured at a much lower manufacturing cost.

[6] In the method of manufacturing an IGBT of the present invention, the fifth step includes a semiconductor material that is the same as a semiconductor material constituting the semiconductor substrate on a surface on the second main surface side of the semiconductor substrate. The method preferably includes a step of forming a semiconductor layer containing a conductive impurity by a vapor phase method.

Also with this method, it becomes possible to separately form a semiconductor layer containing the second conductivity type impurity on the surface on the second main surface side of the semiconductor substrate. As a result, the collector layer, the buffer layer In addition, it is possible to manufacture a punch-through type IGBT in which the drift layer is formed at a predetermined depth on the second main surface side of the semiconductor substrate.
Further, by adopting such a method, the semiconductor layer described above can be formed without using an ion implantation apparatus, and an IGBT can be manufactured at a much lower manufacturing cost.

[7] In the method for manufacturing an IGBT of the present invention, in the fifth step, it is preferable that the semiconductor layer is formed to a thickness of 0.1 μm to 5 μm.

  Here, the thickness of the semiconductor layer is set to 0.1 μm or more, and when the thickness of the semiconductor layer is less than 0.1 μm, it becomes difficult to form a collector layer having stable characteristics. Because there are cases. On the other hand, the thickness of the semiconductor layer is set to 5 μm or less because when the thickness of the semiconductor layer exceeds 5 μm, it may be difficult to manufacture an IGBT with low on-resistance. From these viewpoints, in the fifth step, it is more preferable to form the semiconductor layer with a thickness of 0.2 μm to 4 μm.

[8] In the method for manufacturing an IGBT of the present invention, it is preferable that the semiconductor substrate is a silicon substrate, and the semiconductor layer is a polycrystalline silicon layer.

  By adopting such a method, it becomes possible to manufacture a silicon-based IGBT. In addition, since the polycrystalline silicon layer has an uneven surface (for example, a non-ground surface), the absorption efficiency of the laser light is improved by reducing the reflectance of the laser light irradiated in the sixth step, and more Laser light can be irradiated using a low-power laser device.

  The collector layer only needs to inject a small number of carriers of the second conductivity type (minority carriers) sufficient to cause conductivity modulation when the switch is turned on, so that the semiconductor layer described above is made of polycrystalline silicon. There is no problem.

[9] In the IGBT manufacturing method of the present invention, in the sixth step, it is preferable to irradiate a laser beam using a green laser having an output of 10 W or less.

  Since the green laser has a high light absorptance with respect to a semiconductor material made of Si, SiC, etc., the above-described method facilitates control when the semiconductor layer is melted. Therefore, the second conductivity type impurity can be activated without evaporating the semiconductor layer itself. In addition, the sixth step can be performed using a relatively low power laser device. Laser light irradiation conditions such as laser light power, beam diameter, aperture angle, and irradiation method (pulse or continuous) are conditions that can activate the second conductivity type impurities without evaporating the semiconductor layer itself. To do.

[10] In the IGBT manufacturing method of the present invention, the first conductivity type impurity is activated by performing a heat treatment of the semiconductor substrate at a temperature of 500 ° C. or less between the fourth step and the sixth step. It is preferable to further include a step.

  In the IGBT manufacturing method of the present invention, when the sixth step is carried out, it is possible to activate the first conductivity type impurity introduced into the semiconductor substrate during the fourth step. As described above, if the semiconductor device further includes a step of activating the first conductivity type impurity by performing a heat treatment of the semiconductor substrate at a temperature of 500 ° C. or less between the fourth step and the sixth step. One conductivity type impurity can be activated.

  The reason why the semiconductor substrate is heat-treated at a temperature of 500 ° C. or lower is that the MOS formed on the first main surface side of the semiconductor substrate when the semiconductor substrate is heat-treated at a temperature exceeding 500 ° C. This is because the structure and structures such as aluminum electrodes may be damaged.

[11] The IGBT of the present invention is a punch-through type IGBT, which is a semiconductor substrate containing a first conductivity type impurity, and the semiconductor substrate is ground and polished from the second main surface side of the semiconductor substrate. A drift region made of a semiconductor substrate, a MOS structure formed on the first main surface side of the semiconductor substrate, and a buffer containing a first conductivity type impurity introduced from the second main surface side of the semiconductor substrate A semiconductor layer made of the same semiconductor material as the semiconductor material constituting the semiconductor substrate, the semiconductor layer containing a second conductivity type impurity, formed on a surface of the semiconductor substrate on the second main surface side And a collector layer composed of layers.

  According to the IGBT of the present invention, it is possible to provide an IGBT having a lower on-resistance than a conventional IGBT and having a low manufacturing cost.

FIG. 3 is a view for explaining the method for manufacturing the IGBT according to the first embodiment. It is a figure which shows the impurity concentration distribution of the depth direction in IGBT100 which concerns on Embodiment 1. FIG. It is a figure shown in order to demonstrate the manufacturing method of IGBT which concerns on Embodiment 2. FIG. It is a figure shown in order to demonstrate the manufacturing method of IGBT which concerns on Embodiment 3. FIG. It is a figure shown in order to demonstrate the manufacturing method of IGBT which concerns on Embodiment 4. FIG. It is a figure shown in order to demonstrate the manufacturing method of IGBT which concerns on Embodiment 5. FIG. FIG. 10 is a diagram illustrating an impurity concentration distribution in a depth direction in the IGBT 102 according to the fifth embodiment. It is a figure shown in order to demonstrate the manufacturing method of IGBT which concerns on Embodiment 6. FIG. It is a figure shown in order to demonstrate the manufacturing method of the conventional IGBT. It is a figure shown in order to demonstrate the other conventional manufacturing method of IGBT.

  Hereinafter, the manufacturing method and IGBT of IGBT of this invention are demonstrated based on embodiment shown to a figure.

[Embodiment 1]
FIG. 1 is a diagram illustrating a method for manufacturing the IGBT according to the first embodiment. Fig.1 (a)-FIG.1 (h) are each process drawing. FIG. 2 is a diagram illustrating an impurity concentration distribution in the depth direction in the IGBT 100 according to the first embodiment. In FIG. 2, the horizontal axis indicates the distance from the interface between the n ⁺ -type silicon layer 114 and the p ⁺ -type silicon layer 116, and the direction in which the depth increases is positive, and the direction in which the depth decreases is negative.

The IGBT manufacturing method according to the first embodiment is an IGBT manufacturing method for manufacturing a punch-through type IGBT 100 as shown in FIG. Then, a first step (see FIG. 1A) for preparing the n ⁻ -type silicon substrate 112 and a second step (FIG. 1) for forming the MOS structure 120 on the surface of the n ⁻ -type silicon substrate 112 on the first main surface side. 1 and (b) refer), n ^-. n from the second main surface side of -type silicon substrate 112 ^- type silicon substrate 112 is ground and polished to n ^- third step of thinning type silicon substrate 112 (FIG. 1 ( and c) the reference), n ^-. n from the second main surface side of -type silicon substrate 112 ^-. a fourth step of introducing an n-type impurity inside the -type silicon substrate 112 (see FIG. 1 (d)), n ^A fifth step (see FIGS. 1E and 1F) of forming a polycrystalline silicon layer 116 ″ containing a p-type impurity on the surface of the −type silicon substrate 112 on the second main surface side; , n ^- it is irradiated with laser light from the second main surface side of -type silicon substrate 112 polycrystalline sheet Sixth step of melting the con layer 116 '(see FIG. 1 (g).) And, ^{p +} forming a collector electrode 134 on the surface of the -type silicon layer 116 (see FIG. 1 (h).) And the sequence Including.

In FIG. 1, reference numeral 114 ′ indicates an n-type impurity introduction layer, reference numeral 116 ′ indicates a polycrystalline silicon layer before the p-type impurity is introduced, reference numeral 116 indicates a p ⁺ -type silicon layer, 122 indicates a p-type base region, 124 indicates an n ⁺ -type emitter region, 126 indicates a gate insulating film, 128 indicates a gate electrode, 130 indicates an interlayer insulating film, and 132 indicates an emitter. The electrode is shown. Hereinafter, each process is demonstrated one by one.

(1) First Step The first step is a step of preparing an n ⁻ type silicon substrate 112 (see FIG. 1A). The impurity concentration of the n ⁻ type silicon substrate 112 is, for example, 1 × 10 ¹⁴ cm ⁻³ . The thickness of the n ⁻ type silicon substrate 112 is, for example, 500 μm.

(2) Second Step The second step is a step of forming the MOS structure 120 on the first main surface side surface of the n ⁻ type silicon substrate 112 (see FIG. 1B). The MOS structure 120 is formed as follows, for example. That, n ^- the p-type base region 122 is formed in the first main surface side surface of the type silicon substrate 112 to form indicates 124 an ^{n +} -type emitter region in a surface of the p-type base layer, then, n ^- -type After the first main surface side surface of the silicon substrate 112 is cleaned, a silicon thermal oxide film is formed by a thermal oxidation method to form, for example, a polycrystalline silicon layer doped with an n-type impurity at a high concentration. Thereafter, a gate electrode 128 is formed from the polycrystalline silicon layer by a photographic process, and a gate insulating film 126 is formed from a silicon thermal oxide film. Thereafter, an interlayer insulating film 130 made of a silicon oxide film is formed, then an emitter electrode 132 made of aluminum is formed, and a protective insulating film (not shown) made of polyimide is formed.

(3) Third Step The third step is, n ^- the second main surface side of -type silicon substrate 112 n ^- type silicon substrate 112 is ground and polished to n ^- a step of thinning type silicon substrate 912 (FIG. 1 (c)). Thereby, the thickness of the n ⁻ type silicon substrate 912 becomes, for example, 70 μm.

(4) Fourth Step The fourth step, n ^- the second main surface side of -type silicon substrate 112 n ^- inside the -type silicon substrate 112 is a step of introducing an n-type impurity (FIG. 1 (d) see. ).
In the fourth step, n-type impurities (for example, phosphorus ions) are ion-implanted (dose amount: for example, 1 × 10 ¹² cm) from the second main surface side of the n ⁻ -type silicon substrate 112 with an acceleration voltage of 100 keV or less (for example, 30 keV). ⁻² to 1 × 10 ¹⁴ cm ⁻² ) to introduce n-type impurities into the n ⁻ -type silicon substrate 112.

(5) Fifth Step The fifth step is a step of forming a polycrystalline silicon layer 116 ″ containing a p-type impurity on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side (FIG. 1 ( e) and FIG. 1 (f)).
In the fifth step, a non-doped polycrystalline silicon layer 116 ′ is formed on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side by a vapor phase method (for example, a sputtering method), and then accelerated to 100 keV or less. P-type impurities (for example, boron ions) are ion-implanted (dose amount: for example, 2 × 10 ¹³ cm ⁻² to 2 × 10 ¹⁵ cm ⁻² ) from the surface side of the polycrystalline silicon layer 116 ′ with a voltage (for example, 30 keV). Thus, a p-type impurity is introduced into the polycrystalline silicon layer 116 ′, and a polycrystalline silicon layer 116 ″ containing the p-type impurity is formed on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side. The thickness of the polycrystalline silicon layer 116 ′ is, for example, 1 μm as shown in FIG.

(6) Sixth Step The sixth step is a step of melting the polycrystalline silicon layer 116 ″ by irradiating laser light from the second main surface side of the n ⁻ -type silicon substrate 112 (see FIG. 1G). ).
As the laser light, a visible light laser (for example, a green laser having a wavelength of 532 nm) is used. For example, a beam having a diameter of 100 μm, for example, pulsed at 30 kHz is scanned over the entire surface of the n ⁻ -type silicon substrate 112 on the second main surface side at a speed of 300 mm / second.
As a result, the polycrystalline silicon layer 116 ″ is melted and the crystal grains thereof become large crystallized, and the p-type impurity is activated, so that the polycrystalline silicon layer 116 ″ becomes the p ⁺ -type silicon layer 116 (collector layer). Further, the n-type impurity in the n-type impurity introduction layer 114 ′ is also activated, and the n-type impurity introduction layer 114 ′ becomes an n + -type silicon layer (buffer layer).

(7) Seventh Step The seventh step is a step of forming the collector electrode 134 on the surface of the p ⁺ -type silicon layer 116 (see FIG. 1H).
As shown in FIG. 1H, the collector electrode 134 is formed on the surface of the p ⁺ -type silicon layer 116, thereby completing the punch-through type IGBT (the IGBT 100 according to the first embodiment).

That, IGBT100 according to the first embodiment, as shown in FIG. 1 (h), a punch-through type IGBT, n ^- type silicon substrate 112 ^- the n from the second main surface side of -type silicon substrate 112 n obtained by grinding and polishing ^- a drift region consisting of -type silicon substrate 112, n ^- and MOS structure 120 formed on the first main surface side of -type silicon substrate, n ^- second main surface of -type silicon substrate 112 A buffer layer composed of an n ⁻ type silicon layer 114 containing an n type impurity introduced from the side, and a p ⁺ type silicon layer 116 formed on the surface on the second main surface side of the n ⁻ type silicon substrate. An IGBT including a collector layer.

In the obtained IGBT manufacturing method (the IGBT manufacturing method 100 according to Embodiment 1), as shown in FIG. 2, the thickness of the polycrystalline silicon layer 116 ′ (collector layer) is, for example, 1 μm. The maximum impurity concentration of the p-type impurity in the polycrystalline silicon layer 116 ′ (collector layer) is, for example, 2 × 10 ¹⁹ cm ⁻³ . Further, the maximum impurity concentration of the n-type impurity in the buffer layer is, for example, 1 × 10 ¹⁸ cm ⁻³ , and the depth indicating the maximum impurity concentration of the n-type impurity is, for example, 1.1 μm from the surface of the polycrystalline silicon layer 116 ′. It is.

According to the manufacturing method of the IGBT according to the first embodiment including the step as described above, n ^- after performing the third step of thinning type silicon substrate 112, "n ^- second main surface side of -type silicon substrate 112 from the n ^- inside of -type silicon substrate 112 and a fourth step "of introducing an n-type impurity," the n ^- on the surface of the second main surface side of -type silicon substrate 112, a polycrystalline silicon layer containing a p-type impurity 116 ”and“ sixth step of irradiating laser light from the second main surface side of n ⁻ -type silicon substrate 112 to melt polycrystalline silicon layer 116 ″ ”in this order. By doing so, it is possible to manufacture a punch-through type IGBT in which the collector layer, the buffer layer, and the drift layer are each formed at a predetermined depth on the second main surface side of the n ⁻ type silicon substrate 112.

Further, according to the manufacturing method of the IGBT according to the embodiment 1, n ^- after performing the third step of thinning type silicon substrate 112, "n ^- n from the second main surface side of -type silicon substrate 112 ^- -type silicon "Fourth step of introducing n-type impurity into substrate 112" and "Polycrystalline silicon layer 116 containing p-type impurity is formed on the surface of the second main surface side of n ^- type silicon substrate 112". By performing the “fifth step” and the “sixth step in which the polycrystalline silicon layer 116” is melted by irradiating laser light from the second main surface side of the n ⁻ -type silicon substrate 112 ”in this order, Since a through-type IGBT is to be manufactured, it is necessary to precisely control the thickness of the n ⁺ -type epitaxial layer and the n ⁻ -type epitaxial layer as in the conventional IGBT manufacturing method. There is no need to “grind and polish”. For this reason, according to the IGBT manufacturing method according to the first embodiment, the collector layer can be made to have a thickness of 10 μm or less, and an IGBT having a lower on-resistance than the IGBT manufactured by the conventional IGBT manufacturing method can be obtained. It can be manufactured.

According to the manufacturing method of the IGBT of the present invention, n ^- after performing the third step of thinning type silicon substrate 112, "n ^- n from the second main surface side of -type silicon substrate 112 ^- -type silicon substrate 112 A fourth step of introducing an n-type impurity into the substrate, and “a fifth step of forming a polycrystalline silicon layer 116 containing a p-type impurity on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side”. By performing the “step” and the “sixth step in which the polycrystalline silicon layer 116 ″ is melted by irradiating laser light from the second main surface side of the n ⁻ -type silicon substrate 112” in this order, for you are to produce the IGBT, the "n ^{- -} n from the second main surface side of -type silicon substrate 112 fourth step of introducing an n-type impurity inside the -type silicon substrate 112" is, n ^- -type silicon Substrate 112 Necessary to introduce an n-type impurity at a deep position in the second main surface side is eliminated. For this reason, according to the manufacturing method of IGBT which concerns on Embodiment 1, it becomes unnecessary to use the ion implantation apparatus of the high acceleration voltage which can apply the acceleration voltage of several hundred keV-several MeV, Compared with the other conventional manufacturing methods of IGBT. This is a method for manufacturing an IGBT capable of reducing the manufacturing cost.

  As a result, the IGBT manufacturing method according to the first embodiment includes an IGBT manufacturing method capable of manufacturing an IGBT having a lower on-resistance than an IGBT manufactured by the conventional IGBT manufacturing method at a low manufacturing cost. Become.

Further, according to the IGBT manufacturing method according to the first embodiment, in the fourth step, n-type impurities are ion-implanted from the second main surface side of the n ⁻ -type silicon substrate 112 at an acceleration voltage of 100 keV or less, n ^- because you are introducing n-type impurities into the interior of -type silicon substrate 112, n in the fourth step ^- the n-type impurity is introduced into the relatively shallow region in the second main surface side of -type silicon substrate 112 However, since the polycrystalline silicon layer is formed on the surface of the n ⁻ type silicon substrate 112 on the second main surface side in the subsequent fifth step, as a result, the second main surface side of the n ⁻ type silicon substrate 112 is obtained. A buffer layer can be formed at a deep position in FIG.

In addition, according to the method for manufacturing the IGBT according to the first embodiment, the step of forming the polycrystalline silicon layer 116 ′ on the second main surface side surface of the n ⁻ -type silicon substrate 112 by the vapor phase method (for example, sputtering method). And a step of introducing p-type impurities into the polycrystalline silicon layer 116 ′ in this order by ion-implanting p-type impurities from the surface side of the polycrystalline silicon layer 116 ′ at an acceleration voltage of 100 keV or less. By performing the fifth step, it becomes possible to separately separately form a polycrystalline silicon layer 116 ″ containing a p-type impurity on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side, It is possible to manufacture a punch-through type IGBT in which the buffer layer and the drift layer are each formed at a predetermined depth on the second main surface side of the n ⁻ type silicon substrate 112.

  Further, according to the IGBT manufacturing method according to the first embodiment, in the fifth step, since the polycrystalline silicon layer 116 ′ is formed to a thickness of 100 nm to 800 nm, a collector layer having stable characteristics is formed. As a result, it is possible to manufacture an IGBT having a low on-resistance.

Further, according to the IGBT manufacturing method according to the first embodiment, since the n ⁻ type silicon substrate 112 is used as the semiconductor substrate and the polycrystalline silicon layer 116 ′ is used as the semiconductor layer, it is possible to manufacture a silicon-based IGBT. It becomes. In addition, since the polycrystalline silicon layer 116 ″ has an uneven surface, the absorption efficiency of the laser beam is improved by reducing the reflectance of the laser beam irradiated in the sixth step, and a lower power laser device is obtained. It becomes possible to irradiate with laser light.

  Further, according to the IGBT manufacturing method according to the first embodiment, in the sixth step, since the laser beam is irradiated using a green laser having an output of 10 W or less, the polycrystalline silicon layer 116 ″ is melted. Therefore, the p-type impurity can be activated without evaporating the polycrystalline silicon layer 116 ″ itself.

[Embodiment 2]
FIG. 3 is a diagram illustrating a method of manufacturing the IGBT according to the second embodiment. 3A to 3H are process diagrams.

The manufacturing method of the IGBT according to the second embodiment basically includes the same steps as the manufacturing method of the IGBT according to the first embodiment, but the content of the fourth step is the case of the manufacturing method of the IGBT according to the first embodiment. Is different. That is, in the IGBT manufacturing method according to the second embodiment, as shown in FIG. 3 (particularly FIG. 3D), in the fourth step, the surface on the second main surface side of the n ⁻ -type silicon substrate 112 is formed. a step of applying a solution containing an n-type impurity, n ^- is irradiated with laser light from the second main surface side of -type silicon substrate 112 n ^- inside the -type silicon substrate 112 and a step of introducing an n-type impurity this We are going to carry out in order.

In the IGBT manufacturing method according to the second embodiment, as in the case of the IGBT manufacturing method according to the first embodiment, an n ^- type is formed in a relatively shallow region on the second main surface side of the n ⁻ -type silicon substrate 112 in the fourth step. As in the case of the IGBT manufacturing method according to the first embodiment, polycrystalline silicon is formed on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side in the subsequent fifth step. Since the layer 116 ′ is formed, as a result, it is possible to form a buffer layer at a deep position on the second main surface side of the n ⁻ -type silicon substrate 112.
Further, according to the IGBT manufacturing method according to the second embodiment, it is possible to introduce n-type impurities into the n ⁻ -type silicon substrate 112 without using an ion implantation apparatus, and at a much lower manufacturing cost. An IGBT can be manufactured.

  In the IGBT manufacturing method according to the second embodiment, as the solution containing n-type impurities, for example, a liquid in which a phosphorus compound (for example, pyrophosphoric acid) is dissolved in an organic solvent (for example, ethanol) is preferable. Can be used. As a coating method, known methods such as a dipping method, a spinner method, a spray method, and a brush coating method can be used.

[Embodiment 3]
FIG. 4 is a diagram illustrating a method of manufacturing the IGBT according to the third embodiment. FIG. 4A to FIG. 4H are process diagrams.

The manufacturing method of the IGBT according to the third embodiment basically includes the same steps as the manufacturing method of the IGBT according to the first embodiment, but the content of the fifth step is the case of the manufacturing method of the IGBT according to the first embodiment. Is different. That is, in the IGBT manufacturing method according to the third embodiment, as shown in FIG. 4 (particularly, FIGS. 4E and 4F), the second step of the n ⁻ type silicon substrate 112 is performed in the fifth step. A step of forming a polycrystalline silicon layer 116 ′ on the main surface side by a vapor phase method and a step of applying a solution containing a p-type impurity to the surface of the polycrystalline silicon layer 116 ′ are performed in this order. It is said.

Even in the IGBT manufacturing method according to the third embodiment having the above-described steps, as in the case of the IGBT manufacturing method according to the first embodiment, the n ⁻ type silicon substrate 112 has a surface on the second main surface side. , A polycrystalline silicon layer 116 ″ containing a p-type impurity can be separately formed later. As a result, a collector layer, a buffer layer, and a drift layer are respectively provided on the second main surface side of the n ⁻ -type silicon substrate 112. It is possible to manufacture a punch-through type IGBT formed to a depth of 5 mm.
Further, according to the IGBT manufacturing method according to the third embodiment, it is possible to form the above-described polycrystalline silicon layer 116 ″ without using an ion implantation apparatus, and to manufacture the IGBT at a much lower manufacturing cost. It becomes possible.

  In the IGBT manufacturing method according to the third embodiment, as the solution containing the p-type impurity, for example, a liquid obtained by dissolving a boron compound (for example, triethoxyboron) in an organic solvent (for example, ethanol) or the like. It can be preferably used. As a coating method, known methods such as a dipping method, a spinner method, a spray method, and a brush coating method can be used.

[Embodiment 4]
FIG. 5 is a diagram illustrating a method of manufacturing the IGBT according to the fourth embodiment. Fig.5 (a)-FIG.5 (h) are each process drawing.

The manufacturing method of the IGBT according to the fourth embodiment basically includes the same steps as the manufacturing method of the IGBT according to the first embodiment, but the contents of the fourth step and the fifth step are the manufacturing steps of the IGBT according to the first embodiment. It is different from the method. That is, in the IGBT manufacturing method according to the fourth embodiment, as shown in FIG. 5 (particularly, FIG. 5D), in the fourth step, the surface on the second main surface side of the n ⁻ -type silicon substrate 112 is formed. a step of applying a solution containing an n-type impurity, n ^- is irradiated with laser light from the second main surface side of -type silicon substrate 112 n ^- inside the -type silicon substrate 112 and a step of introducing an n-type impurity this In the fifth step, polycrystal is formed on the surface of the n ⁻ -type silicon substrate 112 on the second main surface side as shown in FIG. 5 (particularly FIGS. 5 (e) and 5 (f)). A step of forming the silicon layer 116 ′ by a vapor phase method and a step of applying a solution containing a p-type impurity to the surface of the polycrystalline silicon layer 116 ′ are performed in this order.

Also in the IGBT manufacturing method according to the fourth embodiment having the above-described steps, the collector layer, the buffer layer, and the drift layer are each made of n ⁻ -type silicon, as in the case of the IGBT manufacturing method according to the first to third embodiments. A punch-through IGBT formed at a predetermined depth on the second main surface side of the substrate 112 can be manufactured.

[Embodiment 5]
FIG. 6 is a diagram illustrating a method of manufacturing the IGBT according to the fifth embodiment. FIG. 6A to FIG. 6H are process diagrams. FIG. 7 is a diagram showing an impurity concentration distribution in the depth direction in the IGBT 100d according to the fifth embodiment. In FIG. 7, the horizontal axis indicates the distance from the interface between the n ⁺ -type silicon layer 114 and the p ⁺ -type silicon layer 116, and the direction in which the depth increases is positive, and the direction in which the depth decreases is negative.

The manufacturing method of the IGBT according to the fifth embodiment basically includes the same steps as the manufacturing method of the IGBT according to the first embodiment, but the content of the fifth step is the case of the manufacturing method of the IGBT according to the first embodiment. Is different. That is, in the IGBT manufacturing method according to the fifth embodiment, as shown in FIG. 6 (particularly, FIG. 6E), in the fifth step, on the surface of the n ⁻ type silicon substrate 112 on the second main surface side. , A step of forming a polycrystalline silicon layer 116 ″ containing a p-type impurity by a vapor phase method (for example, sputtering method) is performed.

Also in the IGBT manufacturing method according to the fifth embodiment having the above-described steps, as in the case of the IGBT manufacturing method according to the first embodiment, the n ⁻ type silicon substrate 112 has a surface on the second main surface side. A polycrystalline silicon layer 116 ″ containing a p-type impurity can be separately formed later. As a result, a collector layer, a buffer layer, and a drift layer are respectively provided on the second main surface side of the n ⁻ -type silicon substrate 112 at a predetermined level. It is possible to manufacture a punch-through IGBT formed to a depth.

  Further, according to the IGBT manufacturing method according to the fifth embodiment, it is possible to form the above-described polycrystalline silicon layer 116 ″ without using an ion implantation apparatus, and to manufacture the IGBT at a much lower manufacturing cost. It becomes possible.

  Further, according to the IGBT manufacturing method according to the fifth embodiment, as shown in FIG. 7, the p-type impurity is more uniformly distributed along the depth direction of the collector layer than in the case of the IGBT manufacturing method according to the first embodiment. Therefore, an IGBT having a relatively thick collector layer having a thickness of 1 μm to 10 μm can be easily manufactured.

  As mentioned above, although this invention was demonstrated based on said embodiment, this invention is not limited to this, It can implement in the range which does not deviate from the summary, For example, the following deformation | transformation is possible. Is also possible.

(1) In Embodiment 5 described above, the fourth step is performed using an ion implantation apparatus, but the present invention is not limited to this. FIG. 8 is a diagram illustrating a method for manufacturing an IGBT according to a modification. FIG. 8A to FIG. 8H are process diagrams. For example, as shown in FIG. 8, the fourth step may be performed without using an ion implantation apparatus, as in the case of the second or fourth embodiment.

(2) In Embodiment 1 described above, when the sixth step is performed, the n-type impurity introduced into the semiconductor substrate during the fourth step is activated, but the present invention is limited to this. Is not to be done. For example, the n-type impurity may be activated by performing heat treatment of the semiconductor substrate at a temperature of 500 ° C. or less between the fourth step and the sixth step.

(3) In each of the above embodiments, the semiconductor device of the present invention has been described with the first conductivity type as n-type and the second conductivity type as p-type. However, the present invention is not limited to this. For example, the first conductivity type may be p-type and the second conductivity type may be n-type.

100, 100a, 100b, 100c, 100d, 100e, 800, 900 ... IGBT, 112, 912 ... n ^- type silicon substrate, 114, 914 ... n ⁺ type silicon layer, 114 ', 914' ... n-type impurity introduction layer, 116,816,916 ... p ⁺ type silicon layer, 116 ', 116 "... polycrystalline silicon layer, 120,820,920 ... MOS structure, 122,822,922 ... p type base region, 124,824,924 ... n ⁺ Type emitter region, 126, 826, 926 ... gate insulating film, 128, 828, 928 ... gate electrode, 130, 830, 930 ... interlayer insulating film, 132, 832, 932 ... emitter electrode, 134, 834, 934 ... collector Electrode, 140 ... n-type impurity coating layer, 142 ... p-type impurity coating layer, 810 ... epitaxial substrate, 814 ... n ⁺ Type epitaxial layer, 812... N ⁻ type epitaxial layer, 916 ′... P type impurity introduction layer

Claims (7)

An IGBT manufacturing method for manufacturing a punch-through type IGBT,
A first step of preparing a semiconductor substrate containing a first conductivity type impurity;
A second step of forming a MOS structure on the first main surface side surface of the semiconductor substrate;
A third step of thinning the semiconductor substrate by grinding and polishing the semiconductor substrate from the second main surface side of the semiconductor substrate;
A fourth step of introducing a first conductivity type impurity into the semiconductor substrate from the second main surface side of the semiconductor substrate;
A semiconductor made of the same semiconductor material as that constituting the semiconductor substrate on the second main surface side surface of the semiconductor substrate and containing a second conductivity type impurity having a conductivity type opposite to the first conductivity type impurity. A fifth step of forming a layer;
A sixth step of irradiating laser light from the second main surface side of the semiconductor substrate to melt the semiconductor layer in this order,
The fifth step includes
A non-doped semiconductor layer made of the same semiconductor material as that constituting the semiconductor substrate is formed by a vapor phase method on the surface of the semiconductor substrate on the second main surface side where the first conductivity type impurity is introduced. And a step of introducing a second conductivity type impurity into the inside of the non-doped semiconductor layer by ion-implanting the second conductivity type impurity from the surface side of the non-doped semiconductor layer at an acceleration voltage of 100 keV or less. 5th step including in order,
A non-doped semiconductor layer made of the same semiconductor material as that constituting the semiconductor substrate is formed by a vapor phase method on the surface of the semiconductor substrate on the second main surface side where the first conductivity type impurity is introduced. And a step of introducing a second conductivity type impurity into the surface of the non-doped semiconductor layer by applying a solution containing the second conductivity type impurity to the surface of the non-doped semiconductor layer in this order. Process, or
A semiconductor layer made of the same semiconductor material as the semiconductor material constituting the semiconductor substrate and containing the second conductivity type impurity on the surface of the semiconductor substrate on the second main surface side where the first conductivity type impurity is introduced. A method for manufacturing an IGBT, which is any one of a fifth step including a step of forming a layer by a vapor phase method. In the manufacturing method of IGBT of Claim 1,
In the fourth step, the first conductivity type impurity is introduced into the semiconductor substrate by ion-implanting the first conductivity type impurity from the second main surface side of the semiconductor substrate at an acceleration voltage of 100 keV or less. The manufacturing method of IGBT characterized by these. In the manufacturing method of IGBT of Claim 1,
In the fourth step, a step of applying a solution containing a first conductivity type impurity to the surface on the second main surface side of the semiconductor substrate;
And a step of irradiating a laser beam from the second main surface side of the semiconductor substrate to introduce a first conductivity type impurity into the semiconductor substrate in this order. In the manufacturing method of IGBT in any one of Claims 1-3,
In the fifth step, the semiconductor layer is formed to a thickness of 0.1 μm to 5 μm. In the manufacturing method of IGBT in any one of Claims 1-4,
The method for manufacturing an IGBT, wherein the semiconductor substrate is a silicon substrate, and the semiconductor layer is a polycrystalline silicon layer. In the manufacturing method of IGBT in any one of Claims 1-5,
In the sixth step, a laser beam is irradiated using a green laser having an output of 10 W or less. In the manufacturing method of IGBT in any one of Claims 1-6,
A method of manufacturing an IGBT, further comprising a step of activating the first conductivity type impurity by performing a heat treatment of the semiconductor substrate at a temperature of 500 ° C. or less between the fourth step and the sixth step. .

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