SG11201505244YA - Back gate in select transistor for edram - Google Patents
Back gate in select transistor for edramInfo
- Publication number
- SG11201505244YA SG11201505244YA SG11201505244YA SG11201505244YA SG11201505244YA SG 11201505244Y A SG11201505244Y A SG 11201505244YA SG 11201505244Y A SG11201505244Y A SG 11201505244YA SG 11201505244Y A SG11201505244Y A SG 11201505244YA SG 11201505244Y A SG11201505244Y A SG 11201505244YA
- Authority
- SG
- Singapore
- Prior art keywords
- edram
- select transistor
- back gate
- gate
- transistor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1350547A FR3001333B1 (fr) | 2013-01-22 | 2013-01-22 | Grille arriere dans transistor de selection pour dram embarquee |
PCT/EP2013/076414 WO2014114406A1 (en) | 2013-01-22 | 2013-12-12 | Back gate in select transistor for edram |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201505244YA true SG11201505244YA (en) | 2015-08-28 |
Family
ID=48613740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201505244YA SG11201505244YA (en) | 2013-01-22 | 2013-12-12 | Back gate in select transistor for edram |
Country Status (6)
Country | Link |
---|---|
US (1) | US9472469B2 (zh) |
KR (1) | KR102148914B1 (zh) |
CN (1) | CN104995729B (zh) |
FR (1) | FR3001333B1 (zh) |
SG (1) | SG11201505244YA (zh) |
WO (1) | WO2014114406A1 (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019066854A1 (en) * | 2017-09-28 | 2019-04-04 | Intel Corporation | DYNAMIC HEAVY MEMORY INCLUDING A THRESHOLD SWITCH |
CN109741777A (zh) * | 2018-12-28 | 2019-05-10 | 上海新储集成电路有限公司 | 一种提高速度和保持数据时间的存储器 |
CN116206643B (zh) * | 2022-07-25 | 2024-03-15 | 北京超弦存储器研究院 | 动态随机存储单元、存储器、存储装置及读取方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6037199A (en) * | 1999-08-16 | 2000-03-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | SOI device for DRAM cells beyond gigabit generation and method for making the same |
DE19954867C1 (de) * | 1999-11-15 | 2000-12-07 | Infineon Technologies Ag | DRAM-Zellenanordnung und Verfahren zu deren Herstellung |
US6441436B1 (en) * | 2000-11-29 | 2002-08-27 | United Microelectronics Corp. | SOI device and method of fabrication |
US6710391B2 (en) * | 2002-06-26 | 2004-03-23 | Texas Instruments Incorporated | Integrated DRAM process/structure using contact pillars |
KR101415509B1 (ko) * | 2008-07-24 | 2014-07-04 | 삼성전자주식회사 | 메모리 소자, 그 제조 방법 및 동작 방법 |
FR2953636B1 (fr) * | 2009-12-08 | 2012-02-10 | Soitec Silicon On Insulator | Procede de commande d'une cellule memoire dram sur seoi disposant d'une seconde grille de controle enterree sous la couche isolante |
-
2013
- 2013-01-22 FR FR1350547A patent/FR3001333B1/fr active Active
- 2013-12-12 CN CN201380070597.0A patent/CN104995729B/zh active Active
- 2013-12-12 SG SG11201505244YA patent/SG11201505244YA/en unknown
- 2013-12-12 WO PCT/EP2013/076414 patent/WO2014114406A1/en active Application Filing
- 2013-12-12 KR KR1020157018580A patent/KR102148914B1/ko active IP Right Grant
- 2013-12-12 US US14/761,471 patent/US9472469B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN104995729B (zh) | 2018-04-20 |
KR20150110514A (ko) | 2015-10-02 |
US9472469B2 (en) | 2016-10-18 |
FR3001333A1 (fr) | 2014-07-25 |
FR3001333B1 (fr) | 2016-05-06 |
CN104995729A (zh) | 2015-10-21 |
US20150357333A1 (en) | 2015-12-10 |
KR102148914B1 (ko) | 2020-08-27 |
WO2014114406A1 (en) | 2014-07-31 |
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