SG11201502119TA - Method for manufacturing soi wafer - Google Patents
Method for manufacturing soi waferInfo
- Publication number
- SG11201502119TA SG11201502119TA SG11201502119TA SG11201502119TA SG11201502119TA SG 11201502119T A SG11201502119T A SG 11201502119TA SG 11201502119T A SG11201502119T A SG 11201502119TA SG 11201502119T A SG11201502119T A SG 11201502119TA SG 11201502119T A SG11201502119T A SG 11201502119TA
- Authority
- SG
- Singapore
- Prior art keywords
- soi wafer
- manufacturing soi
- manufacturing
- wafer
- soi
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012274110A JP5780234B2 (ja) | 2012-12-14 | 2012-12-14 | Soiウェーハの製造方法 |
PCT/JP2013/006560 WO2014091670A1 (ja) | 2012-12-14 | 2013-11-07 | Soiウェーハの製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201502119TA true SG11201502119TA (en) | 2015-05-28 |
Family
ID=50933979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201502119TA SG11201502119TA (en) | 2012-12-14 | 2013-11-07 | Method for manufacturing soi wafer |
Country Status (7)
Country | Link |
---|---|
US (1) | US9337080B2 (ja) |
EP (1) | EP2887383B1 (ja) |
JP (1) | JP5780234B2 (ja) |
KR (1) | KR101901872B1 (ja) |
CN (1) | CN104885190B (ja) |
SG (1) | SG11201502119TA (ja) |
WO (1) | WO2014091670A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6437404B2 (ja) * | 2015-09-09 | 2018-12-12 | 東芝メモリ株式会社 | 半導体装置の製造方法 |
CN105702564B (zh) * | 2016-03-29 | 2018-10-16 | 上海华力微电子有限公司 | 一种改善晶圆翘曲度的方法 |
US20180019169A1 (en) * | 2016-07-12 | 2018-01-18 | QMAT, Inc. | Backing substrate stabilizing donor substrate for implant or reclamation |
US20180033609A1 (en) * | 2016-07-28 | 2018-02-01 | QMAT, Inc. | Removal of non-cleaved/non-transferred material from donor substrate |
CN106597583B (zh) * | 2016-12-30 | 2019-01-18 | 上海集成电路研发中心有限公司 | 一种形成光学分光透镜的结构和方法 |
FR3061988B1 (fr) * | 2017-01-13 | 2019-11-01 | Soitec | Procede de lissage de surface d'un substrat semiconducteur sur isolant |
FR3064398B1 (fr) * | 2017-03-21 | 2019-06-07 | Soitec | Structure de type semi-conducteur sur isolant, notamment pour un capteur d'image de type face avant, et procede de fabrication d'une telle structure |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH098124A (ja) * | 1995-06-15 | 1997-01-10 | Nippondenso Co Ltd | 絶縁分離基板及びその製造方法 |
JP3395661B2 (ja) * | 1998-07-07 | 2003-04-14 | 信越半導体株式会社 | Soiウエーハの製造方法 |
JP2002110688A (ja) * | 2000-09-29 | 2002-04-12 | Canon Inc | Soiの熱処理方法及び製造方法 |
JP2003347176A (ja) * | 2002-03-20 | 2003-12-05 | Shin Etsu Handotai Co Ltd | 貼り合わせウェーハの製造方法 |
JP4407127B2 (ja) | 2003-01-10 | 2010-02-03 | 信越半導体株式会社 | Soiウエーハの製造方法 |
WO2005027204A1 (ja) * | 2003-09-08 | 2005-03-24 | Sumco Corporation | 貼り合わせウェーハおよびその製造方法 |
EP1855309A4 (en) * | 2005-02-28 | 2010-11-17 | Shinetsu Handotai Kk | METHOD FOR PRODUCING A BONDED WAFERS AND BONDED WAFER |
JP4398934B2 (ja) * | 2005-02-28 | 2010-01-13 | 信越半導体株式会社 | Soiウエーハの製造方法 |
US20100112814A1 (en) | 2006-09-06 | 2010-05-06 | Sowmya Krishnan | Pre-certified process chamber and method |
JP5183969B2 (ja) * | 2007-05-29 | 2013-04-17 | 信越半導体株式会社 | Soiウェーハのシリコン酸化膜形成方法 |
US7763502B2 (en) * | 2007-06-22 | 2010-07-27 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device |
JP2009283582A (ja) | 2008-05-21 | 2009-12-03 | Shin Etsu Handotai Co Ltd | 貼り合わせウェーハの製造方法及び貼り合わせウェーハ |
JP5548395B2 (ja) * | 2008-06-25 | 2014-07-16 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
US8148237B2 (en) * | 2009-08-07 | 2012-04-03 | Varian Semiconductor Equipment Associates, Inc. | Pressurized treatment of substrates to enhance cleaving process |
EP2589069A2 (en) * | 2010-06-30 | 2013-05-08 | Corning Incorporated | Method for finishing silicon on insulator substrates |
JP5479304B2 (ja) * | 2010-11-10 | 2014-04-23 | 信越半導体株式会社 | シリコン単結晶ウェーハの熱酸化膜形成方法 |
-
2012
- 2012-12-14 JP JP2012274110A patent/JP5780234B2/ja active Active
-
2013
- 2013-11-07 KR KR1020157015578A patent/KR101901872B1/ko active IP Right Grant
- 2013-11-07 SG SG11201502119TA patent/SG11201502119TA/en unknown
- 2013-11-07 US US14/428,700 patent/US9337080B2/en active Active
- 2013-11-07 EP EP13863262.5A patent/EP2887383B1/en active Active
- 2013-11-07 CN CN201380064933.0A patent/CN104885190B/zh active Active
- 2013-11-07 WO PCT/JP2013/006560 patent/WO2014091670A1/ja active Application Filing
Also Published As
Publication number | Publication date |
---|---|
US9337080B2 (en) | 2016-05-10 |
CN104885190B (zh) | 2018-01-02 |
WO2014091670A1 (ja) | 2014-06-19 |
KR101901872B1 (ko) | 2018-09-28 |
EP2887383A1 (en) | 2015-06-24 |
US20150249035A1 (en) | 2015-09-03 |
JP5780234B2 (ja) | 2015-09-16 |
CN104885190A (zh) | 2015-09-02 |
JP2014120587A (ja) | 2014-06-30 |
EP2887383B1 (en) | 2020-03-25 |
KR20150093703A (ko) | 2015-08-18 |
EP2887383A4 (en) | 2016-03-30 |
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