SG10201910032WA - Wafer processing method - Google Patents

Wafer processing method

Info

Publication number
SG10201910032WA
SG10201910032WA SG10201910032WA SG10201910032WA SG10201910032WA SG 10201910032W A SG10201910032W A SG 10201910032WA SG 10201910032W A SG10201910032W A SG 10201910032WA SG 10201910032W A SG10201910032W A SG 10201910032WA SG 10201910032W A SG10201910032W A SG 10201910032WA
Authority
SG
Singapore
Prior art keywords
processing method
wafer processing
wafer
processing
Prior art date
Application number
SG10201910032WA
Other languages
English (en)
Inventor
Harada Shigenori
Matsuzawa Minoru
Kiuchi Hayato
Yodo Yoshiaki
Arakawa Taro
Agari Masamitsu
Kawamura Emiko
Fujii Yusuke
Miyai Toshiki
Ohmae Makiko
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG10201910032WA publication Critical patent/SG10201910032WA/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/38Removing material by boring or cutting
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
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    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
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    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H01L21/76894Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
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    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386Separation by peeling
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    • H01L2924/1033Gallium nitride [GaN]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Optics & Photonics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
SG10201910032WA 2018-11-06 2019-10-26 Wafer processing method SG10201910032WA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018208629A JP2020077681A (ja) 2018-11-06 2018-11-06 ウェーハの加工方法

Publications (1)

Publication Number Publication Date
SG10201910032WA true SG10201910032WA (en) 2020-06-29

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ID=70457809

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201910032WA SG10201910032WA (en) 2018-11-06 2019-10-26 Wafer processing method

Country Status (8)

Country Link
US (1) US11031234B2 (ko)
JP (1) JP2020077681A (ko)
KR (1) KR20200052831A (ko)
CN (1) CN111146115A (ko)
DE (1) DE102019217093A1 (ko)
MY (1) MY194815A (ko)
SG (1) SG10201910032WA (ko)
TW (1) TWI826569B (ko)

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Publication number Priority date Publication date Assignee Title
JP7430515B2 (ja) * 2019-11-06 2024-02-13 株式会社ディスコ ウエーハの処理方法
KR20210133787A (ko) 2020-04-29 2021-11-08 주식회사 엘지에너지솔루션 배터리 팩, 그것을 포함하는 전자 디바이스, 및 자동차

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