SE9704475L - Instruktionsavkodare - Google Patents

Instruktionsavkodare

Info

Publication number
SE9704475L
SE9704475L SE9704475A SE9704475A SE9704475L SE 9704475 L SE9704475 L SE 9704475L SE 9704475 A SE9704475 A SE 9704475A SE 9704475 A SE9704475 A SE 9704475A SE 9704475 L SE9704475 L SE 9704475L
Authority
SE
Sweden
Prior art keywords
operation code
instruction
state
translating
program instruction
Prior art date
Application number
SE9704475A
Other languages
English (en)
Other versions
SE520511C2 (sv
SE9704475D0 (sv
Inventor
Tobias Roos
Dan Halvarsson
Tomas Jonsson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9704475A priority Critical patent/SE520511C2/sv
Publication of SE9704475D0 publication Critical patent/SE9704475D0/sv
Priority to US09/201,855 priority patent/US6611909B1/en
Priority to JP2000523600A priority patent/JP2001525568A/ja
Priority to PCT/SE1998/002205 priority patent/WO1999028817A2/en
Priority to AU15810/99A priority patent/AU1581099A/en
Priority to BR9815119-3A priority patent/BR9815119A/pt
Priority to CA002313013A priority patent/CA2313013C/en
Priority to EP98960140A priority patent/EP1034472A2/en
Publication of SE9704475L publication Critical patent/SE9704475L/sv
Publication of SE520511C2 publication Critical patent/SE520511C2/sv

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3055Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/261Microinstruction address formation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30189Instruction operation extension or modification according to execution mode, e.g. mode flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30196Instruction operation extension or modification using decoder, e.g. decoder per instruction set, adaptable or programmable decoders
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Debugging And Monitoring (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
SE9704475A 1997-12-02 1997-12-02 Processor och förfarande för instruktionsavkodning SE520511C2 (sv)

Priority Applications (8)

Application Number Priority Date Filing Date Title
SE9704475A SE520511C2 (sv) 1997-12-02 1997-12-02 Processor och förfarande för instruktionsavkodning
US09/201,855 US6611909B1 (en) 1997-12-02 1998-12-01 Method and apparatus for dynamically translating program instructions to microcode instructions
JP2000523600A JP2001525568A (ja) 1997-12-02 1998-12-02 命令デコーダ
PCT/SE1998/002205 WO1999028817A2 (en) 1997-12-02 1998-12-02 An instruction decoder
AU15810/99A AU1581099A (en) 1997-12-02 1998-12-02 An instruction decoder
BR9815119-3A BR9815119A (pt) 1997-12-02 1998-12-02 Processador digital, e, processo de traduzir códigos de operação de instruções de programa para microinstruções em um processador digital
CA002313013A CA2313013C (en) 1997-12-02 1998-12-02 An instruction decoder
EP98960140A EP1034472A2 (en) 1997-12-02 1998-12-02 An instruction decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9704475A SE520511C2 (sv) 1997-12-02 1997-12-02 Processor och förfarande för instruktionsavkodning

Publications (3)

Publication Number Publication Date
SE9704475D0 SE9704475D0 (sv) 1997-12-02
SE9704475L true SE9704475L (sv) 1999-06-23
SE520511C2 SE520511C2 (sv) 2003-07-22

Family

ID=20409221

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9704475A SE520511C2 (sv) 1997-12-02 1997-12-02 Processor och förfarande för instruktionsavkodning

Country Status (8)

Country Link
US (1) US6611909B1 (sv)
EP (1) EP1034472A2 (sv)
JP (1) JP2001525568A (sv)
AU (1) AU1581099A (sv)
BR (1) BR9815119A (sv)
CA (1) CA2313013C (sv)
SE (1) SE520511C2 (sv)
WO (1) WO1999028817A2 (sv)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9336180B2 (en) 2011-04-07 2016-05-10 Via Technologies, Inc. Microprocessor that makes 64-bit general purpose registers available in MSR address space while operating in non-64-bit mode
US9645822B2 (en) 2011-04-07 2017-05-09 Via Technologies, Inc Conditional store instructions in an out-of-order execution microprocessor
US9317288B2 (en) 2011-04-07 2016-04-19 Via Technologies, Inc. Multi-core microprocessor that performs x86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline
US8880851B2 (en) * 2011-04-07 2014-11-04 Via Technologies, Inc. Microprocessor that performs X86 ISA and arm ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline
US9032189B2 (en) 2011-04-07 2015-05-12 Via Technologies, Inc. Efficient conditional ALU instruction in read-port limited register file microprocessor
US9378019B2 (en) 2011-04-07 2016-06-28 Via Technologies, Inc. Conditional load instructions in an out-of-order execution microprocessor
US9146742B2 (en) 2011-04-07 2015-09-29 Via Technologies, Inc. Heterogeneous ISA microprocessor that preserves non-ISA-specific configuration state when reset to different ISA
US9898291B2 (en) 2011-04-07 2018-02-20 Via Technologies, Inc. Microprocessor with arm and X86 instruction length decoders
US9274795B2 (en) 2011-04-07 2016-03-01 Via Technologies, Inc. Conditional non-branch instruction prediction
US8924695B2 (en) * 2011-04-07 2014-12-30 Via Technologies, Inc. Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor
EP2624126B1 (en) * 2011-04-07 2016-11-02 VIA Technologies, Inc. Efficient conditional ALU instruction in read-port limited register file microprocessor
US9292470B2 (en) 2011-04-07 2016-03-22 Via Technologies, Inc. Microprocessor that enables ARM ISA program to access 64-bit general purpose registers written by x86 ISA program
US8880857B2 (en) 2011-04-07 2014-11-04 Via Technologies, Inc. Conditional ALU instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor
US9128701B2 (en) 2011-04-07 2015-09-08 Via Technologies, Inc. Generating constant for microinstructions from modified immediate field during instruction translation
US9043580B2 (en) 2011-04-07 2015-05-26 Via Technologies, Inc. Accessing model specific registers (MSR) with different sets of distinct microinstructions for instructions of different instruction set architecture (ISA)
US9244686B2 (en) 2011-04-07 2016-01-26 Via Technologies, Inc. Microprocessor that translates conditional load/store instructions into variable number of microinstructions
US9141389B2 (en) 2011-04-07 2015-09-22 Via Technologies, Inc. Heterogeneous ISA microprocessor with shared hardware ISA registers
US9176733B2 (en) 2011-04-07 2015-11-03 Via Technologies, Inc. Load multiple and store multiple instructions in a microprocessor that emulates banked registers
US8892958B2 (en) 2012-06-15 2014-11-18 International Business Machines Corporation Dynamic hardware trace supporting multiphase operations
US9262163B2 (en) 2012-12-29 2016-02-16 Intel Corporation Real time instruction trace processors, methods, and systems
US9697074B2 (en) * 2014-12-11 2017-07-04 Internatioanl Business Machines Corporation Non-local error detection in processor systems
US10157057B2 (en) * 2016-08-01 2018-12-18 Syntel, Inc. Method and apparatus of segment flow trace analysis
JP2019095952A (ja) * 2017-11-21 2019-06-20 ソニーセミコンダクタソリューションズ株式会社 プロセッサ、情報処理装置および処理方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3522589A (en) * 1968-10-31 1970-08-04 Honeywell Inc Data processing apparatus
US3634883A (en) * 1969-11-12 1972-01-11 Honeywell Inc Microinstruction address modification and branch system
US4063310A (en) * 1973-07-25 1977-12-13 Pye Limited Sampler control system for chromatograph analytical apparatus
US3949370A (en) * 1974-06-06 1976-04-06 National Semiconductor Corporation Programmable logic array control section for data processing system
US4459666A (en) * 1979-09-24 1984-07-10 Control Data Corporation Plural microcode control memory
US4587611A (en) * 1980-09-04 1986-05-06 Amdahl Corporation Multiple module control store for use in a data processing system
US4472772A (en) * 1981-08-03 1984-09-18 Burroughs Corporation High speed microinstruction execution apparatus
US4509114A (en) * 1982-02-22 1985-04-02 International Business Machines Corporation Microword control mechanism utilizing a programmable logic array and a sequence counter
US4691278A (en) * 1984-04-23 1987-09-01 Nec Corporation Data processor executing microprograms according to a plurality of system architectures
JPS62164133A (ja) * 1986-01-16 1987-07-20 Toshiba Corp マイクロプログラム制御装置
US6253307B1 (en) 1989-05-04 2001-06-26 Texas Instruments Incorporated Data processing device with mask and status bits for selecting a set of status conditions
WO1992002883A1 (en) 1990-08-03 1992-02-20 Du Pont Pixel Systems Limited Parallel-processing systems
US5452423A (en) * 1991-06-13 1995-09-19 Chips And Technologies, Inc. Two-ROM multibyte microcode address selection method and apparatus

Also Published As

Publication number Publication date
SE520511C2 (sv) 2003-07-22
US6611909B1 (en) 2003-08-26
WO1999028817A2 (en) 1999-06-10
JP2001525568A (ja) 2001-12-11
EP1034472A2 (en) 2000-09-13
BR9815119A (pt) 2000-10-10
WO1999028817A3 (en) 1999-07-22
CA2313013C (en) 2005-03-29
AU1581099A (en) 1999-06-16
CA2313013A1 (en) 1999-06-10
SE9704475D0 (sv) 1997-12-02

Similar Documents

Publication Publication Date Title
SE9704475D0 (sv) An instruction decoder
US5758115A (en) Interoperability with multiple instruction sets
US8332621B2 (en) Implementation of variable length instruction encoding using alias addressing
US6189090B1 (en) Digital signal processor with variable width instructions
KR840001350A (ko) 부정장(不定長) 명령을 갖는 데이터 처리장치
KR920003153A (ko) 2개의 명령을 병렬디코드할 수 있는 마이크로프로세서
KR930018368A (ko) 롬(rom) 용량을 저감한 데이타 프로세서
KR910700497A (ko) 마이크로 프로세서
ATE145291T1 (de) Addressieren von mikrobefehlen in einer pipeline- zentraleinheit ( betriebsverfahren, adressierverfahren, kellerspeicher und zentraleinheit)
TW377422B (en) Pipeline processor capable of reducing branch hazards with small-scale circuit
KR900016865A (ko) 파이프라인방식의 분기명령제어장치
KR940009819A (ko) 데이타 처리 시스템의 오프셋 값 계산 회로 및 방법
KR960039978A (ko) 디지탈 아날로그 변환기의 데이타 포맷 설정 회로
KR880011659A (ko) 마이크로프로그램 처리장치
KR940000960A (ko) 마이크로프로세서
KR880011654A (ko) 마이크로프로그램 처리장치
KR920010422A (ko) 마이크로 컴퓨터
KR910010299A (ko) 프로그래머블 콘트롤러의 비트연산 처리회로
JPS6131895B2 (sv)
KR950020146A (ko) 파이프라인(pipeline)이 구비된 프로세서에서 간단한 반복명령어의 구현방법
KR970012074A (ko) 레지스터 세트 방법 및 회로
KR930013998A (ko) 피엘씨의 명령어 실행방법
KR970066854A (ko) 프로그램 분기 제어회로
KR960032198A (ko) 컴퓨터에서 분기 명령어를 처리하기 위한 장치
JPH02234227A (ja) ミスアライメント処理方式

Legal Events

Date Code Title Description
NUG Patent has lapsed