SE9600199D0 - A semiconductor device with a low resistance ohmic contact between a metal layer and a SiC-layer - Google Patents
A semiconductor device with a low resistance ohmic contact between a metal layer and a SiC-layerInfo
- Publication number
- SE9600199D0 SE9600199D0 SE9600199A SE9600199A SE9600199D0 SE 9600199 D0 SE9600199 D0 SE 9600199D0 SE 9600199 A SE9600199 A SE 9600199A SE 9600199 A SE9600199 A SE 9600199A SE 9600199 D0 SE9600199 D0 SE 9600199D0
- Authority
- SE
- Sweden
- Prior art keywords
- layer
- sic
- semiconductor device
- low resistance
- ohmic contact
- Prior art date
Links
- 229910052751 metal Inorganic materials 0.000 title abstract 3
- 239000002184 metal Substances 0.000 title abstract 3
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000000463 material Substances 0.000 abstract 2
- 229910052738 indium Inorganic materials 0.000 abstract 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/048—Making electrodes
- H01L21/0485—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9600199A SE9600199D0 (sv) | 1996-01-19 | 1996-01-19 | A semiconductor device with a low resistance ohmic contact between a metal layer and a SiC-layer |
US08/602,045 US5652437A (en) | 1996-01-19 | 1996-02-15 | Semiconductor device with a low resistance ohmic contact between a metal layer and a sic-layer |
DE69724934T DE69724934T2 (de) | 1996-01-19 | 1997-01-17 | Halbleiteranordnung mit einem ohmischen kontakt mit niedrigem widerstand zwischen eine metallschicht und eine sic-schicht |
JP52592197A JP3886149B2 (ja) | 1996-01-19 | 1997-01-17 | 金属層とSiC層との間の低オーム抵抗接点を有する半導体装置 |
PCT/SE1997/000062 WO1997026678A2 (fr) | 1996-01-19 | 1997-01-17 | DISPOSITIF SEMICONDUCTEUR AYANT UN CONTACT OHMIQUE DE FAIBLE RESISTANCE ENTRE UNE COUCHE DE METAL ET UNE COUCHE DE SiC |
EP97901298A EP0875077B1 (fr) | 1996-01-19 | 1997-01-17 | DISPOSITIF SEMICONDUCTEUR AYANT UN CONTACT OHMIQUE DE FAIBLE RESISTANCE ENTRE UNE COUCHE DE METAL ET UNE COUCHE DE SiC |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9600199A SE9600199D0 (sv) | 1996-01-19 | 1996-01-19 | A semiconductor device with a low resistance ohmic contact between a metal layer and a SiC-layer |
US08/602,045 US5652437A (en) | 1996-01-19 | 1996-02-15 | Semiconductor device with a low resistance ohmic contact between a metal layer and a sic-layer |
Publications (1)
Publication Number | Publication Date |
---|---|
SE9600199D0 true SE9600199D0 (sv) | 1996-01-19 |
Family
ID=26662478
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9600199A SE9600199D0 (sv) | 1996-01-19 | 1996-01-19 | A semiconductor device with a low resistance ohmic contact between a metal layer and a SiC-layer |
Country Status (3)
Country | Link |
---|---|
US (1) | US5652437A (fr) |
SE (1) | SE9600199D0 (fr) |
WO (1) | WO1997026678A2 (fr) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE9901410D0 (sv) * | 1999-04-21 | 1999-04-21 | Abb Research Ltd | Abipolar transistor |
GB2372632A (en) * | 2001-02-23 | 2002-08-28 | Sharp Kk | A method of growing an InGaN semiconductor layer |
US7297626B1 (en) | 2001-08-27 | 2007-11-20 | United States Of America As Represented By The Secretary Of The Army | Process for nickel silicide Ohmic contacts to n-SiC |
US6833556B2 (en) | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
US7084423B2 (en) | 2002-08-12 | 2006-08-01 | Acorn Technologies, Inc. | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions |
US6815323B1 (en) | 2003-01-10 | 2004-11-09 | The United States Of America As Represented By The Secretary Of The Air Force | Ohmic contacts on n-type silicon carbide using carbon films |
US8901699B2 (en) | 2005-05-11 | 2014-12-02 | Cree, Inc. | Silicon carbide junction barrier Schottky diodes with suppressed minority carrier injection |
US8367510B2 (en) * | 2005-09-14 | 2013-02-05 | Central Research Institute Of Electric Power Industry | Process for producing silicon carbide semiconductor device |
JP5598015B2 (ja) * | 2010-02-23 | 2014-10-01 | 株式会社デンソー | ショットキーバリアダイオードを備えた炭化珪素半導体装置およびその製造方法 |
US9362376B2 (en) | 2011-11-23 | 2016-06-07 | Acorn Technologies, Inc. | Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers |
US9620611B1 (en) | 2016-06-17 | 2017-04-11 | Acorn Technology, Inc. | MIS contact structure with metal oxide conductor |
DE112017005855T5 (de) | 2016-11-18 | 2019-08-01 | Acorn Technologies, Inc. | Nanodrahttransistor mit Source und Drain induziert durch elektrische Kontakte mit negativer Schottky-Barrierenhöhe |
JP2020120051A (ja) * | 2019-01-25 | 2020-08-06 | 株式会社リコー | 窒化物半導体多層構造、発光素子、光源装置及び窒化物半導体多層構造の製造方法 |
CN113571440B (zh) * | 2021-06-23 | 2024-06-18 | 中国电子科技集团公司第五十五研究所 | 一种改进型CTLM法测量SiC芯片欧姆接触电阻率的方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3984261A (en) * | 1974-06-10 | 1976-10-05 | Rca Corporation | Ohmic contact |
US4583110A (en) * | 1984-06-14 | 1986-04-15 | International Business Machines Corporation | Intermetallic semiconductor ohmic contact |
JPS6271271A (ja) * | 1985-09-24 | 1987-04-01 | Sharp Corp | 炭化珪素半導体の電極構造 |
JPS633460A (ja) * | 1986-06-19 | 1988-01-08 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 半導体装置 |
US5373171A (en) * | 1987-03-12 | 1994-12-13 | Sumitomo Electric Industries, Ltd. | Thin film single crystal substrate |
US4985742A (en) * | 1989-07-07 | 1991-01-15 | University Of Colorado Foundation, Inc. | High temperature semiconductor devices having at least one gallium nitride layer |
US5285109A (en) * | 1990-05-24 | 1994-02-08 | Sumitomo Electric Industries, Ltd. | Ohmic contact electrodes for n-type semiconductor cubic boron nitride |
JP3100644B2 (ja) * | 1991-02-22 | 2000-10-16 | 株式会社東芝 | 半導体発光素子及びその製造方法 |
US5273933A (en) * | 1991-07-23 | 1993-12-28 | Kabushiki Kaisha Toshiba | Vapor phase growth method of forming film in process of manufacturing semiconductor device |
-
1996
- 1996-01-19 SE SE9600199A patent/SE9600199D0/xx unknown
- 1996-02-15 US US08/602,045 patent/US5652437A/en not_active Expired - Lifetime
-
1997
- 1997-01-17 WO PCT/SE1997/000062 patent/WO1997026678A2/fr active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
US5652437A (en) | 1997-07-29 |
WO1997026678A3 (fr) | 1997-10-02 |
WO1997026678A2 (fr) | 1997-07-24 |
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