SE8203621L - Kanal-grenssnittkrets - Google Patents

Kanal-grenssnittkrets

Info

Publication number
SE8203621L
SE8203621L SE8203621A SE8203621A SE8203621L SE 8203621 L SE8203621 L SE 8203621L SE 8203621 A SE8203621 A SE 8203621A SE 8203621 A SE8203621 A SE 8203621A SE 8203621 L SE8203621 L SE 8203621L
Authority
SE
Sweden
Prior art keywords
data
processor
message handler
memory
message
Prior art date
Application number
SE8203621A
Other languages
Unknown language ( )
English (en)
Other versions
SE447763B (sv
Inventor
A L Larson
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of SE8203621L publication Critical patent/SE8203621L/sv
Publication of SE447763B publication Critical patent/SE447763B/sv

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Communication Control (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
SE8203621A 1981-06-22 1982-06-10 Kanal-grenssnittkrets SE447763B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/276,060 US4419728A (en) 1981-06-22 1981-06-22 Channel interface circuit providing virtual channel number translation and direct memory access

Publications (2)

Publication Number Publication Date
SE8203621L true SE8203621L (sv) 1982-12-23
SE447763B SE447763B (sv) 1986-12-08

Family

ID=23054978

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8203621A SE447763B (sv) 1981-06-22 1982-06-10 Kanal-grenssnittkrets

Country Status (12)

Country Link
US (1) US4419728A (sv)
JP (1) JPS5810235A (sv)
AU (1) AU543960B2 (sv)
BE (1) BE893586A (sv)
CA (1) CA1171931A (sv)
CH (1) CH656728A5 (sv)
DE (1) DE3222389A1 (sv)
FR (1) FR2508200B1 (sv)
GB (1) GB2101374B (sv)
IT (1) IT1152978B (sv)
NL (1) NL8202506A (sv)
SE (1) SE447763B (sv)

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US4858117A (en) * 1987-08-07 1989-08-15 Bull Hn Information Systems Inc. Apparatus and method for preventing computer access by unauthorized personnel
JPH0235551A (ja) * 1988-07-26 1990-02-06 Toshiba Corp チャネル装置におけるアドレス変換方式
US5123092A (en) * 1988-10-21 1992-06-16 Zenith Data Systems Corporation External expansion bus interface
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US5475860A (en) * 1992-06-15 1995-12-12 Stratus Computer, Inc. Input/output control system and method for direct memory transfer according to location addresses provided by the source unit and destination addresses provided by the destination unit
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US6147996A (en) 1995-08-04 2000-11-14 Cisco Technology, Inc. Pipelined multiple issue packet switch
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US5684800A (en) * 1995-11-15 1997-11-04 Cabletron Systems, Inc. Method for establishing restricted broadcast groups in a switched network
US6091725A (en) 1995-12-29 2000-07-18 Cisco Systems, Inc. Method for traffic management, traffic prioritization, access control, and packet forwarding in a datagram computer network
US6035105A (en) 1996-01-02 2000-03-07 Cisco Technology, Inc. Multiple VLAN architecture system
US5659798A (en) * 1996-02-02 1997-08-19 Blumrich; Matthias Augustin Method and system for initiating and loading DMA controller registers by using user-level programs
US6308148B1 (en) 1996-05-28 2001-10-23 Cisco Technology, Inc. Network flow data export
US6243667B1 (en) 1996-05-28 2001-06-05 Cisco Systems, Inc. Network flow switching and flow data export
US6212182B1 (en) 1996-06-27 2001-04-03 Cisco Technology, Inc. Combined unicast and multicast scheduling
US6434120B1 (en) 1998-08-25 2002-08-13 Cisco Technology, Inc. Autosensing LMI protocols in frame relay networks
US6304546B1 (en) 1996-12-19 2001-10-16 Cisco Technology, Inc. End-to-end bidirectional keep-alive using virtual circuits
US6356530B1 (en) 1997-05-23 2002-03-12 Cisco Technology, Inc. Next hop selection in ATM networks
US6122272A (en) * 1997-05-23 2000-09-19 Cisco Technology, Inc. Call size feedback on PNNI operation
US6862284B1 (en) 1997-06-17 2005-03-01 Cisco Technology, Inc. Format for automatic generation of unique ATM addresses used for PNNI
US6078590A (en) 1997-07-14 2000-06-20 Cisco Technology, Inc. Hierarchical routing knowledge for multicast packet routing
US6397316B2 (en) 1997-07-24 2002-05-28 Intel Corporation System for reducing bus overhead for communication with a network interface
US6157641A (en) * 1997-08-22 2000-12-05 Cisco Technology, Inc. Multiprotocol packet recognition and switching
US6212183B1 (en) 1997-08-22 2001-04-03 Cisco Technology, Inc. Multiple parallel packet routing lookup
US6512766B2 (en) 1997-08-22 2003-01-28 Cisco Systems, Inc. Enhanced internet packet routing lookup
US6343072B1 (en) 1997-10-01 2002-01-29 Cisco Technology, Inc. Single-chip architecture for shared-memory router
US7570583B2 (en) 1997-12-05 2009-08-04 Cisco Technology, Inc. Extending SONET/SDH automatic protection switching
US6424649B1 (en) 1997-12-31 2002-07-23 Cisco Technology, Inc. Synchronous pipelined switch using serial transmission
US6111877A (en) * 1997-12-31 2000-08-29 Cisco Technology, Inc. Load sharing across flows
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Also Published As

Publication number Publication date
FR2508200A1 (fr) 1982-12-24
GB2101374B (en) 1985-04-11
DE3222389C2 (sv) 1989-07-20
CH656728A5 (de) 1986-07-15
FR2508200B1 (fr) 1989-03-03
IT1152978B (it) 1987-01-14
JPS5810235A (ja) 1983-01-20
US4419728A (en) 1983-12-06
CA1171931A (en) 1984-07-31
DE3222389A1 (de) 1982-12-30
AU8506382A (en) 1983-01-06
SE447763B (sv) 1986-12-08
IT8221969A0 (it) 1982-06-21
AU543960B2 (en) 1985-05-09
JPS616421B2 (sv) 1986-02-26
GB2101374A (en) 1983-01-12
NL8202506A (nl) 1983-01-17
BE893586A (fr) 1982-10-18

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