SE500427C2 - Sätt och system för att i seriella digitala bitflöden urskilja minst två typer av tidsluckor i en mottagare av flödet - Google Patents

Sätt och system för att i seriella digitala bitflöden urskilja minst två typer av tidsluckor i en mottagare av flödet

Info

Publication number
SE500427C2
SE500427C2 SE9202031A SE9202031A SE500427C2 SE 500427 C2 SE500427 C2 SE 500427C2 SE 9202031 A SE9202031 A SE 9202031A SE 9202031 A SE9202031 A SE 9202031A SE 500427 C2 SE500427 C2 SE 500427C2
Authority
SE
Sweden
Prior art keywords
bits
time slots
bit
mark
parallel
Prior art date
Application number
SE9202031A
Other languages
English (en)
Swedish (sv)
Other versions
SE9202031L (sv
SE9202031D0 (sv
Inventor
Erik Oscar Abefelt
Lars Goeran Schyman
Peter Carl Birger Lundh
Original Assignee
Ellemtel Utvecklings Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ellemtel Utvecklings Ab filed Critical Ellemtel Utvecklings Ab
Priority to SE9202031A priority Critical patent/SE500427C2/sv
Publication of SE9202031D0 publication Critical patent/SE9202031D0/xx
Priority to AU45186/93A priority patent/AU671655B2/en
Priority to DE69327957T priority patent/DE69327957T2/de
Priority to ES93915062T priority patent/ES2144006T3/es
Priority to EP93915062A priority patent/EP0648396B1/en
Priority to DK93915062T priority patent/DK0648396T3/da
Priority to KR1019940704844A priority patent/KR100233619B1/ko
Priority to PCT/SE1993/000540 priority patent/WO1994001952A1/en
Priority to MX9303940A priority patent/MX9303940A/es
Priority to CN93107920A priority patent/CN1066877C/zh
Priority to US08/084,460 priority patent/US5450398A/en
Publication of SE9202031L publication Critical patent/SE9202031L/
Publication of SE500427C2 publication Critical patent/SE500427C2/sv
Priority to NO945055A priority patent/NO945055L/no
Priority to FI946196A priority patent/FI946196A/fi
Priority to GR20000400731T priority patent/GR3033045T3/el

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
    • H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
    • H04M11/068—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors using time division multiplex techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/24—Time-division multiplex systems in which the allocation is indicated by an address the different channels being transmitted sequentially

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Communication Control (AREA)
SE9202031A 1992-07-01 1992-07-01 Sätt och system för att i seriella digitala bitflöden urskilja minst två typer av tidsluckor i en mottagare av flödet SE500427C2 (sv)

Priority Applications (14)

Application Number Priority Date Filing Date Title
SE9202031A SE500427C2 (sv) 1992-07-01 1992-07-01 Sätt och system för att i seriella digitala bitflöden urskilja minst två typer av tidsluckor i en mottagare av flödet
DE69327957T DE69327957T2 (de) 1992-07-01 1993-06-17 Bitstromempfänger mit verfahren zur unterscheidung von zumindest zwei unterschiedlichen arten von zeitschlitzen in seriellen digitalen bitströmen
KR1019940704844A KR100233619B1 (ko) 1992-07-01 1993-06-17 비트스트림수신기에서 직렬디지털 비트스트림내의 두개 이상의 유형의 타임슬롯들을 서로 구별하는 방법 및 시스템
PCT/SE1993/000540 WO1994001952A1 (en) 1992-07-01 1993-06-17 A method of distinguishing in serial digital bit streams between at least two types of time slots in a bit stream receiver
ES93915062T ES2144006T3 (es) 1992-07-01 1993-06-17 Un metodo para distinguir en flujos de bits numericos en serie entre al menos dos tipos de ventanas de tiempo en un receptor de flujos de bits.
EP93915062A EP0648396B1 (en) 1992-07-01 1993-06-17 A method of distinguishing in serial digital bit streams between at least two types of time slots in a bit stream receiver
DK93915062T DK0648396T3 (da) 1992-07-01 1993-06-17 Fremgangsmåde til i serielle digitale bitstrømme at skelne imellem mindst to typer af tidsvinduer i en bitstrømmodtager
AU45186/93A AU671655B2 (en) 1992-07-01 1993-06-17 A method of distinguishing in serial digital bit streams between at least two types of time slots in a bit stream receiver
MX9303940A MX9303940A (es) 1992-07-01 1993-06-30 Un metodo para distinguir, en corrientes de bit digitales, en serie, entre por lo menos dos tipos deintervalos de tiempo en un receptor de corriente de bit.
CN93107920A CN1066877C (zh) 1992-07-01 1993-07-01 位流收信机串行数字位流中至少两种时隙的区分方法
US08/084,460 US5450398A (en) 1992-07-01 1993-07-01 Method of distinguishing in serial digital bit streams between at least two types of time slots in a bit stream receiver
NO945055A NO945055L (no) 1992-07-01 1994-12-27 Fremgangsmåte ved serielle bitströmmer å sondre mellom minst to typer tidsluker i en bitsrömmottager
FI946196A FI946196A (fi) 1992-07-01 1994-12-30 Menetelmä kahdentyyppisten aikavälien erottamiseksi sarjamuotoisessa digitaalisessa bittivirrassa bittivirtavastaanottimessa
GR20000400731T GR3033045T3 (en) 1992-07-01 2000-03-23 A method of distinguishing in serial digital bit streams between at least two types of time slots in a bit stream receiver.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9202031A SE500427C2 (sv) 1992-07-01 1992-07-01 Sätt och system för att i seriella digitala bitflöden urskilja minst två typer av tidsluckor i en mottagare av flödet

Publications (3)

Publication Number Publication Date
SE9202031D0 SE9202031D0 (sv) 1992-07-01
SE9202031L SE9202031L (sv) 1994-01-02
SE500427C2 true SE500427C2 (sv) 1994-06-20

Family

ID=20386671

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9202031A SE500427C2 (sv) 1992-07-01 1992-07-01 Sätt och system för att i seriella digitala bitflöden urskilja minst två typer av tidsluckor i en mottagare av flödet

Country Status (14)

Country Link
US (1) US5450398A (ko)
EP (1) EP0648396B1 (ko)
KR (1) KR100233619B1 (ko)
CN (1) CN1066877C (ko)
AU (1) AU671655B2 (ko)
DE (1) DE69327957T2 (ko)
DK (1) DK0648396T3 (ko)
ES (1) ES2144006T3 (ko)
FI (1) FI946196A (ko)
GR (1) GR3033045T3 (ko)
MX (1) MX9303940A (ko)
NO (1) NO945055L (ko)
SE (1) SE500427C2 (ko)
WO (1) WO1994001952A1 (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09233054A (ja) * 1996-02-27 1997-09-05 Oki Electric Ind Co Ltd 復号装置
US6603771B1 (en) 1999-07-02 2003-08-05 Cypress Semiconductor Corp. Highly scalable architecture for implementing switch fabrics with quality of services
US6584517B1 (en) 1999-07-02 2003-06-24 Cypress Semiconductor Corp. Circuit and method for supporting multicast/broadcast operations in multi-queue storage devices
US6625177B1 (en) 1999-08-09 2003-09-23 Cypress Semiconductor Corp. Circuit, method and/or architecture for improving the performance of a serial communication link
US6628656B1 (en) 1999-08-09 2003-09-30 Cypress Semiconductor Corp. Circuit, method and/or architecture for improving the performance of a serial communication link
US6738935B1 (en) * 2000-02-07 2004-05-18 3Com Corporation Coding sublayer for multi-channel media with error correction
JP3780419B2 (ja) * 2004-03-09 2006-05-31 セイコーエプソン株式会社 データ転送制御装置及び電子機器
EP1596262B1 (de) * 2004-05-10 2007-04-11 Siemens Aktiengesellschaft Sicherheitsgerichtete Übertragung von Daten
DE102005010820C5 (de) * 2005-03-07 2014-06-26 Phoenix Contact Gmbh & Co. Kg Kopplung von sicheren Feldbussystemen
CN102707226A (zh) * 2012-07-06 2012-10-03 电子科技大学 一种红外焦平面读出电路的行控制电路的检测电路
US9007014B2 (en) * 2012-10-19 2015-04-14 The Board Of Trustees Of The University Of Illinois System and method for compensating for high frequency application of ripple correlation to minimize power losses in induction machines
KR102204877B1 (ko) * 2019-09-06 2021-01-18 광운대학교 산학협력단 광 통신 기반의 고속 전송 장치 및 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156111A (en) * 1977-05-18 1979-05-22 Honeywell Information Systems Inc. Apparatus for transition between network control and link control
NL7707540A (nl) * 1977-07-07 1979-01-09 Philips Nv Inrichting voor het koderen van signalen die over een aantal kanalen worden verdeeld.
FR2476880A1 (fr) * 1980-02-27 1981-08-28 Ibm France Procede et dispositif pour multiplexer un signal de donnees et plusieurs signaux secondaires, procede et dispositif de demultiplexage associes, et emetteur-recepteur d'interface en faisant application
FR2500704A1 (fr) * 1981-02-20 1982-08-27 Devault Michel Commutateur temporel asynchrone pour reseau numerique a integration des services
US4847703A (en) * 1985-06-03 1989-07-11 Canon Kabushiki Kaisha Data transmission and detection system
US4635255A (en) * 1985-07-26 1987-01-06 Advanced Micro Devices, Inc. Digital subscriber controller
EP0214352B1 (en) * 1985-08-13 1990-10-24 International Business Machines Corporation Adaptive packet/circuit switched transportation method and system
DE3674196D1 (de) * 1986-04-17 1990-10-18 Ibm Leistungsfaehiges integriertes uebertragungsverfahren fuer daten und nichtkodierte information.
JPH07118749B2 (ja) * 1986-11-14 1995-12-18 株式会社日立製作所 音声／データ伝送装置
US4891808A (en) * 1987-12-24 1990-01-02 Coherent Communication Systems Corp. Self-synchronizing multiplexer
DE3917214A1 (de) * 1988-06-13 1989-12-21 Asea Brown Boveri Verfahren zur bitseriellen uebertragung von datenwoertern
JPH0744511B2 (ja) * 1988-09-14 1995-05-15 富士通株式会社 高郊率多重化方式

Also Published As

Publication number Publication date
MX9303940A (es) 1994-02-28
AU4518693A (en) 1994-01-31
DE69327957D1 (de) 2000-04-06
EP0648396B1 (en) 2000-03-01
CN1066877C (zh) 2001-06-06
SE9202031L (sv) 1994-01-02
NO945055D0 (no) 1994-12-27
ES2144006T3 (es) 2000-06-01
SE9202031D0 (sv) 1992-07-01
DE69327957T2 (de) 2000-07-13
KR100233619B1 (ko) 1999-12-01
EP0648396A1 (en) 1995-04-19
FI946196A0 (fi) 1994-12-30
AU671655B2 (en) 1996-09-05
CN1083292A (zh) 1994-03-02
US5450398A (en) 1995-09-12
DK0648396T3 (da) 2000-07-31
WO1994001952A1 (en) 1994-01-20
FI946196A (fi) 1994-12-30
GR3033045T3 (en) 2000-08-31
NO945055L (no) 1994-12-27

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