AU593695B2 - Insert/drop PCM multiplex equipment - Google Patents
Insert/drop PCM multiplex equipment Download PDFInfo
- Publication number
- AU593695B2 AU593695B2 AU81233/87A AU8123387A AU593695B2 AU 593695 B2 AU593695 B2 AU 593695B2 AU 81233/87 A AU81233/87 A AU 81233/87A AU 8123387 A AU8123387 A AU 8123387A AU 593695 B2 AU593695 B2 AU 593695B2
- Authority
- AU
- Australia
- Prior art keywords
- insert
- drop
- exchange
- digital
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/08—Intermediate station arrangements, e.g. for branching, for tapping-off
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
- H04J3/073—Bit stuffing, e.g. PDH
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Prostheses (AREA)
- Machine Translation (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Description
21: 593695 ORIN 01 4.
t 4 4) 4' 4 4 4 4 4 94 44,4(4 4 t~ 4' 44 4-.
44 4 4~ 44-~ This documnent contains the Iaunernenlts made rundcr Sction 49 and is correct for Sprinting. COMMONWEALTH OF AUSTRALIA PATENTS ACT 1952-1969 COMPLETE SPECIFICATION FOR THE INVENTION ENTITLED 44 4 4 ''4 "INSERT/DROP PCM MULTIPLEX EQUIPMENT" 77 The following statement is a full description of this invention, including the best method of performing it known to us:- .4 1 1t 4 t *0 4- 4*14 4- 4-4- I 4 The use of digital transmission equipments between analogue exchanges permits the insertion and extraction, at the transmission terminating equipments, of a certain number of channels which can be dedicated to other purposes and not pass through the switched network. The replacement of these equipments in digital exchanges by parts of the switching equipment (digital trunks) makes this operation impossible.
The problem can be overcome by making use of elements external to the switching system. Such elements are provided in a circuit switch data network, but they are economically unacceptable when the extent of the data transmission requirements within a given area is small.
An object of this invention is to provide means to incorporate data into the digital frame that links digital exchanges to each other, achieving a suitable benefit from the digital channels with means that are adapted economically to the type of requirement.
According to this invention the problem is resolved by the use of an equipment of reduced size termed a channel drop/insert unit, which can be implemented on a single printed circuit board.
This equipment permits dropping/inserting of an undetermined number of channels (theoretically up to the maximum of 32 set by the POM highway), by forming with them subscriber interfaces (through codecs) or co-directional interfaces at 64 kbit/s (Recommendation G.703 of the CCITT).
This latter facility is not offered by conventional digital transmission equipments that link analogue exchanges mentioned above.
4: j 4: 4 I 'I
C
i ilill 00 0.0 00 0 o o Bp 60 00 0 0 00 00 00 0 0 oooe o 00 0t 0 0 op 90 9 0 0 09 0 00 0 *S The channel drop/insert unit is located in the switching equipment at a point where it can be provided with power and have access to the digital highways which come and go from the links to and from the transmission equipment.
The attached Figure gives the block diagram of the channel drop/insert unit, each of the blocks carrying out the following functions: Insert function receive stage (ERI): Conversion to binary of the line code of the incoming signal from the nearer exchange, Regeneration of the clock signals of the frame from the nearer exchange, Decoding of the frame alignment from the nearer exchange.
Insert function transmit stage (EEI): Multiplexing of the channels coming from the nearer exchange with those coming from the codecs and the co-directional interfaces, Conversion to line code of the binary-coded signal resulting from the multiplexing process.
Control stage (ECON): Generation of the enabling signals for the codecs and the co-directional interfaces in both directions of transmission, starting from the two frame alignment detected and corresponding to the outgoing and incoming highways respectively, Generation of the control signals for the multiplexer in the insert function transmit stage
(EEI).
,09000 0 9 0 0 9 0000 .aa "-f 1* $i agl 'il Drop function receive stage (ERS): Conversion to binary of the line code of the incoming signal from the remote exchange.
Regeneration of the clock signal of the frame from the remote exchange.
Decoding of the frame alignment from the remote exchange.
The remaining symbols of Fig. 1 have the following meanings: a a4 *0 *5 0 0o o0 o o 0 0 o* a o O 0 0 0 00 o c o *o0 S 9 0 o o o o 00 0 9 a CT O2. Cl/Cm: Col/Com:
COM:
1 2 3 4 6 7 encoder/decoder 1/n.
co-directlonal 1itereace 1/m. Devices to transform the 64 kbit/s digital signal into another at 2 Mbit/s for its insertion into the channel.
Switches for manually selecting the channels to drop/insert.
Transmit highway coming from the nearer exchange.
Transmit highway towards the remote exchange.
Transmit highway towards the nearer exchange.
Transmit highway coming from the remote exchange.
Analogue input to codec.
Analogue output from codec.
Digital input at 64 kbit/s to co-directional interface.
Digital output at 64 kbit/s from codirectectional interface.
i 8 ~fl The digital signal coming from the nearer exchange (1) is applied to the insert function receive stage (ERI). In this stage it is changed from line code to binary, the clock signal with which it was transmitted is regenerated, and the frame alignment pattern is detected. The binary signal obtained is sent to the insert function transmit stage (EEI) where it will be multiplexed with the channels coming from the codecs and from the co-directional interfaces.
The frame alignment and the regenerated clock signal O'6. from the frame coining from the nearer exchange, are applied lJ%' to the control stage (ECON) where, with the selection of the channels to be dropped/inserted made by means of the manu- Setr* ally operated switches (COM), the enabling signals are generated for the codecs and the co-directional interfaces in the appropriate channel time-slots. These enabling signals are sent to the respective codecs and co-directional interc faces over the connections shown with dashed lines in the figure. The control signal is also generated; this reaches the EEI (connection shown with a continuous line in the fig- :2 ure) in order to control the process of multiplexing the t .ie channels that are to be inserted.
Once the multiplexing process has been carried out in the insert function transmit stage (EEI) between the binary signal corresponding to the digital signal coming from the nearer exchange and the signals corresponding to the channels from the codecs and the co-directional interfaces, the resulting binary-coded signal is converted into line code and transmitted to the remote exchange In the opposite direction, the signal arriving from the remote exchange 4 is transmitted unchanged onward to the 5 r a- i I
I
nearer exchange This signal is applied in parallel to the drop function receive stage (ERS), where it is changed from line code to binary, the clock signal coming from the remote exchange is regenerated, and the corresponding frame alignment is decoded. These last two signals are forwarded to the control stage (ECON) where they are employed to generate the validation signals for the codecs and the codirectional interfaces in order that they may pick up the contents of the allocated channels and transform it into an analogue signal (codecs), or adapt it to 64 kbit/s (codirectional interfaces). Connections between the control stage (ECON) and the codecs and the co-directional interfaces for the transmission of the validation signals are shown in the Figure by means of lines consisting of dots and dashes.
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Claims (1)
- 2. An insert/drop arrangement for inserting/dropping channels on a digital highway, substantially as herein de- scribed with reference to the figure of the drawing. DATED THIS TWENTY-EIGHTH DAY OF NOVEMBER 1989 ALCATEL N.V. 4t 4 r t 4,44i 4 4 1 Is C f i I i E ii i r/
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ES8603070A ES2005838A6 (en) | 1986-11-18 | 1986-11-18 | Insertador-segregador de canales in a digital via (Machine-translation by Google Translate, not legally binding) |
ES8603070 | 1986-11-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU8123387A AU8123387A (en) | 1988-05-19 |
AU593695B2 true AU593695B2 (en) | 1990-02-15 |
Family
ID=8248746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU81233/87A Ceased AU593695B2 (en) | 1986-11-18 | 1987-11-16 | Insert/drop PCM multiplex equipment |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU593695B2 (en) |
CH (1) | CH674436A5 (en) |
ES (1) | ES2005838A6 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9005723D0 (en) * | 1990-03-14 | 1990-05-09 | Plessey Telecomm | Switch for multiplexes |
-
1986
- 1986-11-18 ES ES8603070A patent/ES2005838A6/en not_active Expired
-
1987
- 1987-11-16 AU AU81233/87A patent/AU593695B2/en not_active Ceased
- 1987-11-18 CH CH448787A patent/CH674436A5/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
ES2005838A6 (en) | 1989-04-01 |
AU8123387A (en) | 1988-05-19 |
CH674436A5 (en) | 1990-05-31 |
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