SE219969C1 - - Google Patents
Info
- Publication number
- SE219969C1 SE219969C1 SE847466A SE847466A SE219969C1 SE 219969 C1 SE219969 C1 SE 219969C1 SE 847466 A SE847466 A SE 847466A SE 847466 A SE847466 A SE 847466A SE 219969 C1 SE219969 C1 SE 219969C1
- Authority
- SE
- Sweden
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/05—Etch and refill
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/4981—Utilizing transitory attached element or associated separate material
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US466182A US3325882A (en) | 1965-06-23 | 1965-06-23 | Method for forming electrical connections to a solid state device including electrical packaging arrangement therefor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SE219969C1 true SE219969C1 (https=) | 1968-04-09 |
Family
ID=23850828
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SE847466A SE219969C1 (https=) | 1965-06-23 | 1966-06-21 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3325882A (https=) |
| JP (1) | JPS512792B1 (https=) |
| CH (1) | CH454985A (https=) |
| DE (1) | DE1640457B1 (https=) |
| FR (1) | FR1483570A (https=) |
| GB (1) | GB1073910A (https=) |
| NL (1) | NL153721B (https=) |
| SE (1) | SE219969C1 (https=) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3428866A (en) * | 1965-06-23 | 1969-02-18 | Ibm | Solid state device including electrical packaging arrangement with improved electrical connections |
| US3433686A (en) * | 1966-01-06 | 1969-03-18 | Ibm | Process of bonding chips in a substrate recess by epitaxial growth of the bonding material |
| DE1539692A1 (de) * | 1966-06-23 | 1969-10-16 | Blume & Redecker Gmbh | Umklebevorrichtung fuer Spulen |
| US3484534A (en) * | 1966-07-29 | 1969-12-16 | Texas Instruments Inc | Multilead package for a multilead electrical device |
| US3461524A (en) * | 1966-11-02 | 1969-08-19 | Bell Telephone Labor Inc | Method for making closely spaced conductive layers |
| US3748726A (en) * | 1969-09-24 | 1973-07-31 | Siemens Ag | Method for mounting semiconductor components |
| US3753290A (en) * | 1971-09-30 | 1973-08-21 | Tektronix Inc | Electrical connection members for electronic devices and method of making same |
| JPS4988563A (https=) * | 1972-12-23 | 1974-08-23 | ||
| US3964157A (en) * | 1974-10-31 | 1976-06-22 | Bell Telephone Laboratories, Incorporated | Method of mounting semiconductor chips |
| JPS52109289U (https=) * | 1976-02-16 | 1977-08-19 | ||
| US4439918A (en) * | 1979-03-12 | 1984-04-03 | Western Electric Co., Inc. | Methods of packaging an electronic device |
| US4251852A (en) * | 1979-06-18 | 1981-02-17 | International Business Machines Corporation | Integrated circuit package |
| US5237485A (en) * | 1985-04-26 | 1993-08-17 | Sgs Microelettronica S.P.A. | Apparatus and method for improved thermal coupling of a semiconductor package to a cooling plate and increased electrical coupling of package leads on more than one side of the package to a circuit board |
| US4774630A (en) * | 1985-09-30 | 1988-09-27 | Microelectronics Center Of North Carolina | Apparatus for mounting a semiconductor chip and making electrical connections thereto |
| US4768077A (en) * | 1986-02-20 | 1988-08-30 | Aegis, Inc. | Lead frame having non-conductive tie-bar for use in integrated circuit packages |
| GB2202673B (en) * | 1987-03-26 | 1990-11-14 | Haroon Ahmed | The semi-conductor fabrication |
| FR2625067A1 (fr) * | 1987-12-22 | 1989-06-23 | Sgs Thomson Microelectronics | Procede pour fixer sur un support un composant electronique et ses contacts |
| USRE35578E (en) * | 1988-12-12 | 1997-08-12 | Sgs-Thomson Microelectronics, Inc. | Method to install an electronic component and its electrical connections on a support, and product obtained thereby |
| USRE35385E (en) * | 1988-12-12 | 1996-12-03 | Sgs-Thomson Microelectronics, Sa. | Method for fixing an electronic component and its contacts to a support |
| JPH02306690A (ja) * | 1989-05-22 | 1990-12-20 | Toshiba Corp | 表面実装用配線基板の製造方法 |
| US5605863A (en) * | 1990-08-31 | 1997-02-25 | Texas Instruments Incorporated | Device packaging using heat spreaders and assisted deposition of wire bonds |
| DE19964471B4 (de) * | 1999-03-31 | 2013-02-21 | Osram Ag | Leuchtdiode und Verfahren zur Herstellung einer Mehrzahl von Leuchtdioden |
| DE19914718B4 (de) * | 1999-03-31 | 2006-04-13 | Siemens Ag | Verfahren zum gleichzeitigen Herstellen einer Mehrzahl von Leuchtdiodenelementen mit integrierten Kontakten |
| US6882044B2 (en) * | 2002-05-17 | 2005-04-19 | Agilent Technologies, Inc. | High speed electronic interconnection using a detachable substrate |
| US7343758B1 (en) * | 2004-08-09 | 2008-03-18 | Continental Carbonic Products, Inc. | Dry ice compaction method |
| DE102006009723A1 (de) * | 2006-03-02 | 2007-09-06 | Siemens Ag | Verfahren zum Herstellen und planaren Kontaktieren einer elektronischen Vorrichtung und entsprechend hergestellte Vorrichtung |
| WO2011129130A1 (ja) * | 2010-04-15 | 2011-10-20 | 古河電気工業株式会社 | 基板および基板の製造方法 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3169892A (en) * | 1959-04-08 | 1965-02-16 | Jerome H Lemelson | Method of making a multi-layer electrical circuit |
| US3098951A (en) * | 1959-10-29 | 1963-07-23 | Sippican Corp | Weldable circuit cards |
| US3235428A (en) * | 1963-04-10 | 1966-02-15 | Bell Telephone Labor Inc | Method of making integrated semiconductor devices |
-
0
- FR FR1483570D patent/FR1483570A/fr not_active Expired
-
1965
- 1965-06-23 US US466182A patent/US3325882A/en not_active Expired - Lifetime
-
1966
- 1966-05-07 DE DE19661640457 patent/DE1640457B1/de active Granted
- 1966-06-07 GB GB25227/66A patent/GB1073910A/en not_active Expired
- 1966-06-10 CH CH845366A patent/CH454985A/de unknown
- 1966-06-21 SE SE847466A patent/SE219969C1/sv unknown
- 1966-06-22 NL NL666608622A patent/NL153721B/xx not_active IP Right Cessation
-
1969
- 1969-10-29 JP JP44086151A patent/JPS512792B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| GB1073910A (en) | 1967-06-28 |
| NL6608622A (https=) | 1966-12-27 |
| JPS512792B1 (https=) | 1976-01-28 |
| CH454985A (de) | 1968-04-30 |
| US3325882A (en) | 1967-06-20 |
| NL153721B (nl) | 1977-06-15 |
| FR1483570A (https=) | 1967-09-06 |
| DE1640457B1 (de) | 1970-10-29 |