RU2808222C1 - Arbitrary waveform generator - Google Patents

Abstract

FIELD: measurement technology.

SUBSTANCE: arbitrary waveform generator (AWG) refers to a technique for synthesizing oscillations and can be used in measurement technology. The technical result is the simplification of the AWG by reducing the complexity of the implementation of its blocks, allowing for separate independent adjustment of the frequency, amplitude and phase of the harmonic oscillation. This result is achieved by replacing phase-locked loop (PLL) systems in the signal generator with PLL rings, each of which contains a logical phase discriminator (LPD), a bipolar nonlinear control voltage generator, an integrator and a proportional link, a voltage adder, an adjustable generator whose output frequency has a multiple of the reference oscillation frequency equal to the number of the PLL ring, a voltage amplifier with an adjustment element that allows you to change the transmission coefficient of the voltage amplifier, a voltage comparator that converts a bipolar oscillation into a unipolar pulse oscillation with digital logic levels, while the output of the comparator is connected to the input of the delay line with an adjustment element that allows you to adjust the value of the phase shift of the pulse voltage at the output of the delay line relative to the pulse voltage at its input, and the output of the delay line is connected to the second input of the logical phase discriminator.

EFFECT: simplification of the AWG by reducing the complexity of the implementation of its blocks, allowing for separate independent adjustment of the frequency, amplitude and phase of the harmonic oscillation.

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Description

The invention relates to the technique of synthesis of oscillations and can be used in measuring technology as a shaper of measuring signals, as well as a generator of specialized signals when creating and configuring electronic devices for automation, radio engineering and communications.

Generators of arbitrary waveforms are known [1, 2], which generate an output oscillation by “stitching” linearly varying voltage segments of different slopes. The disadvantage of such generators is that the useful oscillation they create appears not as a smooth line, but as a broken line.

There are generators of arbitrary waveforms based on a discrete representation of the generated oscillation with subsequent filtering [3]. Initially, the signal is specified by a set of samples, presented in the form of a digital code recorded in an electronic storage device. The read code samples are subjected to digital-to-analog conversion (DAC) in order to obtain a step-type output oscillation, similar in shape to the analogue one. To reduce quantization noise caused by a step change in the signal at the DAC output, a low-pass filter (LPF) is installed at the generator output. The disadvantage of this generation method is that the noise level present in the output oscillation significantly depends on the bit depth of the original code representation of the signal, the bit depth of the DAC and the consistency of the low-pass filter bandwidth with the spectrum of the generated oscillation. With an arbitrary variation in the frequency and shape of the synthesized oscillation, it is quite difficult to ensure the necessary adjustment of the low-pass filter parameters so that its passband is consistent with the spectrum of the generated oscillation. The consequence of this is the formation of an output oscillation with a significant level of additional noise due to the discrete representation of the original signal.

The considered methods for generating oscillations of arbitrary shape require preliminary preparation of its initial components in the form of a piecewise linear or code representation. In the case when the shape of the oscillation is not known, which often happens when solving research-type problems, the synthesis of such oscillations becomes significantly more complicated.

There is a known method [4] for solving the problem of synthesizing oscillations of arbitrary shape, based on their representation based on the expansion of a function into a harmonic Fourier series. That is, an arbitrary waveform is synthesized based on its harmonic components, which are analog signals. In this case, the output signal, generated on the basis of a set of analog signals, does not have noise characteristic of the previously discussed methods.

The method [4, p. 40] is technically implemented in the form of a complex signal synthesizer (Fig. 1), consisting of a reference oscillator (RO), a set of calibrator generators (modified synthesizers) with frequency, amplitude and phase adjustments (GKChAF), and an analog adder (∑). Generator-calibrators are implemented on the basis of phase synchronization systems (PSS). The formation of the output oscillation is carried out by setting the frequency, amplitude and phase of oscillations in each of the calibrator generators.

In the method under consideration, setting the parameters of the GKChAF can be done without prior knowledge of the specific type of output oscillation. The shape of the output oscillation can be adjusted by changing the parameters of each GKChAF, observing the final oscillation using an oscilloscope. This approach greatly simplifies and increases the efficiency of creating vibrations of the required shape.

A complex signal synthesizer using the formation of an output oscillation based on its harmonic components is selected as a prototype.

The disadvantage of the prototype is that in [4] only a block diagram of a complex signal synthesizer is presented without disclosing the essence of the implementation of each of its blocks. The available information is not enough to practically create the specified complex signal synthesizer. If the implementation of a reference oscillation generator and a multi-input voltage adder does not cause much complexity, then the implementation of a generator-calibrator with independent adjustments of frequency, amplitude and phase is a problem.

The problem of generating a harmonic oscillation with independent frequency and phase adjustments is solved by using direct digital synthesizers (Direct Digital Synthesis, DDS) frequency [5]. Their work uses a principle similar to that discussed in [3]. The basis of the synthesizer is a read-only memory device (ROM), into which the amplitude values of a sinusoidal signal for various phase values during the oscillation period are recorded in the form of a digital code. The phase change step can be fractions of a degree. When the ROM address code is sequentially changed, code components corresponding to the sequential change in the phase of the sinusoidal signal are transmitted to its output. These codes are input to the digital-to-analog converter. As a result, a harmonic oscillation is formed at the output of the DAC.

If all components of a sinusoidal oscillation are read from the ROM and the bit depth of the code for samples of instantaneous oscillation values is large enough (from 10 to 12 bits), an oscillation is formed at the output of the DAC in a shape that is not much different from the analog representation of the corresponding oscillation. However, in this case, it is necessary to store a large amount of codes in the ROM, the sequential selection of which does not allow the formation of a high-frequency output oscillation. So, if the ROM address bus is 12 bits, then with a reference frequency of 50 MHz it will be possible to generate an output harmonic oscillation with a frequency no higher than 50000000/2 ¹² =50000000/4096≈10207 Hz. In this case, samples are read from the ROM with a step of changing the phase of the output oscillation equal to 36074096 = 0.88°. In this case, the shape of the output oscillation will be close to its analog representation.

To obtain a frequency five times higher than 10.2 kHz, it is necessary to read not all code samples in a row from the ROM, but only every fifth one. In this case, samples are read from the ROM with a phase change step of 0.88° ^⋅ 5=4.4°. In this case, the shape of the oscillation at the output of the DAC will be such that to ensure the spectral purity of the generated oscillation, it is necessary to use a low-pass filter installed at the output of the digital-to-analog converter.

When generating harmonic oscillations, when their frequency can be adjusted arbitrarily, for example, a variation in the frequency of the reference oscillator is used, a corresponding adjustment of the low-pass filter will be required, which is quite difficult to implement for a changing oscillation frequency.

In [6], a device for adjusting the amplitude and phase of alternating voltage was proposed, consisting of two phase-locked loop systems, one of which allows independent adjustment of the amplitude, and the other - the phase of oscillation. To carry out additional adjustment of the oscillation frequency, another PLL system should be turned on at the input of this device, with the help of which it is possible to synchronize (“bind”) a multiple of the reference frequency of the output oscillation and the reference oscillation. Thus, if we consider the device for adjusting the amplitude and phase with an additional PLL system as an analogue of the GKChAF block, then it can be noted that its implementation is quite complex, since it is based on three phase-locked loop systems.

The purpose of the invention is to simplify the arbitrary waveform generator (ARG) by reducing the complexity of the implementation of its blocks, allowing for separate independent adjustment of the frequency, amplitude and phase of the harmonic oscillation.

This goal is achieved in the block for adjusting the frequency, amplitude and phase of harmonic oscillation by replacing several PLL systems with one.

The structure of the proposed device is shown in Fig. 2. It contains a reference oscillation generator 1, N rings (systems) PLL 2 ₁ , 2 ₂ , ..., 2 _N , an analog N-input voltage adder 3. The output of the device is the output of the adder.

All PLL rings of the arbitrary waveform generator have the same structure, the implementation of which is similar to that presented in the circuit of a functional converter with adjustment of the amplitude and phase of the output oscillation [7].

The structure of the PLL ring (let's call it number i) is shown in Fig. 3. Since the PLL ring is a constituent element of the GSPF and its structure is complementary to the structure of FIG. 2 of the proposed device, the numbering of the nodes of the PLL ring will continue, that is, starting with the number 4. The PLL ring contains the following nodes: logical phase discriminator 4 _i , bipolar nonlinear control voltage generator 5 _i , astatic link consisting of an integrator 6 _i , proportional link 7 _i , and voltage adder 8 _i , adjustable generator 9 _i , voltage amplifier 10 _i , voltage comparator with zero comparison threshold 11 _i , delay line 12 _i .

Oscillation U _op of the reference frequency with digital logic levels, generated at the output of the reference oscillation generator, is fed to the reference input of the logical phase discriminator (APD) 4 _i , which is the input of the PLL ring. The outputs of the APD 4 _i are connected to the inputs of the nonlinear control voltage driver 5 _i . The nonlinear control voltage driver 5 _i is used to obtain the analog control voltage of the PLL ring based on the digital output signals of the APD 4 _i . The operating mechanism of the driver 5 _i is discussed in [8]. The output of the driver 5 _i is connected to the inputs of the integrator 6 _i and the proportional link 7 _i , which together with the voltage adder 8 _i form a proportional-integrating filter of the PLL ring. The control voltage generated at the output of the voltage adder 8 _i is supplied to the control input of the adjustable generator 9 _i . The output of the adjustable generator 9 _i is connected to the input of the voltage amplifier 10 _i . The voltage amplifier 10 _i has an adjustment element that allows you to change the gain of the amplifier, and as a result, scale the amplitude of the oscillation generated by the generator 9 _i . The output of the voltage amplifier 10 _i , which is the output of the PLL ring number i, on which the output voltage U _gi is generated, is connected to the input of the voltage comparator with a zero threshold level 11 _i . The comparator 11 _i converts the bipolar voltage _Ugi into a unipolar voltage _Upri with digital logic levels, which is supplied through the delay line _12i to the second input of the APD _4i . The delay line 12 _i has an adjustment element that provides control of the delay (phase shift) of the voltage relative to the voltage U _{at i} .

Regulation of the parameters of nodes 10 _i and 12 _i can be done by changing the values of the parameters of the passive elements of their circuits, for example, the resistances of resistors. Possible examples of implementation of nodes 10 _i and 12 _i are presented in Fig. 4 and 5 respectively. In fig. Figure 4 shows a circuit based on operational amplifiers DA1 and DA2, which allows you to set the circuit gain K≥0 by changing the resistance value of resistor R2, indicated by an arrow. In fig. Figure 5 shows a diagram of a delay line made in the form of an RC circuit with digital signal shapers on logical inverters DD1 and DD2. Changing the resistance of resistor R, indicated by an arrow, allows you to change the slope of the RC filter output signal and, as a result, adjust the delay of the oscillation at the output of the circuit from the oscillation at its input.

The operation of the PLL ring when changing the amplitude of the adjusted oscillation and its phase shift relative to the reference oscillation (the mechanism is discussed in [7]) can be explained by timing diagrams in the modes of synchronizing oscillations of the same (Fig. 6) and different (Fig. 7) frequencies.

Since the PLL ring contains a logical phase discriminator that allows estimating the phase difference of both identical and multiple frequencies [9], the adjustable generator 9 _i can be configured to generate frequency iF _op , a multiple of the frequency F _op of the reference oscillation, where i=1, 2 , ..., N. The shape of the reference oscillation may differ from the shape of the oscillation created by the tuned generator 9 _i , since the comparator 11 _i converts the oscillation of the tuned generator to the shape of the reference oscillation. The frequency setting of the adjustable generator is carried out by determining the parameters of its frequency-setting circuits (RC circuit or LC circuit).

The mechanisms of operation of the PLL ring for the case of the formation of a harmonic oscillation with a frequency equal to the frequency of the reference oscillation (the case when the PLL ring number i=1) are illustrated by the voltage diagrams shown in Fig. 6. The PLL ring provides adjustment of oscillations U _op and U _n1 with a phase error [10]. The specified oscillation phase difference can also be displayed in the time dimension in the form of a delay Δt=0. Oscillation U _n1 is formed by delaying oscillation U _pr1 for a time Δt _z1 with an adjustable delay line, and oscillation U _np1 is obtained from oscillation U _g1 by converting its shape from sinusoidal to rectangular with digital logic levels using an analog comparator. Oscillations U _pr1 and U _r1 can be considered in-phase, if we neglect the delay in signal propagation through the comparator, and ahead of the oscillation U _op in time by the amount Δt _z1 or in phase by the amount where T _op is the period of the reference oscillation, equal to the period of the adjusted oscillation T ₁ . In this case, the amplitude U _A1 of the U _r1 oscillation can be any, since this oscillation is subsequently converted into a unipolar pulse oscillation, similar in shape to the U _op and U _p1 oscillations supplied to the APD inputs.

The mechanism of operation of the PLL ring in the process of adjusting multiple frequencies (the case of the PLL ring with number i-2 is considered) is illustrated by the voltage diagrams presented in Fig. 7. Oscillations U _op with frequency and U _n2 frequency synchronized on the leading edges of oscillations with a phase error since Δt=0. The delay of the oscillation U _p2 relative to the oscillation U _pr2 for a time Δt _z2 provides a phase shift between the indicated oscillations where T ₂ is the period of the adjusted oscillation. A corresponding phase shift is also provided between the oscillations U _op and U _g2 .

The amplitude of the adjusted oscillation U _r2 can be adjusted using a ring voltage amplifier. In this case, its value, with the exception of the case U _r2 = 0, does not affect the operation of the PLL ring, since the shape of the output oscillation is converted through the comparator to the pulse form necessary to ensure the operation of the APD. When the gain of the voltage amplifier is zero, the output of the PLL ring is set to zero voltage. That is, in this case, the PLL ring does not contribute to the formation of the output oscillation of the GSPF.

The output waveform of an arbitrary waveform generator is represented by where A _i is the amplitude of the i-th harmonic component of the oscillation, t is time, - phase of the i-th harmonic component. As an example of the synthesis of an arbitrary waveform, let us consider its implementation based on three harmonic components with frequencies F _op , 2F _op , 3F _op with arbitrary values of amplitudes and phases.

The formula that determines the relationship between the output voltage U _out = U _g and the voltages on the basis of which its synthesis is realized is as follows:

The mechanism for obtaining the output oscillation U _g of the generator at amplitudes A ₁ = 0.5, A ₂ = 0.%, A ₃ = 0.7, frequencies F _op = 1000, 2 F _op = 2000, 3 F _op = 3000 and phases ϕ ₁ = π/6, ϕ ₂ =-2π/3, ϕ ₃ =2π/3 its constituent harmonic oscillations are shown in Fig. 8.

BIBLIOGRAPHICAL LIST

1. A.s. No. 2019908 MPK N03K 4/00. Generator of complex waveforms. / Kiryukhin K.N., Frolenkov M.A. Declared 04/25/1991 (No. 4931515/21); publ. 09/15/1994.

2. Pat. RF No. 99120936 IPC N03K 4/02. A method for generating a signal of complex shape. / Kaplya E.I. Declared 10/04/1999 (No. 99120936/99); publ. 10.09.2001.

3. Dedyukhin A.A. Precision signal generators of complex shapes A-KIP GSS-93/1 and GSS-93/2.// Components and technologies. 2004. No. 3. - pp. 204-206.

4. Zhilin N.S. Principles of phase synchronization in measurement technology. - Tomsk: Radio and Communications, 1989. - 384 p.

5. Ridiko L. DDS: Direct frequency synthesis // Components and technologies. 2001. No. 8.-P.50-56.

6. A.s. USSR No. 1019361 MKI G01R 25/04. Device for adjusting the amplitude and phase of alternating voltage in compensation voltage meters / Zhilin N.S. Declared 05/16/1978 (No. 2618527/18-25); publ. 05/23/1983. Bull. No. 19.

7. Pat. RF No. 2689432 IPC H03L 7/00. Functional converter with adjustment of the amplitude and phase of the output oscillation / Kholopov SI. Declared 05/07/2018 (No. 2018116919); publ. 05/28/2019.

8. Kholopov S.I. Expanding the capture bandwidth of a relay astatic phase synchronization system // Bulletin of the RGRTU. - Ryazan, 2013. No. 3 (issue 45). - P. 49-53.

9. Kholopov S.I. Mathematical model of a coherent frequency multiplier // Vestnik RGRTA. - Ryazan, 1998. Issue 4. - P.26-29.

10. Kholopov S.I. Study of a method for increasing the acquisition bandwidth of a phase synchronization relay system // Vestnik RGRTU. - Ryazan, 2016. No. 3 (issue 57). - P. 9-14.

Claims (1)

An arbitrary waveform generator containing a reference frequency generator and an N-input voltage adder, the output of which is the output of an arbitrary waveform generator, characterized in that N phase-locked loop (PLL) rings (systems) are introduced, having the same structure, the inputs of which are connected to output of the reference frequency generator, and the output of each PLL ring is separately connected to a separate input of the N-input voltage adder, each PLL ring contains a logical phase discriminator (APD), the first input of which is connected to the input of the PLL ring, and the APD outputs are connected to the inputs of the bipolar nonlinear shaper control voltages, the output of which is connected to the inputs of the integrator and the proportional link, the outputs of which are connected to the inputs of the voltage adder, the output of the voltage adder is connected to the control input of the adjustable harmonic oscillation generator, the output frequency of which has a multiple of the reference oscillation frequency equal to the number of the PLL ring, the output of the adjustable The generator is connected to the input of a voltage amplifier, which has an adjustment element that allows you to change the transmission coefficient of the voltage amplifier, the output of the voltage amplifier, which is the output of the PLL ring, is connected to a voltage comparator with a zero comparison threshold, which converts the bipolar oscillation existing at the output of the voltage amplifier into a unipolar pulse oscillation with digital logic levels, the comparator output is connected to the input of the delay line with an adjustment element that allows you to adjust the delay value (phase shift) of the pulse voltage at the output of the delay line relative to the pulse voltage at its input, the output of the delay line is connected to the second input of the logical phase discriminator.

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