KR102101797B1 - Frequency synthesizer using multiple direct digital synthesizer module - Google Patents

Abstract

A frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention, a reference signal generator for generating a reference clock signal; The n reference signals that are synchronized by receiving the same reference clock signal from the reference signal generator, deliver the sync clock signal, which is the signal equated by the input reference clock signal, to the control unit, and output signals in different frequency bands under control of the control unit Direct digital synthesizer module (where n is a natural number greater than or equal to 2); And a sync clock signal is input and synchronized, and controls to turn on or off any one of n direct digital synthesizer modules, but the signal output from the direct digital synthesizer module to be turned on. It characterized in that it comprises a; control unit for controlling the frequency.

Description

Frequency synthesizer using multiple direct digital synthesizer module

The present invention relates to a frequency synthesizer using a plurality of direct digital synthesizer modules, and more particularly, to a wideband frequency synthesizer having a wide width between a minimum frequency signal and a maximum frequency signal that can be output by using multiple direct digital synthesizers. .

The frequency synthesizer converts a reference signal to generate output signals of various frequencies. Types of such frequency synthesizers include indirect frequency synthesizers and direct digital synthesizers (DDS).

The indirect frequency synthesizer uses a phase lock loop (PLL), and after detecting the phase difference between the reference signal at the input terminal and the output signal at the output terminal with a PLL, the detected value is the voltage value through the filter. It is a method of changing to and outputting an output signal having a frequency corresponding to a corresponding voltage value through a voltage controlled oscillator (VCO). At this time, the indirect frequency synthesizer inputs the output signal back to the phase detector through the feedback loop. By adjusting the frequency division ratio of the counter in the feedback loop, an output signal of a desired frequency can be output.

However, as the indirect frequency synthesizer uses a phase lock loop (PLL), a direct digital synthesizer having excellent frequency conversion speed performance and frequency resolution performance has been developed because the frequency conversion speed is slow and it is difficult to precisely control the frequency.

1 shows a general block diagram of a direct digital synthesizer.

The direct digital synthesizer, as shown in FIG. 1, a phase accumulator (PA), a phase-to-sine converter (PSC), a digital-to-analog converter (DAC) converter), and a low pass filter (LPF), the operation of which is as follows.

That is, the phase accumulator PA outputs appropriate phase information for every clock of the reference signal CLK _R according to the frequency information F _CW received from the outside. Then, the phase-sine converter (PSC) outputs the amplitudes of the sine and cosine functions corresponding to the input phase information. At this time, the method of calculating the sine and cosine values by the phase-sine converter (PSC) is a CORDIC (Coordinated Rotation Digital Computer) method that uses an iterative operation, a ROM (Read-Only Memory) method that stores function values in advance, and linear interpolation. and (interpolation) techniques. Thereafter, the DC-AC converter converts the digital value output from the phase-sine converter (PSC) into an analog value, and the low-pass filter (LPF) finally filters the corresponding value to output a signal having a constant frequency. do.

On the other hand, radar systems (hereinafter referred to as broadband use systems) output signals at high resolution frequencies such as the Ka band band of 26.5 kHz to 40 kHz (also satisfies DAC Time Resolutions of 5 kHz or less). A wide frequency (eg, 1 kHz or more) frequency synthesizer having a wide width (hereinafter referred to as “bandwidth”) between frequency signals is required. However, such a requirement could not be satisfied with a conventionally developed direct digital synthesizer.

Therefore, in order to satisfy the requirements of the broadband use system, it is possible to derive a frequency synthesizer in which a plurality of frequency multipliers and mixers are combined in a single direct digital synthesizer module provided in a module form. However, such a frequency synthesizer requires a large number of multipliers and mixers due to the limited bandwidth of one direct digital synthesizer module itself. That is, in the case of such a frequency synthesizer, problems such as an increase in signal loss and an increase in unnecessary wave level were inevitable due to an increase in the number of multiplication and mixing.

To solve this problem, it is possible to derive a technique to overcome the limitation of bandwidth by changing the internal configuration of one direct digital synthesizer module itself. However, since this technique corresponds to a technique that needs to change the internal configuration of a direct digital synthesizer module manufactured in the related art, another problem arises in that manufacturing cost is increased according to a new process.

In order to solve the problems of the prior art as described above, the present invention can reduce the number of additionally connected frequency multipliers and mixers to a minimum by outputting a wideband signal using a plurality of direct digital synthesizer modules previously manufactured. Accordingly, an object of the present invention is to provide a wideband frequency synthesizer capable of minimizing signal loss and unwanted levels.

However, the problems to be solved by the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description.

Frequency synthesizer using a plurality of direct digital synthesizer module according to an embodiment of the present invention for solving the above problems, (1) a reference signal generator for generating a reference clock signal, (2) the same reference from the reference signal generator N direct digital synthesizer modules that receive and synchronize clock signals, deliver a sync clock signal, which is the same signal as the input reference clock signal, to the controller, and output signals in different frequency bands under the control of the controller (however , n is a natural number greater than or equal to 2), (3) Synchronizes by receiving a sync clock signal, and controls to turn on any one of n direct digital synthesizer modules and turn off the rest. It includes a control unit that controls the frequency of the signal output directly from the digital synthesizer module.

At this time, the maximum frequency of the signal output from the k-th direct digital synthesizer module (where k is a natural number between 1 and n-1) may be the same as the minimum frequency of the signal output from the k + 1 direct digital synthesizer module. .

The bandwidth of the signal output from each direct digital synthesizer module may be different.

The frequency of the second harmonic to the minimum frequency of the signal output from the k-th direct digital synthesizer module may be included between the minimum frequency and the maximum frequency of the signal output from the k + 1 direct digital synthesizer module.

The width (BW _k ) between the minimum frequency and the maximum frequency of the signal output from the k-th direct digital synthesizer module may satisfy the following equation.

(expression)

BW _K = 2F _K Ⅹ C _BW

(F _K is the minimum frequency of the signal output from the k-th direct digital synthesizer module, C _BW is the bandwidth adjustment coefficient, and a value less than 1.)

The frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention, (1) each connected to the output of the n direct digital synthesizer module, n to filter the signal output from each direct digital synthesizer module Two low-pass filters, (2) may further include a coupler connected to the output of each low-pass filter.

At this time, the high-pass cutoff frequency of the m-th low-pass filter connected to the m-th direct digital synthesizer module (where m is a natural number between 1 and n) is greater than or equal to the maximum frequency of the signal output from the m-th direct digital synthesizer module. You can.

The frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention may further include a plurality of frequency multipliers sequentially connected to the output of the coupler.

The bandwidth of the final output signal multiplied by the multiple frequency multipliers may be 1 kHz or more.

The frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention is connected to a front end or a rear end of the frequency multiplier, and may further include one or more mixers to increase the frequency band of the signal.

The frequency band of the final output signal that is raised through the mixer and the plurality of frequency multipliers is a C band band, an X band band, a Ka band band, a Ku band band, a K band band, a V band band, a W band band, and an M band band. It can be either.

The frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention configured as described above is a frequency multiplier that is additionally connected by outputting a wideband signal using a plurality of direct digital synthesizer modules previously produced, and The number of mixers can be reduced to a minimum, thereby minimizing signal loss and unwanted levels and reducing manufacturing costs.

In addition, the frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention can easily perform a sweeping operation for sequentially outputting between a minimum frequency and a maximum frequency for the entire required frequency band that is a wide band. Therefore, it is useful for radar systems that require a wideband chirp signal.

In addition, the frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention presents a proper bandwidth setting method of each direct digital synthesizer module, such as the second harmonic of its own signal generated in each direct digital synthesizer module Can effectively remove unwanted waves.

In addition, the frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention, the frequency band of the Ka band band required for a wideband using system such as a radar system, bandwidth of 1㎓ or more, DAC Time Resolutions of 5㎱ or less A signal that satisfies the conditions described above may be output, but a corresponding signal may be output using the minimum number of frequency multipliers and the number of mixers.

1 shows a general block diagram of a direct digital synthesizer.
2 shows the structure of a frequency synthesizer using two direct digital synthesizer modules according to an embodiment of the present invention.
3 shows a graph of frequency over time when a frequency synthesizer using two direct digital synthesizer modules according to an embodiment of the present invention performs a sweeping operation for all required frequency bands.
4 shows the frequency band and bandwidth of each module in two direct digital synthesizer modules according to an embodiment of the present invention.
5 shows a frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention further comprising a plurality of frequency multipliers 20 and a mixer 30.

The above objects and means of the present invention and the effects thereof will be more apparent through the following detailed description in connection with the accompanying drawings, and accordingly, those skilled in the art to which the present invention pertains facilitate the technical spirit of the present invention. Will be able to practice. In addition, in the description of the present invention, when it is determined that the detailed description of the known technology related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted.

In addition, the terminology used herein is for describing the embodiments, and is not intended to limit the present invention. In the present specification, the singular form also includes the plural form in some cases unless otherwise specified in the phrase. As used in the specification, the terms “include”, “have”, “have” or “have” do not exclude the presence or addition of one or more other components other than the components mentioned.

In the present specification, the expressions “or”, “at least one”, etc. may represent one of the words listed together, or a combination of two or more. For example, “A or B”, “at least one of A and B” may include only one of A or B, and may include both A and B.

In the present specification, descriptions according to expressions such as “for example” may not exactly match the presented information, such as the cited characteristics, variables, or values, and are limited to tolerances, measurement errors, and measurement accuracy limitations. It should not limit the embodiment of the invention according to various embodiments of the present invention with effects such as modifications, including other factors known as.

In this specification, when a component is referred to as being 'connected' or 'connected' to another component, it may be directly connected to or connected to the other component, but other components in the middle It should be understood that it may exist. On the other hand, when a component is said to be 'directly connected' or 'directly connected' to another component, it should be understood that no other component exists in the middle.

Unless otherwise defined, all terms used in the present specification may be used as meanings commonly understood by those skilled in the art to which the present invention pertains. In addition, terms defined in the commonly used dictionary are not ideally or excessively interpreted unless specifically defined.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, hereinafter, for convenience of explanation, a case in which there are two direct digital synthesizer modules will be described, but the present invention is not limited to this, and the case of three or more direct digital synthesizer modules also belongs to the scope of the present invention. something to do.

2 shows the structure of a frequency synthesizer using two direct digital synthesizer modules according to an embodiment of the present invention.

Frequency synthesizer using a plurality of direct digital synthesizer module according to an embodiment of the present invention, as shown in Figure 2, includes a synthesizer (10). At this time, the synthesizing unit 10 is a configuration for outputting a wideband signal using a plurality of direct digital synthesizer modules, the reference signal generator 1, n (where n is a natural number of 2 or more) direct digital synthesizer module ( 2) and a control unit 3, and may further include a filter 4 and a coupler 5.

A reference signal generator 1 generates a reference clock signal (CLK _R), the generated reference clock signal (CLK _R) are input to the respective direct digital synthesizer module (2). At this time, the reference clock signal CLK _R is a signal for synchronization, and the same signal can be used for synchronization between each direct digital synthesizer module 2 by being input to each direct digital synthesizer module 2.

The direct digital synthesizer module 2 is a module that provides the functions of the direct digital synthesizer, and is provided with a plurality, and outputs signals in different frequency bands according to the control signal CON _m of the control unit 3 (however, m is a natural number between 1 and n). In particular, each direct digital synthesizer module 2 is synchronized by receiving the same reference clock signal CLK _R from the reference signal generator 1 and is a synchronized clock signal, which is a signal synchronized by the input reference clock signal CLK _R. (CLK _S ) is generated and transmitted to the control unit 3.

For example, the direct frequency synthesizer module 2, as shown in FIG. 1, the direct digital synthesizer, as shown in FIG. 1, a phase accumulator (PA: Phase Acculmulator), a phase-sine converter (PSC) : A phase-to-sine converter (DAC), a digital-to-analog converter (DAC), and a low pass filter (LPF) may be included, but is not limited thereto.

The controller 3 receives and synchronizes the sync clock signal CLK _S from the direct digital synthesizer module 2, and turns on any one of n direct digital synthesizer modules 2 and turns off the rest. Order. In addition, the control unit 3 controls the frequency of the signal output from the direct digital synthesizer module 2 to be turned on.

At this time, the m direct the k-th control signal (CON _k) transmitting a control section 3 for controlling the digital synthesizer module (2 _m) to the m-th direct digital synthesizer module (2 _m) is the m-th direct digital synthesizer module ( 2 _m ) may include power control information for turning on / off and frequency information F _CW to be output by the _m- th direct digital synthesizer module 2 _m . Further, the k-th control signal CON _k may include only the frequency information F _CW without additional power control information. In this case, the controller 3 transmits frequency information (F _CW ) to the direct digital synthesizer module 2 to be turned on, and controls the signal to be output from the corresponding direct digital synthesizer module 2, frequency the information (F _CW) are not passed, a direct digital synthesizer module (2) is not outputting the signal of course there is no frequency information (F _CW).

The filter 4 is provided with n, and is respectively connected to the outputs of the n direct digital synthesizer modules 2 to filter the signal output from each direct digital synthesizer module 2. That is, the m-th filter 4 _m is connected to the _m- th direct digital synthesizer module 2 _m . In this case, the filter 4 may be a low pass filter (LPF) or a band pass filter (BPF).

When the filter 4 is implemented as a low-pass filter, the high-pass cutoff frequency of the m-th filter 4 _m is greater than the maximum frequency F _{m + 1} of the signal output from the _m- th direct digital synthesizer module 2 _m . It is preferable to be the same. If these conditions are not satisfied, an unnecessary signal may be included in the output signal. For example, when the minimum frequency F ₁ of the first direct digital synthesizer module 2 _a is 90 MHz and the maximum frequency is 140 MHz, the high pass cutoff frequency of the first filter 4 _a implemented as a low pass filter is 140 It is preferable that it is ㎒ or more. Accordingly, the first filter 4 _a passes only the frequency signal of 140 MHz or less among the signals output from the first direct digital synthesizer module 2 _a , and blocks the remaining signals (such as unnecessary waves).

In addition, when the filter 4 is implemented as a band pass filter, the low-pass cutoff frequency of the m-th filter 4 _m is smaller than the minimum frequency F _m of the signal output from the _m- th direct digital synthesizer module 2 _m . It is preferable that the high-frequency cutoff frequency of the m-th filter 4 _m is greater than or equal to the maximum frequency F _{m + 1} of the signal output from the _m- th direct digital synthesizer module 2 _m . If these conditions are not satisfied, an unnecessary signal may be included in the output signal. For example, when the minimum frequency F ₁ of the first direct digital synthesizer module 2 _a is 90 MHz and the maximum frequency is 140 MHz, the high pass cutoff frequency of the first filter 4 _a implemented as a band pass filter is 140 It is preferable that it is more than MHz, and the low-pass cutoff frequency is 90 MHz or less. Thus, the the first filter (4 _a) of the first direct digital synthesizer sikimyeo module (2 _a) passing only the frequency signal of less than 90㎒ to 140㎒ from the signal outputted from, and the other signal (undesired wave, and so on) block Order.

However, when the filter 4 is implemented as a band pass filter, not only is the configuration complicated, but the implementation cost can be high. Therefore, the filter 4 may be preferably implemented as a low-pass filter, but the present invention is not limited thereto.

The coupler 5 is connected to the output of each filter 4 to combine these outputs. That is, the coupler 5 may be a combiner that combines and outputs two signals.

3 shows a graph of frequency over time when a frequency synthesizer using two direct digital synthesizer modules according to an embodiment of the present invention performs a sweeping operation for all required frequency bands.

The maximum frequency of the signal output from the k-th direct digital synthesizer module (where k is a natural number between 1 and n-1) is the same as the minimum frequency of the signal output from the k + 1 direct digital synthesizer module (hereinafter, “ First condition ”.

For example, the first direct digital synthesizer module 2 _a may output any one or more signals from F ₁ to F ₂ , and the second direct digital synthesizer module 2 _b may be any one of F ₂ to F ₃ The above signal can be output. That is, the m-th direct digital synthesizer module 2 _m may output one or more signals from F _m to F _{m + 1} . At this time, F ₁ , F _2, … , F _{n + 1} are different frequencies.

As the first condition is provided, the frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention, as shown in Figure 3, the minimum frequency and the maximum frequency for the entire required frequency band that is broadband There is an advantage that it is possible to easily perform a sweeping (sweeping) operation for outputting in between. Such a wideband sweeping operation may be useful for radar systems that require a wideband chirp signal.

For example, referring to FIG. 3, when n is 2 and a switching operation is to be performed, the control unit 3 may include a first frequency rising output section P _1A , a second frequency rising output section P _2A , and a second The first direct digital synthesizer module 2 _a and the second direct digital synthesizer module 2 _b are controlled so that the frequency drop output section P _2D and the first frequency drop output section P _1D are repeated.

During the first frequency rise output section P _1A , the controller 3 turns on the first direct digital synthesizer module 2 _a to output signals sequentially from F ₁ to F ₂ , but the remaining second direct digital synthesizers The module 2 _b is turned off. Thereafter, during the second frequency rise output section P _2A , the controller 3 turns on the second direct digital synthesizer module 2 _b to output signals sequentially from F ₂ to F ₃ , but the remaining first direct a digital synthesizer module (2 _a) is turned off (off). Subsequently, during the second frequency falling output section P _2D , the controller 3 turns on the second direct digital synthesizer module 2 _b to output signals sequentially from F ₃ to F ₂ , but the remaining first direct a digital synthesizer module (2 _a) is turned off (off). Thereafter, during the first frequency falling output period P _1D , the control unit 3 turns on the first direct digital synthesizer module 2 _a to output signals sequentially from F ₂ to F ₁ , but the rest of the second direct The digital synthesizer module _2b is turned off.

The bandwidth (BW) of the signal output from each direct digital synthesizer module 2 may be different. At this time, the bandwidth means the width (or difference) between the minimum frequency signal and the maximum frequency signal that the direct digital synthesizer module 3 can output. For example, when n is 2, the bandwidth (BW ₁ ) of the first direct digital synthesizer module 2 _a is F ₂ -F ₁ , and the bandwidth (BW ₂ ) of the second direct digital synthesizer module 2 _b is Is F ₃ -F ₂ , and the bandwidth (BW _T ) of the two direct digital synthesizer modules 2 is F ₃ -F ₁ . That is, the bandwidth (BW _m ) of the mth direct digital synthesizer module (2 _m ) is F _{m + 1} -F _m , and the bandwidth (BW _T ) by the total direct digital synthesizer module 2 is F _{n + 1} -F _{It is 1} .

4 shows the frequency band and bandwidth of each module in two direct digital synthesizer modules according to an embodiment of the present invention.

Depending on the bandwidth set in each direct digital synthesizer module 2, the performance of removing unwanted waves may vary. To improve these spurious rejection performance, first claim k direct digital synthesizer module (2 _k) 2 frequency of the harmonic of the lowest frequency (F _k) of the signal output from the (2F _k) is the k + 1 a direct digital synthesizer It can be included between the minimum frequency (F _{k + 1} ) and the maximum frequency (F _{k + 2} ) of the signal output from the module 2 _{k + 1} (hereinafter referred to as “second condition”).

For example, if n is 2, the required frequency bandwidth is 150 MHz, and the minimum frequency F ₁ of the first direct digital synthesizer module 2 _a is 90 MHz, the second harmonic of F ₁ is 2F ₁ (180 MHz). It should be included between the minimum frequency (F ₂ ) and the maximum frequency (F ₃ ) of the signal output from the second direct digital synthesizer module (2 _b ). In this case, since the second harmonic of F ₁ is outside the pass band of the first filter 4a, there is an advantage that the second harmonic of F ₁ is effectively removed by the first filter 4 _a . If the second harmonic of F ₁ , 2F ₁ (180 MHz) is equally included between the minimum frequency F ₁ and the maximum frequency F ₂ output from the first direct digital synthesizer module 2 _a , Since the second harmonic of F ₁ is within the pass band of the first filter 4 _a , the second harmonic of F ₁ is not filtered by the first filter 4 _a , so the entire signal characteristic is inevitably deteriorated.

In addition, in order to improve the rejection performance, the bandwidth (BW _k ) between the minimum frequency (F _k ) and the maximum frequency (F _{K + 1} ) of the signal output from the k-th direct digital synthesizer module (2 _k ) is The expression can be satisfied (hereinafter referred to as “third condition”).

(expression)

BW _K = 2F _K Ⅹ C _BW

At this time, F _K is the minimum frequency of the signal output from the k-th direct digital synthesizer module 2 _k , and C _BW is a bandwidth adjustment coefficient and is less than 1. That is, the bandwidth adjustment factor (C _BW) is at least of the signal outputted from the k-th direct digital synthesizer module up to the frequency of the signal output from the _{(2 k) (F k +} 1) is the k-th direct digital synthesizer module (2 _k) It is a coefficient value that sets the bandwidth (BW _K ) of the kth direct digital synthesizer module ( _2k ) so that it is less than the second harmonic of the frequency ( _Fk ).

For example, n is 2 and the first direct digital synthesizer module (2 _a), if the minimum frequency F of ₁ 90㎒, a first direct digital synthesizer module (2 _a) is designed to be less than the bandwidth of 2Ⅹ90㎒ = 180㎒ Should be. In this case, since the second harmonic of F ₁ is outside the pass band of the first filter 4 _a , the advantage of effectively removing the second harmonic of F ₁ by the first filter 4 _a is obtained. If, because the first direct digital synthesizer module (2 _a) in the case that more than 180㎒ bandwidth, the second harmonic of F ₁ makes the pass band of the first filter (4a), a second harmonic wave of the F ₁ Since the filtering is not performed by the 1 filter 4a, the entire signal characteristics are inevitably deteriorated.

In order to increase the noise rejection performance and at the same time to have the minimum number of direct digital synthesizer modules 2, the value of the bandwidth adjustment coefficient C _BW is a value between 0.6 and 0.9 (hereinafter referred to as “fourth condition”). Can be That is, when the value of the bandwidth adjustment coefficient (C _BW ) is less than 0.6, the bandwidth of one direct digital synthesizer module 2 is too narrow, and the number of direct digital synthesizer modules 2 required may increase. Further, when the value of the bandwidth adjustment coefficient (C _BW) is greater than 0.9, the k-th direct digital synthesizer module up to the frequency of the signal output from the _{(2 k) (F k +} 1) is the k-th direct digital synthesizer module (2 _k ), It approaches the second harmonic of the minimum frequency (F _k ) of the signal output. At this time, when the characteristics of the _k- th filter _4k are deteriorated, the second harmonic of F _k may be included in the signal without being filtered by the _k- th filter 4 _k . That is, the value of the bandwidth adjustment coefficient (C _BW ) is 0.9 or less, which is a means for setting the margin of the filtering characteristics of the _k- th filter _4k .

To increase the ease of implementation, n direct digital synthesizer modules 2 can be implemented with models of the same specification. At this time, the higher the frequency of the output signal, the direct digital synthesizer module 2 may generate unwanted waves other than harmonics. Therefore, the maximum frequency (F _{n + 1} ) among the signals output from each direct digital synthesizer module 2 is that of the direct digital synthesizer module 2 so that the direct digital synthesizer module 2 can operate within an appropriate SFDR. It is desirable that the frequency of the internal clock signal is less than or equal to the frequency.

For example, the direct digital synthesizer module 2 can be implemented with ADI's AD9910 module. At this time, the AD9910 has an internal clock signal of 225MHz, and when outputting a signal of 250MHz or higher, the SFDR deteriorates rapidly. Therefore, when implemented with AD9910, it is preferable that the maximum frequency (F _{n + 1} ) among the signals of the multiple direct digital synthesizer modules 2 is 225 MHz or less.

5 shows a frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention further comprising a plurality of frequency multipliers 20 and a mixer 30.

The frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention may further include a plurality of frequency multipliers 20 and a mixer 30 in addition to the synthesizer 10 described above.

A plurality of frequency multipliers 20 are provided, which are sequentially connected to the output of the coupler 5 to multiply each signal in turn. At this time, the multiplication factor of each frequency multiplier 20 may be 2 times, 3 times, or the like, and the frequency multiplier 20 having an appropriate multiplication factor is connected as necessary. In particular, in a broadband use system such as a radar system, a frequency synthesizer having a bandwidth of 1 kHz or more is required (hereinafter referred to as “first requirement”). Therefore, in order to satisfy the first requirement, the frequency multiplier 20 may be provided with a number that is such that the final bandwidth is 1 kHz or more.

For example, n is 2, the minimum frequency of the first direct digital synthesizer module 2 _a is F ₁ is 90 MHz, the maximum frequency of the first direct digital synthesizer module 2 _a and the second direct digital synthesizer module 2 _If F _{2 which} is the minimum frequency of _b ) is 120 MHz, and F _{3 which} is the maximum frequency of the second direct digital synthesizer module 2 _b is 220 MHz, in order to satisfy the first requirement, it has a double multiplication factor. Three frequency multipliers 20 are required.

That is, the total bandwidth (BW _T ) in the synthesis unit 10 is 220 MHz-90 MHz = 130 MHz. At this time, the bandwidth BW _A multiplied by the first frequency multiplier 20 _a is 260 MHz. Thereafter, the bandwidth BW _B multiplied by the second frequency multiplier 20 _b is 520 MHz. Thereafter, the bandwidth BW _C multiplied by the third frequency multiplier 20 _c is 1.04 kHz. Accordingly, when the three frequency multipliers 20 _a , 20 _b , and 20 _c having _a multiplication factor of 2 are sequentially connected, the first requirement can be satisfied.

The mixer 30 is provided in plural, and uses the local signal supplied from the local oscillator 40 to increase the frequency band of the current signal. At this time, the mixer 30 may be connected between the two frequency multipliers 30, or may be connected to the front or rear end of the frequency multiplier 30. In particular, in a broadband use system such as a radar system, a frequency synthesizer that outputs a frequency signal in the Ka band band of 26.5 kHz to 40 kHz is required (hereinafter referred to as “second requirement”). Therefore, in order to satisfy the second requirement, the mixer 30 may be provided with the number of bands of the final output signal as the Ka band band.

For example, n is 2, the minimum frequency of the first direct digital synthesizer module 2 _a is F ₁ is 90 MHz, the maximum frequency of the first direct digital synthesizer module 2 _a and the second direct digital synthesizer module 2 _When F ₂ , the minimum frequency of _b ) is 120 MHz, and F ₃ , the maximum frequency of the second direct digital synthesizer module 2 _b , is 220 MHz, a local frequency of 4 kHz is used to satisfy the second requirement. by mixing a first mixer (20 _a) and, above the second mixer (20 _b) that requires each of these mixer 20 for mixing with the local frequency of 8.2㎓ according to the first requirement to 3 It may be provided between the two frequency multipliers (20).

That is, the frequency of the signal output from the synthesis unit 10 is 90 MHz to 220 MHz. At this time, the frequency of the signal multiplied by the first frequency multiplier 20 _a is 180 MHz to 440 MHz. Then, the frequency of the signal mixed by the first mixer (30 _a) using the local frequency of 4㎓ is 4.18㎓ to 4.44㎓. Thereafter, the frequency of the signal multiplied by the second frequency multiplier 20 _b is 8.36 Hz to 8.88 Hz. Then, the frequency of the signal mixed by the second mixer (30 _b) using the local frequency of 8.2㎓ is 16.56㎓ to 17.08㎓. Thereafter, the frequency of the signal multiplied by the third frequency multiplier 20 _c is 33.12 kHz to 34.16 kHz. Thus, the three frequency multipliers 20 _a , 20 _b , 20 _c having _a multiplication factor as described above, and two mixers 30 _a , 30 _b connected between these frequency multipliers 20 _a , 20 _b , 20 _c ) Can also satisfy the second requirement.

That is, the frequency synthesizer using a plurality of direct digital synthesizer modules according to an embodiment of the present invention is a frequency multiplier that is additionally connected by outputting a wideband signal by using a plurality of previously manufactured direct digital synthesizer modules 2 and The number of mixers can be reduced to a minimum, thereby minimizing signal loss and unwanted levels and reducing manufacturing costs.

The local oscillator 40 is connected to the mixer 30 to supply a local signal, and may be implemented as a phase-locked voltage controlled oscillator (PLVCO), but is not limited thereto.

Frequency synthesizer using a plurality of direct digital synthesizer module according to an embodiment of the present invention, in addition to the Ka band band, C band band, X band band, Ku band band, K band band, V band band, W band band, M band Frequency signals such as bands can also be generated. At this time, depending on the frequency band to be generated, the number of the direct digital synthesizer module 2, the frequency multiplier 20 and the mixer 30, the multiplication factor of each frequency multiplier 20, and the local used by each mixer 30 The frequency of the signal can be adjusted.

On the other hand, in a broadband use system such as a radar system, a high-speed system having DC-AC conversion time resolutions of 5 µs or less is required (hereinafter referred to as “third requirement”). In order to satisfy the third requirement, a direct digital synthesizer module 2 having a corresponding DC-AC converting time resolution may be selected. For example, ADI's AD9910 has a DC-AC conversion time resolution of about 4.4 µs, so the third requirement can be satisfied when implementing the digital synthesizer module 2 directly with the AD9910.

In the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention is not limited to the described embodiments, it should be defined by the scope of the claims to be described later and those equivalent to the scope of the claims.

1: Reference signal generator 2: Direct digital synthesizer module
3: Control 4: Filter
5: coupler 10: synthesis section
20: multiplier 30: mixer
40: local oscillator BW: bandwidth
CLK _R : Reference signal CLK _S : Sync clock signal
CON _m : Control signal DAC: DC-AC converter
F _CW : Frequency information LPF: Low pass filter
PA: phase accumulator P _mA : m frequency rise output section
P _mD : mth frequency falling output section PSC: phase-sine converter

Claims (10)

delete A reference signal generator that generates a reference clock signal;
The n reference signals that are synchronized by receiving the same reference clock signal from the reference signal generator, deliver the sync clock signal, which is the signal equated by the input reference clock signal, to the control unit, and output signals in different frequency bands under control of the control unit Direct digital synthesizer module (where n is a natural number greater than or equal to 2); And
The frequency of the signal output from the direct digital synthesizer module, which is synchronized to receive the sync clock signal and is controlled to turn on and off any of the n direct digital synthesizer modules. Control unit for controlling the; includes,
The maximum frequency of the signal output from the k-th direct digital synthesizer module (where k is a natural number between 1 and n-1) is the same as the minimum frequency of the signal output from the k + 1 direct digital synthesizer module. Frequency synthesizer using the direct digital synthesizer module of. According to claim 2,
Frequency synthesizer using a plurality of direct digital synthesizer module, characterized in that the bandwidth of the signal output from each direct digital synthesizer module is different. According to claim 2,
The frequency of the second harmonic with respect to the minimum frequency of the signal output from the k-th direct digital synthesizer module is included between the minimum frequency and the maximum frequency of the signal output from the k + 1 direct digital synthesizer module. Frequency synthesizer using digital synthesizer module. According to claim 2,
The width (BW _k ) between the minimum frequency and the maximum frequency of the signal output from the _k-th direct digital synthesizer module is a frequency synthesizer using a plurality of direct digital synthesizer modules characterized by satisfying the following equation.
(expression)
BW _K = 2F _K Ⅹ C _BW
(F _K is the minimum frequency of the signal output from the k-th direct digital synthesizer module, C _BW is the bandwidth adjustment coefficient, and a value less than 1.) A reference signal generator that generates a reference clock signal;
The n reference signals that are synchronized by receiving the same reference clock signal from the reference signal generator, deliver the sync clock signal, which is the signal equated by the input reference clock signal, to the control unit, and output signals in different frequency bands under control of the control unit Direct digital synthesizer module (where n is a natural number greater than or equal to 2);
The frequency of the signal output from the direct digital synthesizer module, which is synchronized to receive the sync clock signal and is controlled to turn on and off any of the n direct digital synthesizer modules. Control unit for controlling the;
N low-pass filters connected to the outputs of the n direct digital synthesizer modules and filtering signals output from each direct digital synthesizer module; And
And a coupler connected to the output of each low-pass filter.
The high frequency cutoff frequency of the mth low pass filter connected to the mth direct digital synthesizer module (where m is a natural number between 1 and n) is greater than or equal to the maximum frequency of the signal output from the mth direct digital synthesizer module Frequency synthesizer using multiple direct digital synthesizer modules. The method of claim 6,
A frequency synthesizer using a plurality of direct digital synthesizer modules further comprising a plurality of frequency multipliers which are sequentially connected to the output of the coupler. The method of claim 7,
Frequency synthesizer using a plurality of direct digital synthesizer module, characterized in that the bandwidth of the final output signal multiplied by the plurality of frequency multiplier is 1 ㎓ or more. The method of claim 7,
A frequency synthesizer using a plurality of direct digital synthesizer modules, which are connected to the front end or the rear end of the frequency multiplier and further include one or more mixers to increase the frequency band of the signal. The method of claim 9,
The frequency band of the final output signal that is raised through the mixer and the plurality of frequency multipliers is a C band band, an X band band, a Ka band band, a Ku band band, a K band band, a V band band, a W band band, and an M band band. Frequency synthesizer using a plurality of direct digital synthesizer module, characterized in that any one of.

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