RU2615070C1 - High-precision two-stage differential operational amplifier - Google Patents

Abstract

FIELD: physics, instrument-making.

SUBSTANCE: invention relates to radio electronics and can be used as a high-precision signal amplifier. The high-precision two-stage differential operational amplifier comprises an input differential stage (1), the common emitter circuit (2) of which is coupled with a first (3) power supply bus through a reference current (4) source, first (5) and second (6) current outputs of the input differential stage (1), first (7) and second (8) output transistors, bases of which are connected to a bias voltage (9) source, and emitters are connected through corresponding first (10) and second (11) current-stabilising two-terminal elements to a second (12) power supply bus, a current mirror (13), matched with the first (3) power supply bus, the input of which is connected to the collector of the first (7) output transistor, and the output is connected to the collector of the second (8) output transistor and the current output of the device (14). The reference current source (4) used is an input (15) controlled reference current source, wherein the control input (15) of the reference current source (4) is connected to the collector of the first (16) and second (17) additional transistors.

EFFECT: invention increases differential signal gain in open state of the two-stage operational amplifier to 90-400 dB.

2 cl, 7 dwg

Description

The invention relates to the field of electronics and can be used as a precision signal amplification device.

In modern electronic equipment, two-stage operational amplifiers (op amps) using field-effect and bipolar transistors based on the architecture of the “bent cascode” [1-25] are used. Their main advantages are the efficient use of supply voltage, as well as an extended frequency range.

To work in outer space, experimental physics requires radiation-resistant op amps with a high voltage gain (90-100 dB) and a low zero bias voltage (U _cm ). World experience in designing devices of this class shows that the solution to these problems is possible using a bipolar field process [22-25], which provides the formation of p-channel field and high-quality n-pn bipolar transistors with radiation resistance up to 1 Mrad and a neutron flux up to 10 ¹³ n / cm ² . However, for such an op-amp, a special circuitry is needed that takes into account the limitations of bipolar field technology [25].

The closest prototype of the claimed device is a two-stage operational amplifier according to the patent US 7.215.200, fig. 6. It contains (Fig. 1) an input differential stage 1, the common emitter circuit of which 2 is connected to the first 3 bus of the power source through the reference current source 4, the first 5 and second 6 current outputs of the input differential stage 1, the first 7 and second 8 output transistors, the bases of which are connected to a bias voltage source of 9, and emitters are connected through the first 10 and second 11 to the current-stabilizing two-terminal circuits with the second 12 bus of the power source, a current mirror 13, matched with the first 3 bus of the power source, the input of which connected to the collector of the first 7 output transistor, and the output is connected to the collector of the second 8 output transistor and the current output of the device 14.

A significant drawback of the known two-stage op-amp is that its total voltage gain (K _y ) is small. This is due to the fact that in the known circuit, the voltage gain is provided only by the output cascode on the first 7 and second 8 output transistors. In addition, in the range of working, primarily low temperatures, and also when exposed to a neutron flux, it has increased values of zero bias voltage (U _cm ) (several tens of millivolts). This is due to the increased influence on U _{cm of the} errors of the current mirror 13 and the input static current of the buffer amplifier 27 connected to the output 14. Ultimately, this reduces the precision of the known op-amp.

The main objective of the invention is to increase the gain of the differential signal in the open state of a two-stage op-amp to the level of 90 ÷ 100 dB.

An additional task is to reduce the bias voltage of zero.

The objectives are achieved in that in a two-stage differential operational amplifier containing an input differential stage 1, the common emitter circuit of which 2 is connected to the first 3 bus of the power source through the reference current source 4, the first 5 and second 6 current outputs of the input differential stage 1, the first 7 and second 8 output transistors, the bases of which are connected to a bias voltage source of 9, and emitters are connected through the corresponding first 10 and second 11 current-stabilizing two-terminal devices to the second 12 bus of the source power supply, current mirror 13, coordinated with the first 3 bus of the power source, the input of which is connected to the collector of the first 7 output transistor, and the output is connected to the collector of the second 8 output transistor and the current output of device 14, new elements and communications are provided - the circuit is introduced into as the reference current source 4, the reference current source controlled by the input 15, the control input 15 of the reference current source 4 being connected to the collectors of the first 16 and second 17 additional transistors, the base of the first 16 additional trans the source is connected to the first 5 current output of the input differential stage 1 and through the first 18 an additional current-stabilizing two-terminal is connected to the second 12 bus of the power source, the emitter of the first 16 additional transistor is connected to the emitter of the second 8 output transistor, the base of the second 17 additional transistor is connected to the second 6 current output input differential cascade 1 and through the second 19 additional current-stabilizing two-pole connected to the second 12 bus power source.

In FIG. 1 shows a diagram of an op-amp prototype, and in the drawing of FIG. 2 is a diagram of the inventive device in accordance with paragraph 1 of the claims.

In FIG. 3, in accordance with paragraph 2 of the claims, a particular embodiment of a reference current source 4 controlled by input 15 is provided.

In FIG. 4 presents a diagram of the claimed OS, in accordance with paragraph 2 of the claims.

In FIG. 5 is a diagram of the opamp of FIG. 4 in the environment of computer simulation PSpice on radiation-dependent models of integrated transistors ABMK_1_3 NPO Integral (Minsk).

In FIG. 6 shows the frequency dependence of the voltage gain of the op-amp of FIG. 5 without negative feedback (upper graph) and with negative feedback (lower graph).

In FIG. 7 shows the dependence of the zero bias voltage (U _cm ) of the op-amp circuit of FIG. 5 on temperature in the range of minus 60 ÷ + 80 ° С (a) and neutron flux (b) for the case when the transistors of the circuit do not have a spread of parameters, and the current mirror 13 and buffer amplifier 27 (Gain = 1) are ideal. This allows you to assess the ultimate capabilities of the structure of the claimed op-amp in terms of U _see

The precision two-stage differential operational amplifier (Fig. 2) contains an input differential stage 1, the common emitter circuit of which 2 is connected to the first 3 bus of the power source through the reference current source 4, the first 5 and second 6 current outputs of the input differential stage 1, the first 7 and second 8 output transistors, the bases of which are connected to a bias voltage source of 9, and emitters are connected to the second 12 bus of the power supply via the first 10 and second 11 current-stabilizing two-terminal circuits, the current mirror Lo 13, matched with the first 3 bus of the power source, the input of which is connected to the collector of the first 7 output transistor, and the output is connected to the collector of the second 8 output transistor and the current output of device 14. The source 4 controlled by input 15 is introduced into the circuit as a reference current source reference current, and the control input 15 of the reference current source 4 is connected to the collectors of the first 16 and second 17 additional transistors, the base of the first 16 additional transistor is connected to the first 5 current output of the input differential 1 cascade and through the first 18 additional current-stabilizing two-pole connected to the second 12 bus of the power source, the emitter of the first 16 additional transistor is connected to the emitter of the second 8 output transistor, the base of the second 17 additional transistor is connected to the second 6 current output of the input differential stage 1 and through the second 19 additional current-stabilizing two-terminal connected to the second 12 bus power source.

In the circuit of FIG. 2 input differential stage 1 is made on input field-effect transistors 20 and 21, the combined sources of which are connected to a common emitter circuit 2 of the input differential stage 1, the gates of transistors 20 and 21 are connected to the corresponding inputs 22 and 23 of the op-amp. Here, the bias voltage source 9 has (relative to the second 12 bus power supply) voltage U ₉ ≈2U _eB = 1.5 V.

In FIG. 3, the reference current source 4 controlled by input 15 contains an auxiliary field-effect transistor with a control pn junction 24 and an auxiliary local negative feedback resistor 25. The drain of the auxiliary field-effect transistor with a control pn junction 24 is connected to a common emitter circuit 2 of the input differential stage one.

In the circuit of FIG. 4, corresponding to claim 2 of the claims, a bias circuit of potentials 26 is provided, which makes it possible to reduce the influence of the Earley voltage of the first 7 and second 8 output transistors on the voltage of the zero-offset opamp. To reduce the output resistance of the op-amp, a buffer amplifier 27 can be provided, which has a low output resistance at the potential output 28.

Consider the operation of the opamp of FIG. four.

The static mode of the transistors of the circuit of FIG. 4, the current is set by the first 18, second 19 additional current-stabilizing two-pole and the first 10 and second 11 current-stabilizing two-pole, which are implemented on n-pn transistors. This helps to increase the radiation resistance of the OS during its manufacture as part of the ABMK_1_3 technological process [26]. In this case, the drain currents (I _ci ) and collector currents (I _ki ) of the transistors of the circuit at 100% negative feedback in the op-amp are determined by the Kirchhoff equations:

where I ₁₀ , I ₁₁ , I ₁₈ , I ₁₉ , are the currents of the first 10, second 11 current-stabilizing two-terminal networks, the first 18 and second 19 additional current-stabilizing two-terminal networks;

I ₂ = 4I ₀ - output current of the reference current source 4;

I ₀ is a certain given quantum of current, for example, I ₀ = 2 mA, which is chosen during the design of an op-amp.

For a differential signal, the alternating components of the collector currents of the first 16 and second 17 additional transistors compensate each other in the control input circuit 15 and do not affect the operation of the op-amp circuit. Therefore, the voltage gain Ku of the open circuit of the op-amp of FIG. 4 is determined by the expression:

where u _o.u - voltage increment at potential output 28, caused by a change in the input voltage of the op-amp (u _in. ) between inputs 22 and 23;

- коэффициент преобразования входного напряжения ОУ (u_вх) в напряжение между токовыми выходами 5 и 6 (u_5-6);

- the coefficient of conversion of the input voltage of the OS (u _I ) to the voltage between current outputs 5 and 6 (u _5-6 );

- коэффициент передачи напряжения между токовыми выходами 5 и 6 (u_5-6) в цепь токового выхода 14 (u₁₄);

- voltage transfer coefficient between current outputs 5 and 6 (u _5-6 ) to the circuit of current output 14 (u ₁₄ );

- коэффициент передачи по напряжению буферного усилителя 27.

is the voltage transfer coefficient of the buffer amplifier 27.

Moreover, the gain

where R _{equiv. 15-16} is the equivalent differential resistance between the bases of the first 16 and second 17 additional transistors;

R _{equiv. 14} is the equivalent resistance of the output node 14;

- эквивалентная крутизна входного дифференциального каскада на основе входных полевых транзисторов 20 и 21;

- equivalent slope of the input differential stage based on input field effect transistors 20 and 21;

S ₂₀ , S ₂₁ - steepness of the gate-gate characteristic of the corresponding input field-effect transistors 20 and 21;

r _eij is the resistance of the emitter junction of the ij-th transistor (r _eij = ϕ _t / I _eij );

ϕ _t = 25 mV - temperature potential;

I _eij is the static current of the emitter of the ij-th transistor;

K _i ≈1 is the current gain module of the current mirror 13;

S ₂ - the slope of the voltage conversion between the first 5 and second 6 current outputs into the output current of node 14.

The numerical value of the equivalent resistance R _{equiv. 15-16} is determined by the formula:

where β = β ₁₆ = β ₁₇ is the current gain of the base of the first 16 and second 17 additional transistors;

- сопротивление эмиттерных переходов соответствующих транзисторов.

- the resistance of the emitter junctions of the respective transistors.

As a result, due to the creation in FIG. 4 of the three high-impedance nodes 5, 6 and 14, the voltage gain of the open op amp, FIG. 4 turns out to be quite large (≈90 ÷ 100 dB):

In the op-amp prototype, this parameter is an order of magnitude smaller, since here the input differential stage 1 does not create voltage gain.

Due to the high symmetry of the circuit, the zero bias voltage of the claimed op-amp, in contrast to the op-amp prototype, is quite small (Fig. 7). This is due to a decrease in the influence on the current _cm errors of the current mirror 13, which has a high instability of the static mode under external influences due to the use of ABMK_1_3 pnp transistors [25].

Thus, the claimed device has significant advantages compared to the op-amp prototype.

BIBLIOGRAPHIC LIST

1. US Patent No. 5,422,600, fig. 2.

2. US Patent No. 4,406.990, fig. 3, fig. 4e

3. US patent No. 5.952.882.

4. US Patent No. 4,293.824.

5. US patent No. 5.323.121.

6. US Patent No. 5,420,540 fig. one.

7. US patent No. 6.825.721 fig 1B.

8. US Patent No. 6,542,030 fig. one.

9. US Pat. No. 6,456,162, fig. 2.

10. Patent US 6.501.333.

11. Patent US 6.717.466.

12. Patent application US No. 2002/0196079, fig 1.

13. US patent No. 4,600.893, fig. 7.

14. US patent No. 4.004.245.

15. US patent No. 7.411.451, fig. 5.

16. US patent No. 6.788.143, fig. one.

17. Patent US 4.387.309.

18. US patent 4.390.850.

19. Patent US 5.963.085.

20. Patent US 4.783.637, fig. 2.

21. Patent GB 2.035.003, fig. 2.

22. The element base of radiation-resistant information-measuring systems: monograph / N.N. Prokopenko, O.V. Dvornikov, S.G. Krutchinsky; under the general. ed. Doctor of Technical Sciences prof. N.N. Prokopenko; FSBEI HPE “South-Ros. state un-t economics and service. " - Mines; FSBEI HPE JURGUES, 2011. - 208 p.

23. Problems of designing analog devices with input field effect transistors. Part 1 / O. Dvornikov // Components and Technologies, No. 6, 2005, http://kit-e.ru/articles/device/2005_6_218.php

24. Problems of designing analog devices with input field effect transistors. Part 2 / O. Dvornikov // Components and Technologies, No. 7, 2005, http://kit-e.ru/articles/device/2005_7 _{_} 216.php

25. Problems of designing analog devices with input field effect transistors. Part 3 / O. Dvornikov // Components and Technologies, No. 8, 2005, http://kit-e.ru/articles/device/2005_8_184.php

Claims (2)

1. A precision two-stage differential operational amplifier containing an input differential stage (1), the common emitter circuit of which (2) is connected to the first (3) bus of the power source through the reference current source (4), the first (5) and the second (6) current the outputs of the input differential stage (1), the first (7) and second (8) output transistors, the bases of which are connected to a bias voltage source (9), and the emitters are connected through the first (10) and second (11) current-stabilizing two-terminal to the second ( 12) power supply bus then a mirror (13), matched with the first (3) bus of the power source, the input of which is connected to the collector of the first (7) output transistor, and the output is connected to the collector of the second (8) output transistor and the current output of the device (14), characterized in that a reference current source controlled by input (15) is used as the reference current source (4), and the control input (15) of the reference current source (4) is connected to the collectors of the first (16) and second (17) additional transistors, the base of the first ( 16) an additional transistor is connected to ne by the first (5) current output of the input differential stage (1) and through the first (18) additional current-stabilizing two-terminal device is connected to the second (12) bus of the power supply, the emitter of the first (16) additional transistor is connected to the emitter of the second (8) output transistor, the base of the second (17) an additional transistor is connected to the second (6) current output of the input differential stage (1) and through the second (19) additional current-stabilizing two-terminal device is connected to the second (12) bus of the power source. 2. The precision two-stage differential operational amplifier according to claim 1, characterized in that the reference current source (4), controlled by the input (15), contains an auxiliary field-effect transistor with a pn junction (24), the gate of which is connected to the first ( 3) by a power source bus, the source is connected to the control input (15) of the reference current source (4) and connected to the first (3) bus of the power source through an auxiliary resistor (25), and the drain of the auxiliary field-effect transistor with a control pn junction (24 ) connected to a common emitter epyu (2) of the input differential stage (1).

Images