RU2439780C1 - Cascode differential amplifier - Google Patents

Abstract

FIELD: radio engineering.

SUBSTANCE: cascode differential amplifier comprises the first and second input transistors, the first and second additional input transistors, from the first to the fourth auxiliary transistors, from the first to the fourth stabilising dipoles, the first and second resistors of a collector load, the first and second output transistors.

EFFECT: higher limit values of amplification ratio by DA voltage in case of low-voltage supply.

3 cl, 6 dwg

Description

The invention relates to the field of radio engineering and communications and can be used as a device for amplifying analog signals in the structure of analog microcircuits of various functional purposes (for example, SiGe-operational amplifiers, microwave amplifiers, comparators, continuous voltage stabilizers, etc.).

In modern microelectronics, classic cascode differential operational amplifiers (KDUs) with two resistors in the collector circuit of input transistors and output emitter followers are used [1-13]. This architecture is the basis of a wide class of analog and digital devices and is basic for both existing and new technologies.

The closest in technical essence to the claimed device is the input differential cascade in the device according to the patent US 6.262.628, fig.14В (or US 5.568.092, fig.1).

A significant drawback of the known DE, the architecture of which is also present in other amplification stages [1-13], is that under restrictions on the supply voltage (E _p ) characteristic of SiGe technological processes (E _p ≤2.0 ÷ 2.5 B), its voltage gain (K _у ) is small (K _уmax = 10 ÷ 20). This is primarily due to restrictions on the resistances of the collector load resistors, which, due to small E _p, cannot be selected as high-resistance. Therefore, to increase K _у, so-called dynamic loads (DNs) are used, for example, on bipolar transistors, which require a “loss” of static voltage U _DN = 0.8 ÷ 1.6 V between the power source and the output of the DN to ensure their linear operating mode . Moreover, the numerical values of U _ДН are equal to 0.8 V for the simplest dynamic loads, which, unfortunately, have a low output impedance:

where U _Earley - voltage Earley output pnp transistor DN;

I _e = I ₀ is the static current of the emitter pnp of the output transistor DN.

For integrated transistors U _Earley = 20 ÷ 30 V. Therefore, when I ₀ = 1 mA, the use of classical dynamic loads does not allow to obtain high values of K _y . Higher output resistances R _DNs are realized in Wilson current mirrors or cascode current mirror circuits. However, they only work if the static voltage between the terminals of such a dynamic load is more than 2U _eb ≥1.6 V. With a low-voltage power supply this is not acceptable. In addition, not all technical processes (for example, SGB25VD, introduced in Russia) allow the use of pnp transistors. For others, for example, radiation-resistant technologies (NPO Integral, Minsk), the use of pnp transistors is not recommended in conditions of radiation exposure to a microelectronic product.

Thus, at low supply voltages, and especially in those cases where it is necessary to obtain more or less significant amplitudes of the output voltage, the well-known circuitry solutions of the remote control are not effective.

The main objective of the invention is to increase the limit values of the gain in the voltage of the remote control at low voltage power.

The problem is solved in that in the cascode differential amplifier (Fig. 1), containing the first 1 and second 2 input transistors, the emitters of which are connected to the first 3 power supply through the first 4 current-stabilizing two-terminal, the first 5 auxiliary transistor, the emitter of which is connected to the collector of the first 1 input transistor, the collector is connected to the base of the first 6 output transistor and through the first 7 collector load resistor is connected to the second 8 power supply, the second 9 auxiliary transistor, emitter which is connected to the collector of the second 2 input transistor, the collector is connected to the base of the second 10 output transistor and through the second 11 collector load resistor is connected to the second 8 power supply, an auxiliary voltage source 12, connected to the bases of the first 5 and second 9 auxiliary transistors, the second 13 current-stabilizing two-terminal connected between the output 14 of the device associated with the emitter of the second 10 output transistor and the first 3 power source, the third 15 current-stabilizing two-terminal, included th between the emitter of the first 6 output transistor and the first 3 power source, and the collectors of the first 6 and second 10 output transistors are connected to the second 8 power source, new elements and communications are provided - the first 16 and second 17 additional input transistors are introduced into the circuit, as well as the third 18 and fourth 19 auxiliary transistors, emitters of the first 16 and second 17 additional input transistors are connected to emitters of the first 1 and second 2 input transistors, the collector of the second 17 additional input transistor pa is connected to the second 8 power source, the collector of the first 16 additional input transistor is connected to the collector of the first 1 input transistor, the bases of the first 16 and second 17 additional input transistors are connected to the corresponding bases of the first 1 and second 2 input transistors, the emitter of the first 6 output transistor is connected to the base of the fourth 19 auxiliary transistor, the collector of the fourth 19 auxiliary transistor is connected to the emitter of the second 9 auxiliary transistor, the emitters of the third 18 and fourth about 19 auxiliary transistors integrated and connected to a first power source 3 through a fourth two-pole tokostabiliziruyuschy 20, the base of the third auxiliary transistor 18 is connected to the emitter of the first auxiliary transistor 5 and the collector of the third auxiliary transistor 18 is connected to the second power source 8.

In Fig.1 shows a diagram of the remote control prototype.

A diagram of the inventive device corresponding to claim 1 of the claims is shown in figure 2.

Figure 3 shows a diagram of the CDA in accordance with claim 2 of the claims.

Figure 4 presents a diagram of the remote control prototype (figure 1) in a Cadence computer simulation environment on SiGe models of integrated transistors, and in figure 5 - the claimed CDU (figure 2).

The graph of Fig.6 characterizes the frequency dependence of the voltage gain (K _y ) compared KDU Fig.4 and 5.

The cascode differential amplifier (Fig. 2) contains the first 1 and second 2 input transistors, the emitters of which are connected to the first 3 power supply through the first 4 current-stabilizing two-terminal device, the first 5 auxiliary transistor, the emitter of which is connected to the collector of the first 1 input transistor, the collector is connected to the base the first 6 output transistor and through the first 7 collector load resistor is connected to the second 8 power supply, the second 9 auxiliary transistor, the emitter of which is connected to the collector of the second 2 lead transistor, the collector is connected to the base of the second 10 output transistor and through the second 11 collector load resistor is connected to the second 8 power supply, an auxiliary voltage source 12 connected to the bases of the first 5 and second 9 auxiliary transistors, the second 13 is a current-stabilizing two-terminal connected between output 14 devices associated with the emitter of the second 10 output transistor and the first 3 power source, the third 15 current-stabilizing two-terminal connected between the emitter of the first 6 output trans the resistor and the first 3 power supply, and the collectors of the first 6 and second 10 output transistors are connected to the second 8 power source. The first 16 and second 17 additional input transistors are introduced into the circuit, as well as the third 18 and fourth 19 auxiliary transistors, the emitters of the first 16 and second 17 additional input transistors are connected to the emitters of the first 1 and second 2 input transistors, the collector of the second 17 additional input transistor is connected to to the second 8 power supply, the collector of the first 16 additional input transistor is connected to the collector of the first 1 input transistor, the base of the first 16 and second 17 additional input transistors connected with the bases of the first 1 and second 2 input transistors, the emitter of the first 6 output transistor is connected to the base of the fourth 19 auxiliary transistor, the collector of the fourth 19 auxiliary transistor is connected to the emitter of the second 9 auxiliary transistor, the emitters of the third 18 and fourth 19 auxiliary transistors are combined and connected to the first 3 power supply through the fourth 20 current-stabilizing bipolar, the base of the third 18 auxiliary transistor is connected to the emitter of the first 5 auxiliary transistor, and the collector of the third 18 auxiliary transistor is connected to the second 8 power source.

In Fig. 3, in accordance with claim 2, a composite transistor containing a bipolar transistor 21 is used as the second 10 output transistor, the emitter circuit of which includes matching pn junctions 22.

In accordance with paragraph 3 of the claims, as the second 10 output transistor KDU, figure 3, can use a field effect transistor with an insulated gate. In this case, there is no need to apply matching pn junctions 22.

Consider the operation of the remote control of figure 2 on alternating current.

A positive change in the input voltage (u _I ) leads to a change in the emitter currents of the transistors 1, 16 and 2, 17:

- сопротивление эмиттерного перехода i-го транзистора при статическом эмиттерном токе I_эi=I₀;Where

- resistance of the emitter junction of the i-th transistor with a static emitter current I _ei = I ₀ ;

φ _t ≈25 mV - temperature potential.

Moreover, the total change in the currents of the common emitter circuit KDU i _eΣ = i _e1 + i _e16 = i _e17 + i _e2 .

The increments i _e1 , i _e16 and i _e2 are transmitted with a unit transmission coefficient through transistors 5 and 9 to the collector load resistors 7 and 11

wherein r _e = r _{A1 A2} ≈r ≈r _E16 ≈r _e17;

i ₁₉ - increment of the collector current of the transistor 19, caused by a change in voltage on the first 7 resistor of the collector load, and

where r _e18 , r _e19 - differential resistance of the emitter junctions of transistors 18 and 19;

S _1-16 - the steepness of the signal amplification from the base circuit of the transistor 1 to the base of the transistor 6, and

where r _e1 , r _e2 are the differential resistance of the emitter junctions of the first 1 and second 2 input transistors.

Therefore, the current in the resistor 11 (i _R1 = i _k2 + i _k19 )

In this regard, the voltage gain KDU, figure 2

In the CDU prototype

Therefore, the gain in K _y , which gives the proposed technical solution

i.e. N _to >> 1.

These theoretical conclusions are confirmed by the results of computer modeling (Fig.6), which show that the proposed amplifier has more than 10 times the best gain.

Thus, in the proposed KDU, figure 2, with low-resistance collector load resistors 7 and 11, higher values of the voltage gain are realized.

The inventive scheme is particularly promising for use in microelectronic SiGe products of microwave devices.

BIBLIOGRAPHIC LIST

1. US Patent Application 2010/007419, fig. 3.

2. US Patent No. 773,783.

3. US Patent No. 5568092, fig. 1.

4. U.S. Patent No. 6,100,759, fig. 3.

5. US Patent Application 2002/0093380, fig. 1.

6. US Patent Application 2009/0195312, fig. 1.

7. US Patent No. 3541465, fig. 3.

8. US Patent No. 5440271.

9. US Patent No. 6262628, fig.14B.

10. US Patent Application 2006/0181347, fig. 2.

11. US Patent Application 2006/0044064, fig. 2.

12. US Patent No. 6011431, fig. 3.

13. England patent GB 1520085, fig. 2.

Claims (3)

1. A cascode differential amplifier containing the first (1) and second (2) input transistors, the emitters of which are connected to the first (3) power source through the first (4) current-stabilizing two-terminal device, the first (5) auxiliary transistor, the emitter of which is connected to the collector of the first (1) input transistor, the collector is connected to the base of the first (6) output transistor and through the first (7) collector load resistor is connected to the second (8) power source, the second (9) auxiliary transistor, the emitter of which is connected to the collector of the (2) input transistor, the collector is connected to the base of the second (10) output transistor and through the second (11) collector load resistor is connected to the second (8) power source, an auxiliary voltage source (12) connected to the bases of the first (5) and the second (9) auxiliary transistors, the second (13) current-stabilizing two-terminal connected between the output (14) of the device connected to the emitter of the second (10) output transistor and the first (3) power source, the third (15) current-stabilizing two-terminal connected between the emitter the first (6) output transistor and the first (3) power source, and the collectors of the first (6) and second (10) output transistors are connected to the second (8) power source, characterized in that the first (16) and second ( 17) additional input transistors, as well as the third (18) and fourth (19) auxiliary transistors, emitters of the first (16) and second (17) additional input transistors are connected to the emitters of the first (1) and second (2) input transistors, the collector of the second (17) an additional input transistor is connected to the second at (8) the power source, the collector of the first (16) additional input transistor is connected to the collector of the first (1) input transistor, the base of the first (16) and second (17) additional input transistors are connected to the corresponding bases of the first (1) and second (2 ) input transistors, the emitter of the first (6) output transistor is connected to the base of the fourth (19) auxiliary transistor, the collector of the fourth (19) auxiliary transistor is connected to the emitter of the second (9) auxiliary transistor, the emitters of the third (18) and fourth (19) auxiliary power transistors are combined and connected to the first (3) power supply through the fourth (20) current-stabilizing two-terminal device, the base of the third (18) auxiliary transistor is connected to the emitter of the first (5) auxiliary transistor, and the collector of the third (18) auxiliary transistor is connected to the second (8) ) power source. 2. The cascode differential amplifier according to claim 1, characterized in that a composite transistor containing a bipolar transistor (21) is used as the second (10) output transistor, the emitter circuit of which includes matching p-n junctions (22). 3. The cascode differential amplifier according to claim 1, characterized in that an insulated gate field effect transistor is used as the second (10) output transistor.

Images