RU2513478C1 - Two-input "and" logic gate with multidigit internal signal presentation - Google Patents

Abstract

FIELD: physics, computer engineering.

SUBSTANCE: invention relates to computer engineering and automation, and can be used in different automatic control, information transmission systems etc. The two-input AND logic gate with multidigit internal signal presentation includes first (1) and second (2) input current quanta I₀ switches which are controlled by input logic voltage sources (3) and (4), a current-stabilising two-terminal element (5) connected between combined current outputs (6), (7) of the first (1) and second (2) input current quanta I₀ switches and the power supply bus (8). Current outputs (6), (7) of the first (1) and second (2) input current quanta I₀ switches are connected to the emitter of an additional transistor (9), the base of which is connected to a reference voltage source (10) and the collector is the logic current output of the device (11), wherein the current-stabilising two-terminal element (5) used is a reference current source whose output current is a multiple of the current quanta I₀.

EFFECT: high speed of operation and creating an element base for computing devices operating on multidigit linear algebra principles.

3 cl, 11 dwg

Description

The present invention relates to the field of computer engineering, automation and can be used in various systems of automatic control, information transfer, etc.

In various computing and control systems, “2-I” (LE) logic elements are widely used, implemented on the basis of emitter-coupled logic [1-12], operating according to the laws of Boolean algebra and having two logical states “0” and “1 at the output »Characterized by low and high potentials.

In [13], as well as in the monographs of the co-author of this application [14-15], it was shown that Boolean algebra is a special case of a more general linear algebra, the practical implementation of which in the structure of computing and logic devices of automation of a new generation requires the creation of a special element base, implemented on based on logic with a multi-valued internal representation of signals, in which the current quantum is the equivalent of a standard logic signal. The inventive device "2-I" refers to this type of logic elements.

The closest prototype of the claimed device is a logical element "2-I", presented in patent US 3.508.076, figure 1. It contains the first 1 and second 2 input switches of the current quantum I ₀ , controlled by sources of input logical voltages 3 and 4.

A significant drawback of the well-known “2-I” logical element is that, using potential binary signals, it has a complicated structure of connections, nonlinearity of the operating modes of the elements, and critical structure parameters of the LE and input signals, which ultimately leads to a decrease in its speed.

The main objective of the invention is to create a 2-I logic element, in which the internal transformation of information is carried out in a multi-valued current signal form, determined by the state of the input potential binary signals. Ultimately, this allows you to improve performance and create an elemental base of computing devices operating on the principles of multivalued linear algebra [14-15].

The problem is solved in that in the logic element “2-I”, containing the first 1 and second 2 input switches of the current quantum I ₀ , controlled by sources of input logical voltages 3 and 4, a current-stabilizing two-terminal 5 connected between the combined current outputs 6, 7 of the first 1 and 2 of the second input switches quanta current I ₀ and 8 bus power sources, provides new elements and connections - current outputs 6, 7 of the first 1 and second 2 of the input current switches quantum I ₀ are connected to the emitter of the additional transistor 9 whose base th is connected with reference voltage source 10 and whose collector is a logic current output device 11, and as a two-terminal network 5 is used tokostabiliziruyuschego reference current source, the output current is a multiple quantum of current I _0.

The diagram of the multi-valued logical element of the “2-I” prototype is shown in the drawing of FIG. 1. The drawing of figure 2 presents a diagram of the inventive device in accordance with claim 1 of the claims.

The drawing of figure 3 shows one of the possible circuits of the first 1 (or second 2) input switch of the current quantum I ₀ .

The drawing of figure 4 shows a diagram of the first 1 (or second 2) input switch of the current quantum I ₀ implemented in accordance with claim 2, claim 3 of the claims.

The drawing of figure 5 shows a diagram of the logical element of figure 2, in which the input switches 1, 2 quanta of current 1 _{0 are} implemented on the basis of differential stages of figure 4.

The drawing of Fig.6 shows a diagram of a non-inverting logic element "2-I" of Fig.5 in a Cadance environment on SiGe transistor models.

The drawing of Fig. 7 shows a graph of the transient process at the inputs and outputs of the LE of Fig. 6 when applying in-phase signals to the inputs (X ₁ = 1, X ₂ = 1; X ₁ = 0, X ₂ = 0), and in the drawing of Fig. 8 is a transient process at the inputs and outputs of the LE of FIG. 6 when rectangular impulses are fed to the inputs, 90 degrees shifted relative to each other (X ₁ = 1, X ₂ = 0).

The drawing of Fig.9 shows a diagram of the inverting logic element "2-I" on the basis of cascode in the environment Cadance on models SiGe integrated transistors.

The drawing of figure 10 shows the transient process at the inputs and outputs when applying in-phase signals to the inputs (X ₁ = 1, X ₂ = 1; X ₁ = 0, X ₂ = 0), and in the drawing of figure 11 - transient inputs and outputs when applying to the inputs of rectangular pulses shifted relative to each other by 90 degrees (X ₁ = 1, X ₂ = 0).

The logic element "2-I" with a multi-valued internal representation of the signals of figure 2 contains the first 1 and second 2 input switches of the current quantum I ₀ , controlled by sources of input logical voltages 3 and 4, a current-stabilizing two-terminal 5 connected between the combined current outputs 6, 7 of the first 1 and the second 2 input switches of quanta of current I ₀ and bus 8 power supplies. The current outputs 6, 7 of the first 1 and second 2 input switches of the current quantum I _{0 are} connected to the emitter of an additional transistor 9, the base of which is connected to the reference voltage source 10, and the collector is the logical current output of the device 11, and the reference source is used as a current-stabilizing two-terminal 5 current, the output current of which is a multiple of the current quantum I ₀ . In a particular case, the LE load is a two-terminal 12, simulating the effect of the LE load on the operation of the circuit and connected between the output of the device 11 and the common bus of the power source 13.

The drawing of figure 3 shows a special case of the construction of the input switches 1, 2 current quanta I ₀ , which are implemented on transistors 13, 15 and pn junction 16.

$$(\overline{7})$$

и неинвертирующими (6), (7) токовыми выходами и каждого из входных коммутаторов 1 и 2 кванта тока I₀.In the drawing of figure 4, in accordance with claims 2, 3 of the claims, each of the input switches 1, 2 of the current quantum I₀controlled by sources of input logical voltages 3, (4), is made in the form of differential stages on the first 18 and second 19 input transistors, the emitters of which are connected to the source 20 of the current quantum I₀ I₀, the base of the first 18 input transistor is connected to a source of input logic voltage 3, (4), the base of the second 19 input transistor is connected to a source of reference voltage 10, and the collectors of the first 18 and second 19 input transistors are connected to inverting $$(\overline{6})$$

$$(\overline{7})$$

 and non-inverting (6), (7) current outputs and each of the input switches 1 and 2 of the current quantum I₀.

Consider the work of the logical element "2-And" figure 2. The synthesis of the logical function "2-I" is based on its multi-valued analogue, described by the expression

$$x_{\mathrm{one}}\&x_2=\min \left(x_{\mathrm{one}},x_2\right)|\; |\; |{}_{k=2}=\frac{|\; |\; |x_{\mathrm{one}}+x_2|\; |\; |-|\; |\; |x_{\mathrm{one}}-x{}_2|\; |\; |}{2}=P\left(\left(x_{\mathrm{one}}+x_2\right)>\mathrm{one}\right),\left(\mathrm{one}\right)$$

where k is the significance of the logic, P ((x ₁ + x ₂ )> a) the predicate [14, 15];

x ₁ , x ₂ - input logic signals.

The predicate in accordance with (1) is implemented by adding current signals from the outputs of the current mirrors 5 and 6 and subtracting from this sum the quantum of current generated by the reference source 11. In this case, the output value of the predicate corresponds to a logical zero (no current) if the sum x ₁ + x _{2 is} less than or equal to one, and corresponds to a logical unit (the presence of a current quantum) if the sum of x ₁ + x _{2 is} greater than one.

The input of the logic element "2" according to the drawing of figure 2 from the sources of input logic voltages 3 and 4 receives signals that control the state of the keys S ₁ and S _{2 of the} input switches 1, 2 current quanta I ₀ that transmit current I ₀ to the emitter transistor 9.

In the off state, each key S _{ , S _{2 is} disconnected from the summation point. Moreover, the sum of their currents at the summation point is zero. When the state of one of the keys is on, the value of the corresponding current quantum takes the value I ₀ (“1”), and the value of their sum at the summation point is “1”. When the state of both keys is on, the values of the current quanta are “1”, and the value of their sum at the summation point is “2”. To this sum is added the current quantum I _{0 of the} current source 5 of the opposite direction. The current difference at the summation point is taken to be “0” if the sum of the key currents is greater than or equal to “1”, and equal to “1” if the sum of the key currents is equal to “0”. The result of the subtraction enters through the transistor 9 to the current output of the device 11.

As can be seen from the above description, the implementation of the “2-I” logical function is carried out here by forming the algebraic sum of the quanta of the output currents of the keys S ₁ , S ₂ (output switches 1 and 2) with the quantum of the output current of source 5 and the allocation of certain values of this sum of currents. All elements of the above circuit operate in active mode, which assumes the absence of saturation during the switching process, which increases the overall speed of the circuit. In addition, the use of multi-valued internal representation of signals increases the information content of communication lines, which reduces their number. The use of stable values of the current quanta, as well as the determination of the output signal by the difference of these currents, provides a small dependence of the circuit operation on external destabilizing factors (deviation of the supply voltage, radiation and temperature effects, common mode noise, etc.).

The difference of the logical element according to the scheme of figure 5 is the implementation of the input current switches 1, 2 (current switches S ₂ ) in the form of differential stages. A variant of this implementation is shown in the drawing of figure 4. The differential cascade of figure 4 produces a switching current quantum I ₀ . Moreover, the current source 20 in any state of the input logical signal does not exit the active mode, which increases the speed of the circuit.

Shown in the drawings of Fig.7, Fig.8 and Fig.10-Fig.11 simulation results confirm these properties of the claimed schemes. It should be noted that short-term pulses at the LE output that occur at the time of switching the input signals, which are also characteristic of other known logic elements, are determined by different switching times of the input switches of current quanta 1, 2 and can be eliminated in real circuits using technology.

Thus, the considered circuit solutions of the 2-I logic element are characterized by the multi-valued state of internal signals and the binary representation of the signal at its current output and can be the basis of computing and control devices using multi-valued linear algebra, a particular case of which is Boolean algebra.

BIBLIOGRAPHIC LIST

1. USSR Copyright Certificate SU 892729

2. Patent application WO 2004/112247

3. Patent US 4.001.603

4. Patent US 4.359.653

5. Patent US 6.157.693, fig. 5

6. Patent US 5.216.295

7. Patent US 3.758.791, fig. 5

8. Patent US 4,593.211

9. Patent US 4.347.446

10. Patent US 4.516.039, fig. 5

11. Patent US 4.970.416

12. Patent US 4.605.871, fig. 2

13. Malyugin V.D. The implementation of Boolean functions by arithmetic polynomials. // Automation and Telemechanics, 1982. No. 4. S.84-93.

14. Chernov N.I. Fundamentals of the theory of the logical synthesis of digital structures over the field of real numbers. // Monograph. - Taganrog: TRTU, 2001 .-- 147 p.

15. Chernov N.I. Linear synthesis of digital structures ASOIU.// Textbook. Taganrog. - TRTU, 2004, 118 p.

Claims (3)

1. Logic element “2-I” with a multi-valued internal representation of signals, containing the first (1) and second (2) input current quantum switches I ₀ controlled by the input logic voltage sources (3) and (4), current-stabilizing two-terminal network (5) connected between the combined current outputs (6), (7) of the first (1) and second (2) input switches of current quanta I ₀ and the bus (8) of power supplies, characterized in that the current outputs (6), (7) of the first (1) and the second (2) input switches of the current quantum I _{0 are} connected to the emitter of an additional transistor (9) whose base is connected to a reference voltage source (10), and the collector is the logical current output of the device (11), and a reference current source is used as a current-stabilizing two-terminal device (5), the output current of which is a multiple of the current quantum I ₀ . 2. A 2-I logic element with a multi-valued internal representation of signals according to claim 1, characterized in that each of the input switches (1), (2) of the current quantum I ₀ , controlled by the sources of input logical voltages (3), (4 ), made in the form of differential stages on the first (18) and second (19) input transistors, the emitters of which are connected to the source (20) of the current quantum I ₀ , the base of the first (18) input transistor is connected to the source of the input logical voltage (3), (4), the base of the second (19) input transistor is connected to a reference voltage source I (10), and the collector of the first (18) input transistor is connected to the inverting current output $$(\overline{6})$$

$$(\overline{7})$$

of each of the input switches (1) and (2) of the current quantum I ₀ . 3. A “2-I” logic element with a multi-valued internal representation of signals according to claim 1, characterized in that each of the input switches (1) and (2) of the current quantum I ₀ controlled by the sources of input logical voltages (3), (4 ), made in the form of differential stages on the first (18) and second (19) input transistors, the emitters of which are connected to the source (20) of the current quantum I ₀ , the base of the first (18) input transistor is connected to the source of the input logical voltage (3), (4), the base of the second (19) input transistor is connected to a reference voltage source (10), and the collector of the second (19) input transistor is connected to a non-inverting current output (6), (7) of each of the input switches (1) and (2) of the current quantum I ₀ .

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