RU2488954C1 - Differential amplifier with zero level of output static voltages - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: differential amplifier with a zero level of output static voltages has a first (1) and a second (2) input transistor, a first (5) and a second (6) output bipolar transistor, a first (7) reference current source, a first (8-9) group of antiphase current outputs (8) and (9) of the device, a second group (10, 11) of antiphase current outputs (10) and (11) of the device.

EFFECT: enabling conversion of input signals which vary relative to the power supply common bus to output voltages having constant component levels close to zero and also varying antiphase relative to the power supply common bus.

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Description

The invention relates to the field of radio engineering and communication and can be used as a device for amplifying broadband signals in the structure of analog microcircuits for various functional purposes (video amplifiers, operational amplifiers, continuous voltage stabilizers, signal multipliers, etc.).

There are known differential amplifiers (DEs) on complementary n-p-n and p-n-p-transistors [1-29], which form the basis of many analog microcircuits of leading microelectronic companies (µА741, µА748, µА776, etc.) [1].

The closest prototype (figure 1) of the claimed device is a differential amplifier according to US patent No. 4.901.031. It contains the first 1 and second 2 input transistors, the input control terminals of which are connected to the corresponding first 3 and second 4 inputs of the device, the first 5 and second 6 output bipolar transistors, the bases of which are connected to each other, the first 7 reference current source, the first (8 -9) a group of antiphase current outputs 8 and 9 of the device connected by the corresponding current outputs of the first 1 and second 2 input transistors, a second group (10, 11) of antiphase current outputs 10 and 11 of the device associated with the corresponding collectors of 5 th and 6 output the second bipolar transistor, wherein one terminal of the first injecting the input transistor is connected to the emitter of the first bipolar output transistor 5, injecting terminal of the second input transistor 2 is connected to the emitter of the second output transistor 6.

A significant disadvantage of the known remote control is that the level of the constant components of its output antiphase voltages is offset relative to the common bus of the power sources. This does not allow to provide in the remote control:

- high gain (Ku) at zero level of static voltage at the potential outputs of the device;

- cascode (serial) connection of two or more identical remote control units without special bias circuits of the static level of the remote control outputs relative to the common bus.

The main objective of the invention is to create conditions under which the output static voltage of the remote control is always close to the potential of the common bus power sources of the remote control. That is, such a remote control provides the conversion of input signals that change relative to the common bus of power supplies to output voltages, which have close to zero DC levels and also change out of phase with respect to the common bus of power supplies. Identical cascades of this class allow direct connection with each other and do not require special static level bias circuits that degrade their frequency and other properties.

This object is achieved in that in the differential amplifier of figure 1, containing the first 1 and second 2 input transistors, the input control terminals of which are connected to the corresponding first 3 and second 4 inputs of the device, the first 5 and second 6 output bipolar transistors, the bases of which are connected to each other with another, the first 7 source of reference current, the first (8-9) group of antiphase current outputs 8 and 9 of the device connected by the corresponding current outputs of the first 1 and second 2 input transistors, the second group (10, 11) of antiphase currents output outputs 10 and 11 of the device associated with the respective collectors of the first 5 and second 6 output bipolar transistors, the injection output of the first 1 input transistor connected to the emitter of the first 5 output bipolar transistor, the injection output of the second 2 input transistor connected to the emitter of the second 6 output transistor, new elements and communications are provided - the first 7 reference current source is connected between the collector of the first 5 output transistor and the first 12 bus of the power source, the second is additional 13, a reference current source is connected between the collector of the second 6 output transistor and the first 12 bus of the power source, between the collectors of the first 5 and second 6 output transistors, the first 14 and second 15 additional resistors are connected in series, the common node of which is connected to the bases of the first 5 and second 6 output transistors, and the collectors of the first 5 and second 6 output transistors are the antiphase potential outputs of the device 16, 17, and the floor uses the first 1 and second 2 input transistors transistors with control pn junctions, the gates of which are the input control pins of the first 1 and second 2 input transistors, the drains are the output current pins of the first 1 and second 2 input transistors, and the sources are the injection pins of the first 1 and second 2 input transistors.

The drawing of figure 1 shows a diagram of the remote control prototype, and the drawing of figure 2 is a diagram of the inventive device in accordance with claim 1.

The drawing of figure 3 shows the amplifier circuit in accordance with claim 2, where the first group (8, 9) of the antiphase current outputs of the differential amplifier is connected to the second 18 power supply bus via an additional load circuit 19, and the current outputs 8 and 9 are additional potential antiphase outputs of the device.

The drawing of Fig. 4 shows a diagram of the amplifier of Fig. 2 in a PSpice environment on models of integrated transistors ABMK_1_3 of NPO Integral (Minsk).

The drawing of figure 5 shows the dependence of the gain of the remote control of figure 4 from the resistances of the additional resistors R ₁ R ₂ (14 and 15 in the notation of figure 2).

The differential amplifier with a zero level of output static voltages of figure 2 contains the first 1 and second 2 input transistors, the input control terminals of which are connected to the corresponding first 3 and second 4 inputs of the device, the first 5 and second 6 output bipolar transistors, the bases of which are connected to each other , the first 7 source of the reference current, the first (8-9) group of antiphase current outputs 8 and 9 of the device connected by the corresponding current outputs of the first 1 and second 2 input transistors, the second group (10, 11) are out of phase current outputs 10 and 11 of the device associated with the respective collectors of the first 5 and second 6 output bipolar transistors, wherein injecting terminal of the first one of the input transistor is connected to the emitter of the first 5 output bipolar transistor injecting terminal of the second 2 of the input transistor is connected to the emitter of the second 6 of the output transistor. In this scheme, the first 7 reference current source is connected between the collector of the first 5 output transistor and the first 12 bus of the power source, the second additional 13 reference current source is connected between the collector of the second 6 output transistor and the first 12 bus of the power source, between the collectors of the first 5 and second 6 output transistors connected in series are connected the first 14 and second 15 additional resistors, the common node of which is connected to the bases of the first 5 and second 6 output transistors, and the antiphase potential and the outputs of the device 16, 17 are the collectors of the first 5 and second 6 output transistors, and the first 1 and second 2 input transistors use field-effect transistors with pn control junctions, the gates of which are the input control terminals of the first 1 and second 2 input transistors, the drains output current outputs of the first 1 and second 2 input transistors, and the sources - injecting conclusions of the first 1 and second 2 input transistors.

In the drawing of figure 3, in accordance with claim 2 of the claims, an additional load circuit 19 is introduced, containing in particular the load resistors 20 and 21.

Consider the work of the claimed remote control of figure 2.

With a zero input signal (u _input 1 = u _{input 2} = 0), the static mode of transistors 1, 2 and 5, 6 is set by the reference current sources 7 and 13:

$$I_{c\mathrm{one}}=I_{u\mathrm{one}}={\mathrm{<figure-callout\; id="5"\; label="I\; uh"\; filenames="00000010.png,00000011.png"\; state="\{\{state\}\}">I\; </figure-callout>}}_{\mathrm{uh}}=I_{\mathrm{to}5}={\mathrm{<figure-callout\; id="7"\; label="I"\; filenames="00000010.png,00000011.png"\; state="\{\{state\}\}">I</figure-callout>}}_7=I_0.(\mathrm{one})$$

$${\mathrm{<figure-callout\; id="2"\; label="I\; c"\; filenames="00000010.png,00000011.png"\; state="\{\{state\}\}">I\; </figure-callout>}}_c=I_{u2}=I_{\mathrm{<figure-callout\; id="6"\; label="uh"\; filenames="00000010.png,00000011.png"\; state="\{\{state\}\}">uh</figure-callout>}6}=I_{\mathrm{to}6}=I_{13}=I_0,(2)$$

where I _c , I _u are the drain and source currents of the field effect transistors 1, 2;

I _e , I _k - emitter and collector currents of transistors 5 and 6.

In this case, on the basis of the second Kirchhoff law, it can be found that the output static voltage of the control of FIG.

$$U_{\mathrm{at}sx\mathrm{.one}}=U_{s\mathrm{and}\mathrm{.one}}-\left(R_{\mathrm{fourteen}}\cdot I_b+U_{\mathrm{uh}b.5}\right)(3)$$

$$U_{\mathrm{at}sx.2}=U_{s\mathrm{and}.2}-\left(R_{\mathrm{fifteen}}\cdot I_b+U_{\mathrm{uh}b.5}\right).(\mathrm{four})$$

With relatively small voltages across the resistors 14 and 15 (R ₁₄ I _b = R ₁₅ I _b << U _{eb. 5} ) from (3), (4) for silicon technologies, one can obtain:

$$U_{\mathrm{at}sx\mathrm{.one}}\approx U_{s\mathrm{and}\mathrm{.one}}-0.7B,(5)$$

$$U_{\mathrm{at}sx.2}\approx U_{s\mathrm{and}.2}-0.7B.(6)$$

Gate-source voltage U _{communication} of the FET connected to the drain current (source) the following approximate formula

$$I_c=I_{c.\max }\left(\mathrm{one}-\frac{U_{s\mathrm{and}}}{U_{\mathrm{about}t\mathrm{from}}}\right),(7)$$

where I _c.max is the maximum drain current at U _zi = 0;

U _sb is the cutoff voltage at I _c ≈0.

Given that the numerical values of the gate-source voltage (U _link) field effect transistor with a control pn transition can be varied depending on the flow I current _from a wide range, from (5) and (6) one can find that for a linear approximation of the drain-gate characteristics of the field effect transistor (7) and the choice of currents of two-terminal networks 7 and 13 in accordance with the formula:

$${\mathrm{<figure-callout\; id="0"\; label="I"\; filenames="00000011.png,00000013.png"\; state="\{\{state\}\}">I</figure-callout>}}_0=I_{c.\max }\left(\mathrm{one}-\frac{0.7B}{U_{\mathrm{about}t\mathrm{from}}}\right)={\mathrm{<figure-callout\; id="7"\; label="I"\; filenames="00000010.png,00000011.png"\; state="\{\{state\}\}">I</figure-callout>}}_7=I_{13},(7)$$

output static voltages (5) and (6) in the claimed remote control will be close to zero. This analytical conclusion is confirmed by experiment. That is, to the outputs 16 and 17 of the remote control of FIG. 2, you can connect (without loss of efficiency of using the supply voltage) inputs 3 and 4 of the same remote control and increase the total K _of such a two-stage structure. In classical structures this is not possible.

Thus, the claimed device has significant advantages in comparison with the prototype.

BIBLIOGRAPHIC LIST

1. Operational amplifiers and comparators. M .: Dodeka Publishing House, 2001.- 560 p.

2. US Patent No. 3,786.362

3. US patent No. 4.030.044

4. US patent No. 4.059.808, figure 5

5. US Patent No. 4,286.227

6. Autosvid. USSR No. 375754, H03f 3/38

7. Autosvid. USSR No. 843164, H03f 3/30

8. US Patent No. 3,660.773

9. US Patent No. 4,560.948

10. RF patent No. 2930041, H03f 1/32

11. Japan Patent No. 57-5364, H03f 3/343

12. Patent of Czechoslovakia No. 134845, cl. 21a ² 18/08

13. Czechoslovak Patent No. 134849, cl. 21a ² 18/08

14. Patent of Czechoslovakia No. 135326, cl. 21a ² 18/08

15. US Patent No. 4,389.579

16. Patent of England No. 1543361, NZT

17. US patent No. 5.521.552 (figa)

18. US Patent No. 4.059.808

19. US Patent No. 5,789.949

20. US Patent No. 4,453.134

21. US Patent No. 4,760.286

22. Autosvid. USSR No. 1283946

23. RF patent No. 2019019

24. US Patent No. 4,389.579

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27. US patent No. 4.059.808 (figure 2)

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29. US patent No. 4.714.894 (figure 1).

Claims (2)

1. A differential amplifier with a zero level of output static voltages, comprising the first (1) and second (2) input transistors, the input control terminals of which are connected to the corresponding first (3) and second (4) inputs of the device, the first (5) and second ( 6) output bipolar transistors, the bases of which are connected to each other, the first (7) reference current source, the first (8-9) group of antiphase current outputs (8) and (9) of the device connected by the corresponding current outputs of the first (1) and second (2) input transistors, the second group (10, 11) pr anti-phase current outputs (10) and (11) of the device associated with the corresponding collectors of the first (5) and second (6) output bipolar transistors, the injection terminal of the first (1) input transistor being connected to the emitter of the first (5) output bipolar transistor the output of the second (2) input transistor is connected to the emitter of the second (6) output transistor, characterized in that the first (7) reference current source is connected between the collector of the first (5) output transistor and the first (12) power supply bus, the second to An additional (13) reference current source is connected between the collector of the second (6) output transistor and the first (12) bus of the power source, between the collectors of the first (5) and second (6) output transistors, the first (14) and second (15) are connected in series additional resistors, the common node of which is connected to the bases of the first (5) and second (6) output transistors, and the collectors of the first (5) and second (6) output transistors are the antiphase potential outputs of the device (16), (17), and as first (1) and second (2) input tr Anisistors use field-effect transistors with control pn junctions, the gates of which are the input control terminals of the first (1) and second (2) input transistors, the drains are the output current outputs of the first (1) and second (2) input transistors, and the sources are the injection terminals of the first (1) and second (2) input transistors. 2. A differential amplifier with a zero level of output static voltages according to claim 1, characterized in that the first group (8, 9) of the antiphase current outputs of the differential amplifier is connected to the second (18) power supply bus via an additional load circuit (19), and the current outputs (8) and (9) are additional potential antiphase outputs of the device.

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