RU2320078C1 - Complementary differential amplifier - Google Patents

Abstract

FIELD: radio engineering and communications, possible use as device for amplifying analog signals, in structure of analog microchips of various functional purposes (for example, operational amplifiers).

SUBSTANCE: complementary differential amplifier contains input differential cascade (1) on p-n-p input transistors (2) and (3), second differential cascade (10) on n-p-n input transistors (11) and (12). Introduced to the circuit are first and second additional p-n-p transistors (17) and (18), collectors of which are corresponding main outputs (19) and (20) of complementary differential amplifier, matched with the bus (18) of negative power supply, and also first and second additional n-p-n transistors (21) and (22), collectors of which are main outputs (23) and (24) of complementary differential amplifier, matched with the bus (15) of positive power supply, where bases of transistors (17) and (18) are connected to second current-stabilizing dipole (16) of differential cascade (10), bases of transistors (21) and (23) are connected to first current-stabilizing dipole (9) of differential cascade (1), emitters of transistors (21) and (22) are connected to collectors of transistors (11) and (12), emitters of transistors (17) and (18) are connected to collectors of transistors (2) and (3).

EFFECT: increased efficiency.

2 cl, 19 dwg

Description

The invention relates to the field of radio engineering and communication and can be used as a device for amplifying analog signals in the structure of analog microcircuits for various functional purposes (for example, operational amplifiers (op amps)).

There are known schemes of differential amplifiers (ДУ), implemented on the basis of two parallel-connected differential cascades (ДК) with reference current sources in the emitter circuits of input transistors (the so-called "dual input stage" or "complementary differential amplifiers (KDU)") [1-20 ]. According to this architecture, the modification of which issued about 100 patents of various countries, the operational amplifiers of leading microelectronic companies (AD8631, AD8632, HA2539, etc.) were made. However, in practical circuits of well-known KDUs, the attenuation coefficient of the input common-mode signal (K _os.sf ) is small (60 ÷ 80 dB) due to its significant dependence on the spread of the parameters of the input transistors characterizing the depth of their internal feedback (h ₁₂ ).

The closest prototype (figure 1) of the claimed device is a complementary differential amplifier (P. Shkritek. "Reference Guide to sound circuitry." M., Mir, 1991, p. 71, Fig.5.8.2c, or a patent from Motorola (USA) No. 5.153.529), containing the first 1 input differential cascade on the pnp input transistors 2 and 3, the bases of which are connected to the first 4 and second 5 inputs of the complementary differential amplifier, the collectors are connected to the first group of auxiliary outputs 6 and 7, matched with negative power supply bus 8, and emit ry connected to the first current-stabilizing two-terminal 9, the second 10 differential stage on the n-pn input transistors 11 and 12, the bases of which are connected to the first 4 and second 5 inputs of a complementary differential amplifier, the collectors are connected to the second group of auxiliary outputs 13 and 14, matched with bus 15 of a positive power source, and the emitters are connected to the second current-stabilizing two-terminal 16. The KDU described in the patent of the Russian company Mikron (patent No. 2193273) is made in the same architecture.

) отношениямиA significant drawback of the well-known KDU is that it has a relatively low attenuation of the input common-mode signals, which, when constructing current-stabilizing two-terminal circuits 9 and 16 using two-tier circuits [1], having an increased output resistance, is determined for each of the output groups (K _os.sf - 6-7) (

) relationships

where K _y >> 1 is the gain of the input differential signal of the CDA for the first (second) group of outputs;

To _sf. << 1 - transmission coefficient of the input common-mode signal of the CDA for the first (second) group of outputs;

- h-параметры транзисторов 2 и 3, 11 и 12 в схеме с общей базой.

- h-parameters of transistors 2 and 3, 11 and 12 in a circuit with a common base.

разность их h-параметров

определяющая коэффициент ослабления входных синфазных напряжений (К_ос.сф) КДУ, оказывается весьма значительной. Как следствие, при разных уровнях напряжений коллектор-база в статическом режиме (U_кб), которая имеет место во многих практических случаях (КДУ с активными нагрузками [21], КДУ с «перегнутыми» каскодами [1], [22] и т.д.), разность Δh_12.ij не равна нулю

. Поэтому численные значения К_ос.сф таких КДУ (даже при идеальных источниках опорного тока 9 и 16, устанавливающих токи эмиттера, и совершенно идентичных входных транзисторах 2 и 3, 11 и 12), лежат в пределах

(или K_ос.сф=60÷80 дБ). В большинстве случаев этого недостаточно.Indeed, due to the mode dependence of the depth of the internal feedback of the input transistors (2 and 3, 11 and 12)

difference of their h-parameters

the determining attenuation coefficient of input common-mode voltages (K _os.sf ) KDU, is very significant. As a result, at different collector-base voltage levels in static mode (U _kb ), which takes place in many practical cases (KDU with active loads [21], KDU with “kinked” cascodes [1], [22], etc. d.), the difference Δh _{12.ij is} not equal to zero

. Therefore, the numerical values of K _OS.sf such KDU (even with ideal sources of the reference current 9 and 16, setting the emitter currents, and completely identical input transistors 2 and 3, 11 and 12), are within

(or K _os.sf = 60 ÷ 80 dB). In most cases, this is not enough.

To prove this fact, the authors studied the dependence of the difference between the internal feedback coefficients (h ₁₂ parameters) of two completely identical transistors of different microelectronic companies on the static mode (collector-base voltage, emitter current).

The drawing of Fig. 2 shows the experimental design for the latest silicon-germanium transistors of the German company IHP in a Cadance computer simulation environment, and Fig. 3 shows the difference Δh ₁₂ = h _12.1 -h _12.2 = f (ΔU _kb ) of the pair of these identical transistors from the difference in their static collector-base voltages.

достигает значения

.From these graphs, in particular, it follows that when the collector-base voltage of two completely identical IHP transistors is different by ΔU _kb ≈0.6 V, their difference

reaches the value

.

при ΔU_кб≈2,5 В.Similar conclusions were made in the study of integrated transistors of FSUE NPP Pulsar in the computer simulation environment PSpice (Fig. 4, Fig. 5). Here the difference Δh is ₁₂ pairs of completely identical transistors

at ΔU _kb ≈ 2.5 V.

In addition, the input resistances for common-mode signals (R _{I.sf. 1} , R _{I.s. 2} ) of known _KDUs , depending on Δh ₁₂ and the collector junction resistances of transistors 2 and 3 (11 and 12), also turn out to be small (R _{I .sf.1 ≈R} input _sf2. ≈1 ÷ 2 mOhm).

The main objective of the proposed invention is to increase the attenuation coefficient of the input common-mode signals. An additional goal is to increase the input resistances for the common-mode signal (R _{in.s. 1} , R _{in.s. 2} ).

This goal is achieved in that in the complementary differential amplifier of figure 1, containing the first 1 input differential stage on the pnp input transistors 2 and 3, the bases of which are connected to the first 4 and second 5 inputs of the complementary differential amplifier, the collectors are connected to the first a group of auxiliary outputs 6 and 7, coordinated with the negative power supply bus 8, and the emitters are connected to the first current-stabilizing two-terminal 9, the second 10 differential cascade on the n-p-n input transistors 11 and 12, base The first ones are connected to the first 4 and second 5 inputs of a complementary differential amplifier, the collectors are connected to the second group of auxiliary outputs 13 and 14, matched to the bus 15 of the positive power supply, and the emitters are connected to the second current-stabilizing two-terminal 16, new connections are provided - the first 17 are introduced into the circuit and second 18 additional pnp transistors, the collectors of which are the corresponding main outputs of the complementary differential amplifier 19 and 20, which are negatively aligned with bus 18 about the power source, as well as the first 21 and second 22 additional n-pn transistors, the collectors of which are the main outputs 23 and 24 of the complementary differential amplifier, matched with the bus of the positive power source, and the base of the first 17 and second 18 additional p-n- p transistors are connected to the second current-stabilizing two-terminal 16, the base of the first 21 and second 23 additional npn transistors are connected to the first current-stabilizing two-terminal 9, emitters of the first 21 and second 22 additional transistors are connected to respective auxiliary outlets of the second group 13 and 14, the emitters of the first 17 and second 18 additional p-n-p transistors are connected to respective outputs of the first auxiliary group 6, and 7.

The diagram of the inventive device in accordance with claim 1 of the claims is shown in the drawing of Fig.6. In the drawings of FIG. 2, FIG. 3, FIG. 4, and FIG. 5, the previously discussed computer simulation results in Cadance and PSpice environments of a pair of transistors of various microelectronic companies are shown.

The drawing of Fig.7 shows a diagram of the inventive device in accordance with claim 2 of the claims.

The drawing of Fig. 8 shows a diagram of the device of the prototype of Fig. 1 in the computer simulation environment PSpice for the mode of calculating the transmission coefficient by the common-mode signal of the CDA (K _sf. ).

The drawings of Fig. 9 show the results of computer simulation of the input common-mode resistance of the KDU prototype (Fig. 8) in the PSpise environment on the models of integrated transistors of the Federal State Unitary Enterprise NPP "Pulsar" for the second (13 or 14) and first (6, 7) output groups for various the values of the difference ΔU _kb = V _dc = U _kb1 -U _kb2 , where U _kbi is the collector-base static voltage of the i-th transistor.

The drawing of figure 10 shows the dependence of the steepness (S _sf ) of the common-mode signal transmission u _c KDU of Fig. 8 for the first and second group of outputs of the KDU for different values of the difference of the coordinates of the static mode of the input transistors ΔU _kb = V _dc = U _kb1 -U _kb2 , where S _sf = i _o / u _c , i _o - output current of the control panel of Fig. 8. In the ideal case, it should be: S _sf = 0.

The drawing of Fig. 11 shows a diagram of the inventive CDU of Fig. 6 in a PSpice environment, and in the drawing of Fig. 12-Fig. 13 shows the dependence of its steepness S _c on the difference ΔU _kb = V _dc at different scales.

The graphs of the regime and frequency dependences of the input resistance of the KDU for the common-mode signal R _{I.sf of the} claimed KDU of Fig. 11 are shown in the drawing of Fig. 14.

In the figure, 15 is a diagram claimed in DCD 6 PSpice environment models integrated PNP transistors Federal State Unitary Enterprise "Pulsar", in which was studied the effect on the mutual transmission influence of the compensation phase signal S _sph collector-base capacitance C of _the transistor 17 (VT7) - 18 (VT8) and 21 (VT1) - 22 (VT2).

In the drawings of Fig.16 shows a graph of the frequency dependence of the slope of the conversion of the in-phase signal to the output current KDU (S = i _out (u _c )) for different values of capacitances C ₁ = C ₂ = C _to = 1 ÷ 20 pF and C ₃ = C ₄ = 15 pF.

In the figure, 17 is the curve of the upper limiting frequency slope S _sph (level 3 dB) when C ₁ = C ₂ = 15 pF = const and change C ₃ = C ₄ = C _k = 0 ÷ 20 pF. From this graph it follows that there is some optimal value of C _to ≈15 pF, at which the upper cutoff frequency of the slope reaches its maximum value.

The drawing of Fig. 18 shows a graph of the frequency dependence of the steepness of converting a common-mode signal to the output current of the CDD (S = i _out (u _c )) for various capacitances C ₁ = C ₂ = C _k = 2 ÷ 16 pF and C ₃ = C ₄ = 2 pF = const.

In the figure, 19 is the curve of the upper limiting frequency slope S _sph (level 3 dB) when C ₁ = C ₂ = 2 pF = const and change C ₃ = C ₄ = C _k = 0 ÷ 20 pF. From this graph it also follows that there is some optimal value of C _to ≈1.6 pF, and the gain in the boundary frequency in comparison with the non-optimal choice of C _to reaches the same order.

The complementary differential amplifier of Fig. 6 contains a first 1 input differential stage on the pnp input transistors 2 and 3, the bases of which are connected to the first 4 and second 5 inputs of the complementary differential amplifier, the collectors are connected to the first group of auxiliary outputs 6 and 7, matched with a negative power supply bus 8, and the emitters connected to the first current-stabilizing two-terminal 9, the second 10 differential cascade on the n-pn input transistors 11 and 12, the bases of which are connected to the first 4 and second 5 inputs of a complementary differential amplifier, the collectors are connected to the second group of auxiliary outputs 13 and 14, matched with the bus 15 of the positive power supply, and the emitters are connected to the second current-stabilizing two-terminal 16. The first 17 and second 18 additional pnp transistors are introduced into the circuit, the collectors of which are the corresponding main outputs 19 and 20 of the complementary differential amplifier, consistent with the bus 18 of the negative power supply, as well as the first 21 and second 22 additional n-p-n tra resistors, the collectors of which are the main outputs 23 and 24 of a complementary differential amplifier, matched with the bus 15 of the positive power supply, the bases of the first 17 and second 18 additional pnp transistors connected to the second current-stabilizing two-terminal 16, the base of the first 21 and second 23 additional n-p-n transistors are connected to the first current-stabilizing two-terminal 9, the emitters of the first 21 and second 22 additional transistors are connected to the corresponding auxiliary outputs of the second group steps 13 and 14, the emitters of the first 17 and second 18 additional rn-n transistors are connected to the corresponding auxiliary outputs of the first group 6 and 7.

The complementary control of FIG. 7 (claim 2) contains the CDA of FIG. 6, the outputs of which 19-20 and 23-24 are connected to the inputs of the summing stage 25, the output of which 26 is the main output of the device. As a summing stage 25, various schemes based on current mirrors and “kinked” cascodes described in the technical literature [1-22] can be used. Their main purpose is to coordinate the KDU of Fig.6 with output stages in the range of potential changes, amplification, noise, etc.

Consider the operation of the claimed remote control of Fig.6.

In static mode, when u _c1 = u _c2 = 0, the currents of the emitters of transistors 2, 3, 17, 18, 11, 12, 21, and 22 are determined by the currents through the two-terminal networks 9 and 16

The collector-base voltage of transistors 2 and 3, 11 and 12 are close to zero. However, transistors are active.

When the in-phase signal at inputs 4 and 5 changes, u _c = u _c5 = u _c4 (for example, u _c = 5 B), the voltage at the current-stabilizing two-terminal devices 9 and 16 changes by u _c :

As a result, the voltage at the bases of transistors 21 and 22, as well as 17 and 18, changes by u _c . In this case, the collector-base voltages of transistors 2 and 3 and 11, 12 remain constant over the entire range of u _c , which eliminates the influence of their internal inverses connections to K _OS.SF and input resistance for a common-mode signal R _C.SF.

Indeed, a comparison of the graphs of Fig. 12 (claimed KDU) and Fig. 10 (KDU-prototype) shows that in the proposed device, the dependence of S _sf (i.e., K _os.sf ) and R _{I.s. sf} on the non-identity of static voltages is significantly weakened collector-base of output transistors. At the same time, the absolute values of these parameters are significantly improved:

- To _os.sf at 20 dB (10 times);

- R _I.s.s from 1.8-1.9 mOhm to 70-80 mOhm, i.e. 35 ÷ 40 times.

Computer simulation To _os.sf claimed (Fig. 11) and known (Fig. 8) KDU on models of integrated transistors of FSUE NPP "Pulsar" of IHP firm (Germany) confirms the above conclusions.

It should be noted that the increase of K _OS.sf and R _I.s.sf in the inventive device is provided without deterioration of energy characteristics (current consumption), as well as the range of input common-mode signals (U _c.max ).

In addition, the KDU of FIG. 6 can operate at low supply voltages. This is an essential advantage of the claimed scheme.

One of the features of the claimed KDU is the presence of the effect of mutual compensation of the collector-base capacitance (C _k ) of additional transistors 17-18 and 21-22 on the transfer of the common mode signal from inputs 4-5 to any of the outputs of the KDU 19, 20, 23, 24. These capacitances adversely affect S _sf at high frequencies. However, in the inventive KDU with identical capacitance values

this effect is weakened.

Indeed, when equality (5) is fulfilled, the frequency range with respect to the steepness S _sf improves by 5–10 times. The gain becomes even more significant in the circuits of analog devices with increased values of C _k = 10 ÷ 20 pF transistors (for example, high-voltage and powerful transistors).

Analysis of the graphs of the frequency dependence of the steepness of converting a common-mode signal to the output current of the CDD (S = i _out (u _c )) (Fig. 17, Fig. 19) for various capacitances C ₁ = C ₂ = C _to = Var and C ₃ = C ₄ = const shows that there is some optimal value of C _k at which the gain in the boundary frequency (in comparison with the non-optimal choice of C _k ) reaches one order of magnitude. This is a significant advantage of the claimed device, because in other versions of constructing a CDA, these effects are absent.

BIBLIOGRAPHIC LIST

1. RF patent No. 2193273, H03F 3/45.

2. Japan Patent No. 53-25232, H03F 3/26, 98 (5) A332.

3. Patent US 2001/0052818 A1, H03F, 3/45.

4. Japanese Patent No. JP 8222972.

5. Auth. Testimonial. USSR No. 611288.

6. Matavkin V.V. High-speed operational amplifiers. - M.: Radio and Communications, 1989. - p. 103, Fig. 6.11.

7. US patent No. 6.366.170 B1, H03F / 45.

8. US Patent No. 6,268.769, H03F / 45.

9. US Patent No. 3,974.455, H03F / 45.

10. US Patent No. 3,968.451, H03F / 45.

11. US patent No. 4.837.523, H03F / 45.

12. US Patent No. 5.291.149, H03F / 45.

13. US Patent No. 4,636.743, H03F / 45.

14. U.S. Patent No. 4,783.637, H03F / 45.

15. US patent No. 5.515.005, H03F / 45.

16. US Patent No. 5.291.149, H03F / 45.

17. US patent No. 5.140.280, H03F / 45.

18. US Patent No. 5,455.535, H03F / 45.

19. US patent No. 5.523.718, H03F / 45.

20. US patent No. 4,600.893, H03F / 45.

21. US patent No. 5.374.897, figure 3.

22.P. Shkritek. Reference guide for sound circuitry. - M., Mir, 1991, p. 71, fig. 5.8.2c.

Claims (2)

1. A complementary differential amplifier containing the first input differential stage on the pnp input transistors, the bases of which are connected to the first and second inputs of the complementary differential amplifier, the collectors are connected to the first group of auxiliary outputs, matched to the bus of the negative power source, and the emitters are connected with the first current-stabilizing two-terminal device, the second differential cascade on n-p-n input transistors, the bases of which are connected to the first and second inputs of the complementary diff of a differential amplifier, the collectors are connected to the second group of auxiliary outputs matched to the bus of the positive power supply, and the emitters are connected to the second current-stabilizing two-terminal device, characterized in that the first and second additional pnp transistors are introduced into the circuit, the collectors of which are the corresponding main outputs complementary differential amplifier, matched to the negative power supply bus, as well as the first and second additional npn transistors, collectors to which are the main outputs of the complementary differential amplifier, matched to the bus of a positive power supply, the bases of the first and second additional pnp transistors connected to the second current-stabilizing two-pole, the bases of the first and second additional npn transistors connected to the first current-stabilizing two-terminal, emitters of the first and second additional transistors are connected to the corresponding auxiliary outputs of the second group, the emitters of the first and second supplement nyh p-n-p transistors are connected to respective outputs of the first auxiliary group. 2. The device according to claim 1, characterized in that the main outputs of the complementary differential amplifier, matched with the bus of the negative power supply, and the main outputs of the complementary differential amplifier, matched with the bus of the positive power source, are connected to the inputs of the summing stage, the output of which is the main output devices.

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