RU2093881C1 - Adaptive control system - Google Patents

Abstract

FIELD: automatic control of complex processes having digital controls. SUBSTANCE: all emergent situations which are possible for given controlled object are subsumed to single equivalence class for which set of N different alternative codes of control commands is assigned (N is greater than 1). Each control command can solve emergent situation with some probability. If subsequent application of all N alternative choices does not lead to elimination of current emergent situation, device sends alarm signal. Device has two registers, two units of AND gates, three memory units, comparator, address counter, control unit, clock oscillator, AND gate with one inverse input, unit of OR gates, N units for generation of alternative codes of control commands, counter and decoder. EFFECT: increased functional capabilities. 4 dwg

Description

 The present invention to automatic control systems and can be used to control complex technical systems for various purposes, mainly with a discrete nature of the technological cycle.

 Of the known devices of the same purpose, characterized by a combination of features similar to the set of essential features of the invention, the closest in technical essence is a device for situational control (ed. Certificate of the USSR N 1278811, G 05 B 19/18), which can serve in as a prototype. This device searches for the equivalence class of the current situation by the characteristic vectors of equivalence classes sequentially retrieved from the memory block and generates the control command code corresponding to the found class at the output. The disadvantage of this device is the appointment for the class of equivalence of situations of a single control command code. Meanwhile, practice shows that, in a number of cases, the same situation on a managed object can be resolved by applying one of several different alternative control command codes. In addition, if the required number of such alternative control command codes is sequentially applied, the application of the previous alternative control command code, if it was not able to resolve the current situation, can create the necessary conditions for the subsequent alternative control command code to be applied, and so on. All this is especially true when resolving emergencies (failures) at a managed facility. Since the controlled object by its nature is, in general, a complex system, the individual elements of which are interconnected and interdependent, emergency situations arising at this object will usually also have a complex character (for example, group failure of equipment) . The use of only one control command code in such emergencies in most cases may not be effective enough. This reduces the functionality of this device and, therefore, significantly narrows the scope of its practical application.

 The objective of the invention is to expand the functionality of the device by highlighting all emergency situations possible for a given control object, in a separate class of equivalence of situations with the subsequent assignment for this class of some set N of different alternative control command codes (N≥2), each of which, bringing the corresponding means are capable, with a certain probability, of resolving the current emergency. Alternative control command codes assigned to the equivalence class of situations identified as emergency are arranged in advance in the sequence of their application. In this streamlining, it is taken into account that, first of all, it is rational to apply such an alternative control command code that could provide a solution to the current emergency at a lower cost, i.e., by using more cost-effective and (or) time-consuming means, in comparison followed by an alternative control command code. At the same time, each subsequent control command code, which is more expensive than the previous one, should be more efficient, i.e. able to resolve the current emergency more likely. The sequential use of alternative control command codes provides the resolution of the current emergency using any one of the alternatives or gives an alarm that the device is not able to resolve the emergency on its own, when the sequential use of all N assigned alternatives did not lead to a positive result . The number of alternative control command codes assigned to the equivalence class corresponding to emergency situations is chosen so that, firstly, to cover the maximum number of alternative methods for resolving them and, secondly, so that, in the process of sequential enumeration of alternative control command codes, the device operating time , for a given speed, did not exceed a certain maximum allowable value that can be allocated to resolve the emergency, and The names of each specific managed entity.

 The task is achieved by the fact that in the device according to ed. testimonial. USSR N 1278811 G 05 B 19/18, containing two registers, a control unit and a clock generator, an element AND of a device with one inverse input, a block of OR elements, a second block of AND elements, N blocks for generating alternative control command codes, a counter and a decoder, and the group of inputs of the first register is connected to the group of inputs of the device situation code, the group of outputs of the second register is connected to the group of outputs of the device, the group of outputs of the address counter is connected to the groups of address inputs of the first, second, and t of the third memory blocks, the group of outputs of the first and third memory blocks are connected respectively to the first group of inputs of the comparison circuit and the second group of inputs of the first block of elements AND, the group of outputs of the first register is connected to the first group of inputs of the first block of elements And, the counting input of the address counter is connected to the output of the element OR control unit, the first input of which is connected to the first input of the AND element of the control unit and the output of the comparison circuit, the second inputs of the OR element and the And element of the control unit are interconnected and are connected to the output of the clock pulse generator, the output of the AND element of the control unit is connected to the sync inputs of the first and second registers, the group of outputs of the first block of AND elements is connected to the second group of inputs of the comparison circuit, characterized in that it additionally contains an AND element of the device with one inverse input, block OR elements, a second block of AND elements, N blocks for generating alternative control command codes, a counter and a decoder, wherein the group of outputs of the block of OR elements is connected to the group of inputs of the second register, the first group of inputs of the block of OR elements is connected to the group of outputs of the second block of AND elements, the group of inputs of which is connected to the group of outputs of the second memory block, in the block of elements OR the outputs of all elements are combined into a group of outputs of the block, the first inputs of all elements are combined into the first group of inputs of the block, and the second inputs of all elements are combined into a second group of block inputs, in the second block of elements AND the outputs of all elements are combined into a group of block outputs, the first inputs of all elements are combined into a group of block inputs, and the second e inputs of all elements are connected to each other and to the control input of this block, outputs of all blocks for generating alternative codes of the control command having the same serial numbers are connected to each other and connected to the second group of inputs of the block of elements OR, a separate output of the address counter is connected to the control input of the second block AND elements, with a counter reset input and with an inverse input of the AND element of the device with one inverse input, the direct input of which is connected to the output of the AND element of the control unit and the sync inputs of the first and the second registers, the output of the AND element of the device with one inverse input is connected to the counting input of the counter, the group of outputs of which is connected to the group of decoder inputs, each of the N outputs of the decoder is connected to the control input of the corresponding block for generating alternative control command codes, and N + 1 is the decoder output is the alarm output of the device.

 A functional diagram of an adaptive control device is shown in FIG. one; functional diagram of the control unit in FIG. 2; block diagram of the OR block in FIG. 3; functional diagram of the second block of elements And in FIG. 4.

 The device (Fig. 1) contains a first register 1, a first block of 2 AND elements, a third memory block 3, a comparison circuit 4, a first memory block 5, an address counter 6, a second register 7, a second memory block 8, a control unit 9, a generator 10 clock pulses, a block of 17 OR elements, a second block of 18 AND elements, N blocks 19 of forming alternative control command codes, an AND element of a device 20 with one inverse input, a counter 21 and a decoder 22.

 The control unit 9 (Fig. 2) contains an OR element 11 and an And 12 element, and also has inputs 13 and 14 and outputs 15 and 16.

 Block 17 elements OR (Fig. 3) contains m elements OR, and also has two groups of inputs and one group of outputs.

 The second block 18 of AND elements (Fig. 4) contains m AND elements, and also has a group of inputs, a group of outputs and a separate control input.

 A significant increase in speed can be achieved with such a search scheme, when not a situation code is searched for that matches the current one, but an entire equivalence class to which the current situation belongs.

где S_j двоичный вектор j-й ситуации класса K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$
Вектор h_i(g_i) содержит единицу в K-ом разряде, если K-й разряд всех векторов ситуации S_j из данного класса K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ содержит единицу (нуль). Тогда условие принадлежности текущей ситуации классу описывается следующим логическим выражением:
S_t& (h_i∨ g_i) = h_i (2)
Данное условие может быть сформулировано следующим образом. Ситуация S_t принадлежит классу K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ в том случае, если код ситуации S_t имеет единицы во всех разрядах, в которых единицы имеет h_i, и не имеет единиц во всех тех разрядах, в которых единицы имеет g_i. Если для любой пары классов K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ и K $\genfrac{}{}{0ex}{}{\text{s}}{\text{j}}$ (i≠j) выполняется h_i& h_j ≠h_j или g_i& g_j ≠g_i, то класс ситуации может быть однозначно определен из условия (2) без последовательного просмотра всех ситуаций и сразу выдана команда на органы управления.An equivalence class of situations is a set of situations K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ S ₁ , S ₂ , S _n } inducing the same solution R _i (having the same control command code). Characteristic vectors of class K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ a pair of vectors h _i and g _i is called such that the relations

where S _{j is the} binary vector of the jth situation of class K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$
The vector h _i (g _i ) contains one in the Kth digit if the Kth digit of all the situation vectors S _j from a given class K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ contains one (zero). Then the condition that the current situation belongs to the class is described by the following logical expression:
S _t & (h _i ∨ g _i ) = h _i (2)
This condition can be formulated as follows. The situation S _t belongs to the class K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ in the event that the situation code S _t has units in all digits in which units has h _i and does not have units in all those digits in which g _i has units. If for any pair of classes K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ and K $\genfrac{}{}{0ex}{}{\text{s}}{\text{j}}$ (i ≠ j) h _i & h _j ≠ h _j or g _i & g _j ≠ g _i is fulfilled, then the situation class can be uniquely determined from condition (2) without sequential viewing of all situations and a command to the controls is immediately issued.

 The device operates as follows.

The binary vector (situation code) from the control object is fed to the information inputs of the first register 1. At the end of the search for the previous control command at the input 14 of the control unit 9, a signal appears with the level of the logical unit from the comparison circuit 4, opening the AND element 12 in the control unit 9, and on the trailing edge of the next pulse from the generator 10, the control command code is written from the second memory block 8 to the second register 7 and the current situation code is in the first register 1. If the code class of the current situation matches the class of the situation code recorded on the previous measure, then from the comparison circuit 4 a signal with the level of a logical unit is still received, and the process repeats until the class of the current situation changes. All this time in the second register 7, the previous control command code is stored. When changing the code of the current situation that changes the class of the situation, the logical unit is removed from the input 14 of block 9, the AND 12 element is locked, stopping the recording of information in the first 1 and second 7 registers, and on the trailing edge of the signal at the output 15 of block 9, formed by the OR 11 element , incremented by one the contents of the counter 6 addresses. Further, on the trailing edge of the pulses of the generator 10, arriving through the OR element 11 to the output 15 of block 9, the contents of the address counter continue to grow, providing a sequential sampling of information from the first 5, second 8, and third 3 memory blocks. In this case, the vector h _i , the command code R _i, and the vector f _i = (h _i ∨ g _i ), respectively, are selected from the memory blocks. The vector f _{i is} bitwise multiplied by the current situation vector S _t in the first block of 2 AND elements, the outputs of which go to the second input of the comparison circuit 4, where the obtained vector is compared with the vector h _i , i.e. definition of a class of a situation in accordance with expression (2). Counter 6 addresses works cyclically, providing a sequential sampling of all command codes R _i and all vectors h _i and f _i . When the vector S _t & (h _i ∨ g _i ) coincides with the vector h _i , a signal is generated with the level of a logical unit at the output of the comparison circuit 4, which allows writing the code of the command R _i to the second register 7 and writing the code of the new situation to the first register 1 After that the process is repeated. Before an emergency occurs at the managed facility, the logical unit level is constantly maintained at a separate output of the address counter 6. As this output, one of the group of outputs of the counter 6 addresses can be assigned. In the event of an emergency at a managed facility, it is identified (classified) by the device and from a separate output of address 6 counter to the control input of the second block 18 of AND elements, the reset input of counter 21 and the inverse input of element AND 20 of the device receives a signal with a logic zero level. In this case, the second block 18 of AND elements is blocked, prohibiting the recording of information from the second block 8 of the memory in the second register 7, and the element And 20 of the device is opened, allowing the receipt of clock pulses from the output 16 of the control unit 9 to the counting input of the counter 21. When the first clock is received to the counting the input of the counter 21 its content is increased by one, while the level of the logical unit is set at the first output of the decoder 22 and is fed to the control input of the corresponding block 19 of the formation of alternative command codes management. In this case, an alternative control command code corresponding to this block through the block 17 of OR elements is supplied to the group of inputs of the second register 7 for rewriting it. After overwriting the first register 1 and second register 7, the control object can be taken out of emergency, which will be identified by the device and the logical unit level will be set on a separate output of address counter 6. In this case, the counter 21 is set to its initial state (reset to zero), the device element And 20 is closed, the level of the logical unit is removed from the first output of the decoder 22, stopping the supply of an alternative control command code from the output of the corresponding control command alternative unit 19, and to the group the inputs of the second register 7 through the second block of elements 18 And the control command code comes from the output of the second memory block 8.

 If the emergency resolution after applying the first alternative code of the control command did not occur, the logic zero level at the separate output of the address counter 6 is saved, the second clock pulse is transmitted to the counter input of the counter 21 through the device element And 20 and, in the same way, it is overwritten into the second register 7 second alternative control command code, i.e. the second attempt to remove the control object from the emergency. This continues until the emergency at the control object is resolved, or, if all N alternative codes of the control command are used, at the N + 1 clock cycle of counter 21, a signal with a logic level from N + 1 of the output of decoder 22 is sent to emergency alarm (indication) and provide a signal that the device is not able to independently resolve the emergency. When the alarm signal is issued, the operation of the control object can be automatically terminated, for example, by turning off the power supply, or the necessary measures can be taken with the participation of a human operator.

При этом иногда могут появиться два неразличимых класса K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ и K $\genfrac{}{}{0ex}{}{\text{s}}{\text{j}}$ (имеющих одинаковые характеристические вектора). В таком случае следует разделить один из классов на два K $\genfrac{}{}{0ex}{}{\text{s′}}{\text{i}}$ и K $\genfrac{}{}{0ex}{}{\text{s″}}{\text{i}}$ группируя ситуации таким образом, чтобы обеспечить несовпадение характеристических векторов классов (при этом приходится дублировать код команды R_i). Если все классы K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ различимы, то информация о соответствующих каждому классу K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ векторе h_i, коде команды R_i и векторе f_i= (h_i∨ g_i) заносится в последовательные адреса соответственно первого 5, второго 8 и третьего 3 блоков памяти.The proposed device is tuned to the real environment of a specific control object by setting for each situation S _j encountered in the technological cycle of the control object its own control command code R _i . However, these codes are not written directly to memory, but are grouped into equivalence classes K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ combining all situations having the same control command code, and for each group (class) of situation characteristic vectors are calculated

Moreover, sometimes two indistinguishable classes K may appear. $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ and K $\genfrac{}{}{0ex}{}{\text{s}}{\text{j}}$ (having the same characteristic vectors). In this case, one of the classes should be divided into two K $\genfrac{}{}{0ex}{}{\text{s ′}}{\text{i}}$ and K $\genfrac{}{}{0ex}{}{\text{s ″}}{\text{i}}$ grouping situations in such a way as to ensure that the characteristic vectors of the classes do not coincide (in this case, it is necessary to duplicate the command code R _i ). If all classes K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ distinguishable, then the information on corresponding to each class K $\genfrac{}{}{0ex}{}{\text{s}}{\text{i}}$ the vector h _i , the command code R _i, and the vector f _i = (h _i ∨ g _i ) are entered into the sequential addresses of the first 5, second 8, and third 3 memory blocks, respectively.

 The alternative control command codes assigned for the equivalence class corresponding to emergency situations are set during installation (installation) in the device N of the unit 19 for generating alternative control command codes. Each of these blocks, upon receipt of a logic level control at its input, issues a corresponding alternative control command code to the group of its outputs. As such blocks, the simplest combinational logic circuits (matrices), diode assemblies, and long-term memory devices (DZU) can be used. When developing blocks 19 for the formation of alternative codes for control commands in the form of combinational logic circuits, it is advisable to minimize these circuits using Carnot cards or using other methods.

 Various microcircuits can be used as a counter 21, for example, K155IE5, and as a K155ID3 decoder 22, the scheme for interconnecting a counter 21 and a decoder 22 used in the proposed device is widespread and is used, for example, in electronic music calls, electronic clocks, and various relays time. The principles for constructing the remaining elements are also well known and are given, for example, in the reference book Shilo V.L. Popular Digital Chips: A Guide. M. Radio and Communications, 1987, 552 p. Thus, the implementation of the proposed device is not difficult.

 The proposed device is intended to be used in the management of complex technical systems mainly with a discrete nature of the technological cycle, for example, production lines, numerically controlled machines, etc.

Claims (1)

 An adaptive control device comprising first and second registers, first, second and third memory blocks, an address counter, a first block of AND elements, a comparison circuit, a control unit and a clock generator, wherein the group of inputs of the first register is connected to the group of inputs of the device situation code, group the outputs of the second register is connected to the group of outputs of the device, the group of outputs of the address counter is connected to the groups of address inputs of the first, second and third memory blocks, the group of outputs of the first and third memory blocks assigned to the first group of inputs of the comparison circuit and the second group of inputs of the first block of AND elements, the group of outputs of the first register is connected to the first group of inputs of the first block of AND elements, the counting input of the address counter is connected to the output of the OR element of the control unit, the first input of which is connected to the first input the AND element of the control unit and the output of the comparison circuit, the second inputs of the OR element and the And element of the control unit are interconnected and connected to the output of the clock generator, the output of the AND element of the control unit the phenomena is connected to the sync inputs of the first and second registers, the group of outputs of the first block of AND elements is connected to the second group of inputs of the comparison circuit, characterized in that it additionally contains an element AND of the device with one inverse input, an OR block of elements, a second block of AND elements, N blocks of formation alternative control command codes, a counter and a decoder, wherein the group of outputs of the OR block of elements is connected to the group of inputs of the second register, the first group of inputs of the block of OR elements is connected to the group of outputs of the second the AND block of elements, the group of inputs of which is connected to the group of outputs of the second memory block, in the block of elements OR the outputs of all elements are combined into a group of outputs of the block, the first inputs of all elements are combined into the first group of inputs of the block, and the second inputs of all elements are combined into the second group of inputs of the block , in the second block of elements AND the outputs of all elements are combined into a group of outputs of the block, the first inputs of all elements are combined into a group of inputs of the block, and the second inputs of all elements are connected to each other and to the control input of this block a, the outputs of all blocks of alternative control command generation codes having the same serial numbers are interconnected and connected to the second group of inputs of the OR block of elements, a separate output of the address counter is connected to the control input of the second block of AND elements, the counter reset input and the inverse input of the element And devices with one inverse input, the direct input of which is connected to the output of the And element of the control unit and the sync inputs of the first and second registers, the output of the And element of the device with one inverse input with it is single with the counter input of the counter, the group of outputs of which is connected to the group of inputs of the decoder, each of the N outputs of the decoder is connected to the control input of the corresponding block for generating alternative codes of the control command, and the (N + 1) -th output of the decoder is the alarm output of the device.

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