RU2032214C1 - Data exchange controller - Google Patents

Abstract

FIELD: computer engineering. SUBSTANCE: controller can be used for acquiring telemetering information from more than one entity, its processing, and transfer of check results for program telemetering of external subscriber control commands according to check results. Controller has processor unit, control unit, exchange control unit, check data acquisition unit, relay command receiving and transmitting units, serial asynchronous exchange unit, pulse command receiving and transmitting unit, serial interface units with external and internal acknowlegement, telemetering code output unit. EFFECT: enlarged class of solved problems. 2 dwg

Description

 The invention relates to computer technology and can be used as a device for managing objects, processing information received from external subscribers, processing it according to specified algorithms, transmitting information and control commands to external subscribers in the form of relay commands, pulse commands of a serial code. The controller can be used as a device for collecting telemetric information from several objects (up to 192 signals), processing it and issuing control results to program telemetry or control commands to external subscribers according to the control results.

 A device for exchanging information comprising a counter, a stack of address registers, an address block for microcommand memory, a memory block for microcommands, interface units, a stack of priority level registers, a clock generator, a priority block, a data register block, a control multiplexer, a decoder, a control unit, a processing unit queues, block of address registers, result attribute multiplexer, stack of result attribute registers, RAM block, address multiplexer, result attribute register, data multiplexer with corresponding etstvuyuschimi bonds [1].

 The disadvantage of this device is its limited functionality.

 Closest to the claimed technical solution is a device for controlling the exchange of information between a computer and a group of peripheral devices, containing an address decoder, a computer, an exchange register, a switch, a priority selection unit, exchange control units.

 The disadvantages of the device include the impossibility of receiving and issuing pulse commands, receiving and processing control signals of external objects.

 The purpose of the invention is the expansion of the class of tasks.

 This goal is achieved by the fact that in the device containing the data processing unit connected by two-way communication with the exchange control unit, and the interrupt unit, a control information collection unit, a relay command reception unit, a relay command issuing unit, a serial asynchronous exchange unit, a reception unit and issuing pulse commands, a serial interface unit with external acknowledgment, a serial interface unit with internal acknowledgment and a telemetry code issuing unit, the input / outputs of the interrupt unit, the control information collection unit, the relay command reception unit, the relay command issuing unit, the asynchronous serial exchange unit, the pulse command reception and issuing unit, the serial interface block with external acknowledgment, the serial interface block with internal acknowledgment and the issuing block telemetry code through the internal trunk connected to the corresponding information-control inputs and outputs of the exchange control unit, the group of outputs of the block you Relay commands and the input group of the relay command receiving unit are respectively the group of outputs and the group of inputs of the relay command of the controller, the input-output groups of the serial interface block with internal acknowledgment and the serial interface block with external acknowledgment are the groups of linear inputs and outputs of the controller, the group of inputs and the group the outputs of the block receiving and issuing pulse commands are, respectively, the group of inputs and the group of outputs of the pulse commands of the controller, from the first to the fifth the inputs and outputs of the serial asynchronous exchange unit are the corresponding inputs and outputs of the controller for connecting to external objects, the group of inputs of the control information collection unit is the group of inputs of the controller for connecting to the control outputs of external objects, the group of inputs, the first and second groups of outputs, strobe and marker outputs telemetric code issuing units are the corresponding group of inputs of the same name, groups of outputs and controller outputs.

 Signs that distinguish the claimed device in the known analogues are not found, therefore, it meets the criteria of novelty and inventive step.

 In FIG. 1 shows a structural diagram of the proposed controller; figure 2 - connection diagram to the controller of external objects.

 The exchange controller contains (Fig. 1) an input / output device 1, an interrupt unit 2, a control information collection unit 3, a relay command receiving unit 4, a relay command issuing unit 5, a serial asynchronous exchange unit 6, an impulse command receiving and issuing unit 7, serial interface unit 8 with external acknowledgment, serial interface unit 9 with internal acknowledgment, exchange control unit 10, telemetry code issuing unit 11, data processing unit 12 (processor), read-only memory (ROM) 13, 14, 15, troro This software logic unit 16 to the RAM, the internal manifold 17.

 Figure 2 shows the controller 18 exchange, the receiving device 19 commands and control, the object 20 of the control, the object 21 of the control.

 The exchange controller is a programmable 16-bit device with specialized exchange cells. The controller is equipped with the “regular self-test” program wired in ROM for autonomous and standard verification as part of the complex. The rest of the ROM volume is flashed with a standard program designed to operate the controller as part of the complex.

 The controller operates as follows. The controller includes three channels with node-wise cross majorization of the logical part. Input and output drivers in blocks 3–9 and 11 are partly tripled and partly duplicated.

 The controller works according to the program wired in ROM 13, 14, 15, here, at certain addresses, the constants necessary for operation are sewn up. The communication between the processor 12 and the input / output device 1 is carried out using the transfer commands from and to the processor and control codes accompanying these commands.

 The exchange control unit 10 is designed to synchronize and control the operation of the controller and is made on a micro-assembly 831LUH4B-62. The input of block 10 from the device 16 receives addresses, clock signals, cyclic labels. Based on the analysis of the received signals, block 10 generates at its outputs connected to the highway 17, clock pulses, the “Start RF” signal and the interrupt signal to the processor “Pr4”.

 Block 2 interrupts is made according to a non-priority scheme and generates signals "Pr1", "Pr2", "Pr3", "Pr4" to the device 16, and also generates an interrupt code for the subscriber and gives it to the processor 12. The block is made on micro-assembly 831LUKh4B-61. The block includes triggers that remember requests from external subscribers. Using a mask formed by software, masking of interrupts occurs. Each subscriber has their own bit in the mask register of block 2. As a result of masking, one of the signals Pr1, Pr2, Pr3 is generated at the output of block 2. The signal Pr4 is generated by block 2 when the timer overflows in block 10, regardless of the prohibition and permission to interrupt. To analyze the cause of interruptions, in block 2 there is an interrupt code register, which is analyzed by device 16.

 Block 3 collection of control information provides the reception of 192 single-channel asynchronous signals or 64 three-channel signals. Block 3 is made on three microassemblies 831LUH4B-58. The input control signals of block 3 are interrogated in hardware by 32 bits in series. As a result of verification of the received codes, block 3 generates an interrupt signal.

 The telemetry code issuing unit 11 is intended for issuing the “Strobe”, “Marker” signals, as well as a parallel 16-bit telemetry code and a sequential 16-bit (8x2) hardware telemetry code.

 Block 11 is made on a microassembly 831LUH4B-60. The programmatically controlled parameters of the controller are transferred from the device 16 to the register of block 11, from which, advanced, through the output former enter the external circuit. Telemetry parameters are changed according to the next command of device 16. The “Marker” signal is used to increase the number of monitored parameters from 16 to 56 and contains two digits. Parameters can be static or vary from “marker” to “marker”.

 Block 4 receiving relay commands is designed to receive eight asynchronous relay commands, each of eight commands is input to the corresponding input register in block 4. Relative to the leading edge of the received relay command, a single pulse is generated, which is stored in the output register of block 4, the number of each bit of which corresponds to relay command number. Reading the status of the output register of block 4 is carried out at the command of the device 16, after the execution of the command, the registers are reset.

 With some delay relative to the leading edge of the incoming relay command in block 4, an interrupt signal is generated, which through line 17 enters block 2 interrupts. After receiving at least one command, condition 1 is formed, which is removed after reading information from the output register of block 4. Block 4 is made on microassemblies 812UTX3-3 and 831LUH4B-59.

 Block 5 issuing relay commands is designed to issue 32 relay commands and is made three-channel with majorization at the output. Block 5 is made on microassemblies 812UTP3-28, 831LUKH4B-5U and consists of two interdependent nodes, each of which provides the issuance of 16 relay commands. Each node contains a receiving and output registers and a control node (not shown).

 Information from the device 16 through the block 19 along the highway 17 enters the receiving register of the block 5 with tetrads by the command of the device 16. After the end of this command, information from the receiving register in the block 5 is copied in parallel to the output register and then goes to the controller outputs. The number of the output register bit corresponds to the number of the relay command issued. At the end of the command of the device 16, condition II is issued, which, after the time required for issuing the relay commands, is removed, the registers of block 5 are reset. If, ignoring condition II, again to send 16-bit information from device 16 to the receive register of block 5, the above operations are repeated again. Thus, the duration of relay commands can be set programmatically.

 Block 6 serial asynchronous exchange consists of a receiving node and a node issuing. The receiving node is designed to receive two-byte 16-bit information words from an external subscriber and transmit them in parallel-serial code to the processor 12. The receiving node is made on the micro-assembly 831LUKh4B-65 and contains two input registers and a control node (not shown). The first register only works in recording mode, the second - both in recording mode and in sequential shift mode. The census of information from the first register to the second is carried out only if the received information is not stored in it. A sequential shift in the second register is carried out at the command of the device 16 and serves to read information received from an external subscriber to the processor 12. Information can be read in conjunction with the recording of a new word from the subscriber. If both registers are full, then at the output of block 6, a signal for blocking reception of information from the subscriber is generated. After reading at least one of the received words into the device 16, the prohibition signal is removed and the information is automatically transferred from the first register to the second. A software installation prohibiting the reception of information is also provided.

 The issuing unit is designed to receive from the device 16 in serial-parallel code an 8-bit application word and 16-bit information words and transmit the parallel 16-bit code to the subscriber. The delivery unit is made on the micro-assembly 831DUKH4B-65 and contains two 16-bit registers, an 8-bit register and a control unit. The first 16-bit and 8-bit registers work only in sequential write mode, and the second 16-bit register works in parallel code write mode. In the 8-bit register is written at the command of the device 16 8-bit information from the processor. The first 16-bit register is written 16-bit information from the processor. If the second 16-bit register is not occupied, then the word from the first 16-bit register is automatically written to it in parallel code. If there is an information word in the second register, then a census will take place in it only after the information stored in it is transmitted to the subscriber. When filling the first and second registers with information words at the node output, a potential node busy signal is established. After at least one word is transmitted to the subscriber, the busy signal is removed.

 Block 7 receiving and issuing pulse commands provides the reception of seven asynchronous duplicated signals and the issuance of three duplicated pulse signals. The block is made on microassemblies 812UIP3-2B and 831LUH4B-62 and is a register and a group of triggers. Majorized information from the device 16 at his command enters the output register and then to the outputs of the controller. The reception of impulse commands occurs similarly to the command of the device 16.

 The serial interface unit 8 with external acknowledgment carries out the exchange of information between the controller and the subscriber according to the clock pulses of the subscriber.

Exchange is carried out in three modes:
- record;
- acknowledgment
- reconciliation of time.

 Exchange in all modes is done in binary 16-bit serial code. The inclusion of each mode is carried out by relay commands, the end of each mode occurs by the relay command "End of exchange".

 Three pulse signals are received from the subscriber to the controller: “Marker”, “TI” - 16 clock pulses, “I” - “Kv” - subscriber information. Five impulse signals are transmitted from the controller to the subscriber: "STV" - demand for delivery, "STP" - demand for reception, "Yes" - signal; "Inf. In HF" - information from the controller; "1 sec" is a timestamp. After receiving "STP" in the "Record" mode, the subscriber begins to issue information to the controller "TI" and which is recorded in the register and shifted by clock pulses. The device 16 at its command takes information and transfers it to processing. Block 8 is ready for receiving the next word from the subscriber. Next, an analysis is made of the correctness of the reception of information, if the result is positive, then at the command of processor 12, block 8 generates a "Yes" signal.

 In the "Acknowledgment" mode, the passage of the "marker" is allowed and the "STV" signal is generated. After receiving the “STV” signal, clock pulses are received from the subscriber to shift the output register and generate the “Inf.

 In the "Time Reconciliation" mode, permission is given to give a subscriber a single mark "1 second". After issuing this mark in block 7, permission is set for receiving a “marker” and then the mode is similar to the “Acknowledgment” mode, but only two words are issued.

 The serial interface unit 9 with internal acknowledgment carries out the exchange of information between the controller and the subscriber according to the clock pulses generated by the controller.

 The input signals from the subscriber are "СНО" - the beginning of the exchange, "STV" - the demand for delivery, "STP" - the demand for reception, "KS" - the end of the connection, "Inf. BVK" - the information of the subscriber. Block 9 gives the subscriber "IS" - support pulses, "Ready" - readiness, "Inf. In BVK" - controller output information. The exchange begins with the signal "CHO", which is perceived as an interrupt signal. After processing the interrupt code, the controller issues a Ready signal. Having received it, the subscriber issues a "STV" signal to block 9. Two series of clock pulses are used to form the “IS” and re-bind the subscriber's input information.

 After the delay time, the controller gives the subscriber "IS", in response to which the subscriber begins to give out his information, which is recorded in block 9. After a 16-clock pulse, the "STV" and "STP" signals are reset. By the signal "KS", you can start transmitting information to the processor at his command.

 Upon receipt of the "STP" signal, the formation of the "IS" and their count to 16 are carried out similarly. Information from the device 16 is copied to the output register of block 9, from which it is transmitted to the subscriber with a serial code. After the information is removed, the block returns to its initial state. Block 9 is made on a micro-assembly 831LUH4B-57.

 The exchange control unit 10 is made on the micro-assembly HAZ.408.168. All information received by block 10, incoming on the highway 17, is stored in the registers. All information transfers are carried out according to the commands of the device 16. Synchronization of the exchange between devices 1 and 16 is carried out not only by issuing clock pulses, interrupt signals, but also by polling the external conditions. Interrogation of external conditions is performed by the device 16 at his command. Conditions are formed in the controller blocks and transferred to the input of block 10, where they are compared with the contents of the mask registers. Masking is done programmatically. After analyzing the conditions, information is transferred in accordance with the command.

 Self-monitoring of the exchange controller is carried out according to the program wired in ROM 13, 14, 15. The program starts after turning on the power and ends with the output code at the outputs of block 11. The program includes blocks for checking the processor, setting the input / output device 1 to 0, checking the RAM using a set of control codes, checking the ROM firmware for a checksum match, and a processor command verification block.

 With a positive result of a regular self-test, after zeroing the RAM, control is programmatically transferred to a regular program. If the result is negative, the test program loops with the output code every 5 seconds.

 Thus, the proposed controller has advanced functionality, which improves the reliability of its work and the range of connected external objects.

Claims (1)

 EXCHANGE CONTROLLER, comprising a data processing unit connected by two-way communication with the exchange control unit, an interrupt unit, characterized in that the control information collection unit, the relay command receiving unit, the relay command issuing unit, the serial asynchronous exchange unit, the receiving and issuing unit are introduced into the controller pulse commands, a serial interface unit with external acknowledgment, a serial interface unit with internal acknowledgment, and a telemetry code issuing unit, moreover, The inputs and outputs of the interrupt unit, the control information collection unit, the relay command receiving unit, the relay command issuing unit, the asynchronous serial communication unit, the pulse command receiving and issuing unit, the serial interface block with external acknowledgment, the serial interface block with internal acknowledgment and the issuing block the telemetry code through the internal trunk connected to the corresponding information-control inputs-outputs of the exchange control unit, the group of outputs of the unit relay command issuances and a group of inputs of a relay command receiving unit are respectively a group of outputs and a group of inputs of a relay command of a controller, a group of inputs and outputs of a serial interface block with internal acknowledgment and a serial interface block with external acknowledgment are groups of linear inputs and outputs of the controller, a group of inputs and a group the outputs of the block for receiving and issuing pulse commands are, respectively, the group of inputs and the group of outputs of the pulse commands of the controller, from the first to the fifth the input-outputs of the serial asynchronous exchange unit are the corresponding inputs and outputs of the controller for connecting to external objects, the group of inputs of the control information collection unit is the group of inputs of the controller for connecting to the control outputs of external objects, the group of inputs, the first, second groups of outputs, strobe outputs and the markers of the telemetric code issuing unit are the corresponding group of inputs of the same name, groups of outputs and outputs of the controller.

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