RU1793523C - Converter with multiphase pulse-duration modulator - Google Patents

Description

with output from the midpoint of the power supply, or with a capacitive voltage divider, the connection point of the input capacitors of which forms an artificial output of the average potential of the power supply. The converter contains m pairs of keys serially connected between the buses of the power supply of the keys, shunted by the inverse diodes. The midpoints m of the key pairs are connected to m windings located on the rods x of the t-rod magnetic circuit, the free ends of which are combined and form the second output of the converter. The keys of each rack are switched counter-clockwise in accordance with the signals $ and $ according to the law of bipolar pulse width modulation. To implement such a switching law, the converter must be equipped with a control unit including an output frequency setter, as well as a Hecyaieu or a multiple of its frequency setters, and a pulse width modulator, forming m pairs of control signals $ and $. These signals are formed shifted together at the PWM carrier frequency by an angle of 2 l / t.

The disadvantages of this converter are the relatively low quality of the output voltage, determined by the bipolar PWM method used here, as well as the difficulty of using the converter due to the need to use a special power supply with a midpoint or the resulting deterioration in mass and dimension due to the presence of two input electrolytic capacitors rated for the total current of the converter.

The purpose of the invention is to improve the quality of the output voltage by reducing its distortion and expanding the scope of the converter by eliminating the use of a special power source with a midpoint. -. To achieve this goal, the proposed converter, as well as the known one, is made up of m main pairs of key elements (half-bridges) sequentially connected between the power buses, shunted by reverse diodes. The connection points of all m pairs of key elements through m windings located on the rods of the t-rod magnetic circuit are connected to one output terminal of the converter. The key control unit includes a converter output frequency adjuster and a carrier or a multiple thereof and sequentially connected to each other.

and

10

fifteen

twenty

25

thirty

35

40

45

fifty

55

a multiphase pulse width modulator connected to the control inputs of the corresponding key elements by outputs and providing m pairs of counter-current signals fy and 1/1 sequentially shifted together at the carrier frequency of the pulse-width modulation by an angle of 2 l / m, where t 2, Unlike the known, the proposed converter is equipped with an additional pair of keys connected in series between the power buses and shunted by the reverse diodes, the connection point of which forms the second output output of the converter ovatel. The converter output frequency adjuster is provided with paraphase outputs Q, Q, which are connected to the control inputs of the corresponding keys of the additional pair. ..

One of the possible embodiments of the aforementioned multiphase pulse width modulator comprises two frequency dividers with division coefficients differing by one, two shift registers by an angle of 2 dat, t shapers of pulse-width modulated pulse signals, successively shifted by an angle of 2 l / m on a carrier or a frequency multiple to it, a synchronization unit made by comprising. m elements 2I and m element OR, a three-phase shift register of the output frequency signals and LP of the shapers of the counter-current signals ul and /, the output terminals forming the outputs of the multiphase pulse width modulator. The input of the pulse width modulator is formed by the interconnected inputs of the frequency dividers, and their outputs are connected to the inputs of the mentioned shift registers by an angle of 2 l / t, the paraphase outputs of which are connected in pairs to the inputs of the m formers of pulse-width modulated pulse signals sequentially shifted between themselves at an angle of 2 l / m at the carrier or a multiple of her frequency. Such a shaper includes two narrow-pulse shapers, the outputs of which are connected to the inputs of the 2I / Ш element, the output of which is connected to the clock input of the RSJ trigger with paraphase outputs FI, FJ. The inputs of each element 2 OR are also connected to the inputs of one of the m elements 2 AND of the synchronization node, the outputs are connected to the inputs of the element m OR, the output of which is connected to one of the installation inputs of the RST triggers and the input of the three-channel shift register of the output frequency signals. His first channel with outputs Qi, Qi,

used as a setpoint for the output frequency, and the outputs Q2 and Oz of the second and third channels of this register and the outputs FI, FI of the RST flip-flops are connected to the corresponding inputs m of the shakers of the counter-current signals $, $. Each of them is made in such a way that internal communications ensure the formation of these signals in accordance with the logical expression:

$ Q2 Fi + Q3 Fi.

In FIG. 1 shows a schematic diagram of the power section of the converter (an example of implementation with m 2); in FIG. 2 is a schematic diagram of a device for controlling it; in FIG. 3 is a timing diagram explaining the operation of the device for controlling the converter and the shape of the output voltage.

A converter, a circuit diagram of the power unit of which is shown in FIG. 1 contains t + 1 lolumost. Power transistor switches 1-6 (in Fig. 1), shunted by reverse diodes 7-12. The connection point of the additional transistor switches 1-2 forms the first output terminal 13 of the converter, and the connection points of the transistor switches 3. A and 5, 6 of the remaining half-bridges are connected to m windings 14, 15 located on the rods x of the m-rod magnetic circuit. Windings. 14, 15 are interconnected counterclockwise and form a connection point of the second output terminal 16 of the converter. The converter control unit is shown in FIG. 2. It contains a frequency adjuster 17 connected to the input of the multiphase pulse width modulator 18. Embodiments of the multiphase modulator 18 may be different, but in all cases it must ensure the formation of m pairs of control signals $ and $. sequentially shifted between each other by an angle of 2 nlm (where m 2) at the modulation carrier frequency. When implementing the vertical principle of forming control signals, such a modulator 18 contains, for example, m sawtooth generators (the output signals of which are shifted to each other by the above angle) and a modulating voltage generator of a given shape. After comparing these signals with the help of m comparators, at the outputs of the multiphase modulator 19 m counter-contact pairs of PWM control signals will be generated.

A variant of the multiphase modulator 18 shown in Fig. 2. implements the principle of quasi-single-band modulation when generating control signals for the 3-6 converter. It consists of two frequency dividers 19, 20, the division factors of which differ by one. The outputs of the frequency dividers 19.20 are connected to the inputs of two shift registers 21, 22 by an angle of 2 l / m (for case 2, this angle is equal to w, while the shift registers 21, 22 can be made in the form of a T-trigger that works in counting mode). The paraphase outputs of the shift registers 21.22 are connected to the inputs of the m formers 23, 24 modulated by the duration of the pulse signals shifted by an angle of 2 / m at the carrier frequency. Each of them is made

in the form of two formers 25, 26 and 27, 28 narrow pulses, the outputs of which are connected to the inputs of the element 2 OR 29 (30), the output connected to the clock input of the RST trigger 31 (32). Shapers 25-28

narrow pulses can be performed, for example, in the form of series-connected elements NOT 33 and 2V 34. The output of the element NOT 33 through the capacitor 35 is also connected to the common point of the converter, and the second input of the element 2 AND 34 to the input of the element NOT 33. The inputs of the elements 2 OR 29. 30, are also connected to the inputs of the synchronization node 36, formed by the inputs of m elements 2I 37, 38, the outputs of which are connected to the inputs of the element m OR 39. The same installation R and S inputs of all RST triggers 31, 32 are combined and connected to common point of the converter and to the output of the sync node ization node 36. Output

synchronization 36 is also connected to the input of a three-channel shift signal register 40 of the output frequency, performed on three IK-flip-flops 41-43, connected in a cross-coupling fashion. First channel

three-channel register 40 with outputs He and O. Used as an output frequency setter. These outputs are connected through an amplifier-decoupling device (in FIG.

1. 2 not shown) with control inputs of additional transistor switches 1,

2. Paraphase outputs FI, Fi and F2. F2 RST-triggers 35, 36, as well as the outputs 02 and Oz of 1K-triggers 42.43 are connected to the corresponding inputs of the drivers 44,45 of the counter-current signals $ and $, which are made in the form of elements 2I-2OR 46, 47 and NOT 48, 49. St. between the inputs of these elements and the outputs of the triggers 31,32 and 42, 43 provide the formation of signals

 according to the logical expression:

f 0.2 P + 07zP |.

Note that in the general case, the execution of the shapers 44, 45 may be different. So, a combination of six

elements 2I-NOT will allow the formation of similar control signals $ and $, defined, for example, by the expression:

$ +

It is easy to show that, using the well-known principles of minimizing logical operations, it can be reduced to the first logical expression given above. Despite the relatively large complexity of the second logical expression and, accordingly, the large number of elements necessary for its implementation, in practical cases it can turn out to be more effective, since it fundamentally eliminates possible short-term commutation of power switches 3-6 at intervals l / 3 - 2/3 of their conductivity due to non-ideal pulse fronts FI and Ft. ,. r v

Consider the principle of operation of the converter. Additional transistors 1, 2 of the half-bridge of the converter are switched according to the simplest 180-degree algorithm at the output frequency with a duty cycle of 0.5. Transistors 3, 4 and 5, b are switched in counter-tact with a duty cycle modulated at the output frequency according to a certain law (sinusoidal, trapezoidal, etc.). In this case, the pulse control signals and 2 must be generated by coinciding in phase at the output frequency and shifted by an angle of 2 nlrn at the modulation carrier frequency. As a result of the voltage between the connection points of the transistors 1,2 and 3,4, as well as 1, 2 and 5, 6 will be in the form of signals with unipolar PWM according to the selected Law. The fundamental harmonics of these voltages coincide in phase, and some of the higher ones are out of phase. When these voltages are applied to interconnected counter windings 14.15, these higher harmonics will be mutually compensated. Note that the Transformer should not be designed for the output frequency of the conversion, but for the nearest higher harmonics in the channels of the converter, which are in antiphase. Thus, its dimensions turn out to be substantially smaller than the dimensions of a transformer operating at the output frequency. As already noted, the principle of forming the control signals $, $ with keys 3–7 of the converter can be different.

On the example of the device; shown in FIG. 2 will illustrate the use of the principle of quasi-bandwidth modulation to generate control signals $. t / L according to the trapezoidal law. The principle of operation of this device is further illustrated by the timing diagrams shown in FIG. 3. The frequency adjuster 17 synchronizes the operation of individual components of the device. The pulse signal Ui7 (see Fig. 3) is supplied to the inputs of two dividers. Frequencies are 19.20, the division coefficients Nig, N20 of which differ by one (in Fig. 3, the timing diagrams correspond to case N19 3, N20 4). At the outputs of the shapers of 25-28 narrow pulses, pulse signals of the form Uzs - Ifes of equal frequencies, phase shifted by an angle l: relative to each other, will be generated. To do this, the shapers of 25-28 narrow pulses generate Signals along the leading and trailing edges of signals 1) 21 and 1) 22 from the outputs of the T-flip-flops 21 and 22. The resulting pulse sequences are pairwise added using 2 OR 29, 30 elements and compared using elements 2I 37, 38. Pulse sequences U29, go to the clock inputs of the RST flip-flops 31, 32, which change their state with the arrival of each next pulse. To give certainty to the state of the RST flip-flops 31, 32, one of the installation inputs (in Fig. 2, the S-input) is connected to the output of the synchronization unit 36.

As a result, each of the indicated RST triggers 31, 32 will be set to the zero state with the arrival of the next pulse of the Use sequence. At the outputs of these triggers 31, 32, paraphase sequences FI, Fi will be formed. Fa, F2, modulated by the duration of the pulses (see 11s1, U32 in Fig.Z). The sequence of Ozb pulses from the output of the synchronization unit 36 also enters the input of the three-channel register 40, providing counter-contact switching of the IK-triggers 41-43 with the output conversion frequency. The shift between the paraphase pulses Qi, Qi ... Q3, Q3 is thus 60 electrical degrees (see U / L - C3 in Fig. 3). As already indicated. Additional keys 1, 2 must be switched in antiphase, with a frequency equal to the output frequency of the juno 6p driver. To this end, the signals Qi, Qi, after amplification and providing the necessary galvanic isolation, are supplied to the control inputs of additional keys 1, 2. Signal generation, Vi; t / te- $ 2 key management 3-6 is performed using formers 44, 45.

Embodiments of the formers 44. 45 may vary. In FIG. 2 shows a variant made on the elements 2I and 2OR 46, 47 and NOT 48,49. The connections between their inputs and outputs Q2 Oz of the three-channel register 40 and outputs Fi, -Fi; F2, Fa of the RST flip-flops 31, 32 are designed in such a way that at the inputs of the drivers 44, 45 of the control pulses, sequences of control signals are obtained, defined by the expressions:

- at the output of the element 2I-2OR 46 - -. t / M Qa Fi + FiQa, (see 1) 46 in FIG. 3);

- accordingly, at the output of the element NOT 48 - ipi signal

- at the outlet of the element 2I-2OR 37 1/5 Qi Fa + Qa F2 (see U47 in figure 3)

and at the output of the element NOT 49, the signal is 1/5.

The developed converter control unit allowed the formation of in-phase (according to the main harmonic of the output voltage) control signals ty, Y-5 and 1 / m, ijfi with the keys of the З-б converter, but phase-shifted at the PWM carrier frequency by an angle of 2 l / t. The counterclosing of the windings 14, 15 located on different rods of the common magnetic conductor provides mutual compensation of certain arrays of higher harmonics of the output voltages of the converter channels (between point 13 and the key connection points 3, 4 and 5, 6, respectively).

The proposed converter with a multiphase PWM can find application in the creation of centralized secondary power sources with improved quality of the converted electric power. Reducing the mass-dimensional parameters of the device by reducing the corresponding parameters of its output filter allows the converter to be used in power supply systems, for example, autonomous objects for various purposes.

Claims (2)

Formula of the invention 1. Converter with multiphase pulse width modulation (PWM), containing m main pairs connected in series between the power lines of the key elements shunted by reverse diodes, and the connection points of the key elements of the pairs through m windings located on the rods of the t-rod magnetic circuits are connected to one output terminal of the converter, as well as a key control unit including a converter output frequency setter and a setter connected in series with each other carrier or a multiple of its frequency and a multiphase pulse width modulator connected to the control inputs of the corresponding key elements by outputs and providing the formation of m pairs of counter-current signals $, $, sequentially shifted to each other on the carrier or a multiple of its PWM frequency by an angle of 2 l / t, where m 2, characterized in that, in order to improve the quality of the output voltage by reducing its distortion and expanding the scope of use due to the rejection of the use of a special power source with a midpoint, it is supplied n an additional pair of serially connected between the power rails and shunted by reverse diodes of the keys, the connection point of which forms the second output terminal of the converter, and the converter of the output frequency of the converter is made with paraphase outputs Qi and Qi, which are associated with the control inputs of the respective; keys of an additional pair. 2. The converter according to claim 1, with the exception of the fact that the multiphase modulator the width of the pulses is made containing two frequency dividers with dividing coefficients differing by one, two shift registers by an angle of 2 l 1 t, t shapers modulated by pulse duration signals sequentially shifted to each other by an angle of 2 l / t on a carrier or a multiple of its frequency, a synchronization unit made up of m elements 2I and element m OR, three-phase register of the shift of the signals of the output frequency and m of the shapers of the counter-current signals $ and u, the output terminals forming the outputs of the multiphase pulse width modulator, the input of which is formed interconnected inputs of frequency dividers, the output of which is connected to the inputs of the mentioned shift registers by an angle of 2 l / t, their paraphase outputs are connected in pairs to the inputs of m formers of pulse-width modulated pulse signals, sequentially shifted between each other by an angle of 2 l / t by carrier frequency or a multiple thereof, each of which is made in the form of two narrow pulse shapers, outputs connected to the inputs of the 2OR element, the output of which is connected to the clock input of the RST trigger with paraphase outputs Fi, FI, to input give each of the elements 2 or inputs connected one element of a synchronization node 2V1 that their outputs are connected to inputs of the OR element m, the output of which is connected to one of the inputs of said mounting RST-flops and to the input of the three-channel shift register of signals of the output frequency, the first channel with the outputs QI and Qi of which is used as the output frequency adjuster, and the outputs Q2 and Oz of the second and third channels of this register and the outputs, F |, FI RST triggers connected to the corresponding inputs of m counterfeiters signals fy, fy, each of which is designed to provide internal communications between these elements and the formation of these signals in accordance with a logical expression $ Q2R + OzR |.