SU1474814A1 - Inverter cell control unit - Google Patents

Abstract

The invention relates to a converter technique and can be used in building sources of secondary power supply of a centralized type in cases where, according to the operating conditions, it is necessary to ensure the conversion of a constant voltage to an alternating one with an improved quality (small harmonic coefficient) and adjustable value. The purpose of the invention is to simplify and improve the quality of the output power by reducing the harmonic ratio of the output voltage. The device for controlling the inverter cell contains a frequency master 1, a pulse width modulator 3, a pulse shift register 2, and a five-channel control signal generating unit 4. The device provides control of a constant-voltage-to-voltage converter. Voltage regulation is performed by a partial pulse width control method. 2 Il.

Description

one

The invention relates to converter technology and can be used in the construction of centralized sources of secondary power supply (IHE) with quasi-sinusoidal output voltage or decentralized, voltage-controlled IHE, which transform a constant voltage into an alternating voltage.

The aim of the invention is to expand the range of voltage regulation and improve the quality of the converted electricity by reducing the harmonic ratio of the output voltage.

FIG. 1 is a schematic diagram of an apparatus for controlling an inverter cell; in fig. 2 - timing diagrams, explaining its principle of operation and the shape of the output voltage (adjustable) of the inverter cell,

I

Control unit (Fig. 1)

the inverter cell includes a frequency adjuster 1 connected to a seven-channel register 2 pulses with paraphase outputs

 and M ° DULAT ° RU 3 pulse widths with paraphase outputs S and S. The indicated register 2 can be executed, for example, on seven I-K triggers with cross-linking (not shown in Fig. 1). The outputs of the register 2 and the modulator 3 are connected to the inputs of the node 4 of the formation of control signals. The latter is made in five channels. Its first channel, intended to form the control signal Ml, contains two elements 2I 5 and 6 and element 2I-HE 7, you

five

0

five

five

0

0

turns connected to the inputs of the element ZILI 8, and the inputs forming the inputs of the formation 4 unit. At the output of the ZILI element 8, a signal defined by the logical expression will be generated:, Q7 + QiS + Q6S. The second channel of the formation unit 4, intended to form the control signal M2, contains three ZI 9-11 elements, the outputs of which are connected to the inputs of the ZILI element 12. A signal QiS + QiQ6S + Q6 QvS will be generated at the output of the latter. The next channel of the formation unit 4 is made on elements 13-16 similar to the first channel. The connections between its inputs and outputs (output of the ZILI element 16), on which the control signal MZ is formed, are determined by the logical expression M3 "Q-f + QjS + Q S. The channel of the control signal generation unit M4 2 is made similar to its second channel on elements 17-20. Its internal communication is determined by the logical expression, Q2S + Q2QeS + Q6Q7S. The fifth channel of node 2 of forming the control signal M5 contains two elements ZI 21 and 22, with outputs connected to the inputs of element 2OR 23. At the output of element 2 OR the signal M5 Q4Q6S + QZQ6S will be generated.

The outputs M1-M5 of the formation unit 4 are connected via the amplifying-decoupling unit 24 with the control inputs of the corresponding keys 25-29 of the power section of the inverter cell. It includes two stacks of keys 25, 26 and 27, 28 connected between the first 30 and second 31 DC power buses. To the diagonal of the variable

The inverter cell current is connected to the primary winding 32 of the transformer 33. The primary winding 32 is made with a midpoint, which divides this winding in the number of turns in half and connected through a key 29 to the first power supply bus 30. The keys 25 and 27, also connected to the first power supply bus 30, are made in the form of fully controlled AC switches, and the switches 26 and 28, connected to the second power bus 32, and the switch 29, in the form of a diode-by-pass transistor.

The principle of operation of the inverter cell control device is explained in the timing diagrams shown in FIG. 2 "Setpoint 1 frequency synchronizes the operation of the device and determines the frequency of the modulator, 3 pulse widths, as well as register 2. Phase shift between sequences of symmetric, rectangular pulses Q, Q2 ... Q7, 0,, dg ... d7 is / 1. The signals (pulses) U2 and and arrive at the inputs of the node forming the 4 control signals, in which the described logical operations are carried out. As a result, new sequences of pulses M1-M5 will be formed. The number of each element 5-23 corresponds to the index of the sequence obtained, some of which are shown in FIG. 2. The signals M1-M5 fed to the control inputs of the keys 25-29 determine the switching algorithm. At the output of the inverter cell, a voltage of the form U33 (Fig. 2) will be formed that implements the partial pulse-width control (CRR) algorithm.

Thus, the proposed device for controlling the inverter cell allows the formation of a quasi-sinusoidal output voltage curve and the control of its value by the CSIR method. The adjustment range of the output voltage of the inverter cell has increased by 15% (from the minimum value of the fundamental harmonic value of 0.588 Um, to 0.498 Um). The harmonic ratio of the output voltage is 164.

The invention can find application in the construction of centralized power sources when it is necessary to ensure the coordination of nominal levels of supply voltage and load.

five

0

five

0

five

0

five

0

five

ki, as well as the stabilization of the output voltage when the supply voltage varies within fairly wide limits (± 25%) with a high quality of the output voltage.

Claims (1)

Invention Formula A device for controlling an inverter cell that includes two key racks with control inputs M1-M4, the keys with control inputs Ml and MH connected to the first power bus, are made in the form of counter-connected transistors and a diode, and the keys with control inputs M2 and M4, connected to the second power bus in the form of fully controlled AC switches, the middle points of the key racks are connected to the ends of the transformer primary winding, the middle point of which is through the key with the control input M5, made in the form of oppositely connected transistors and a diode connected to a second power bus containing a frequency adjuster, the output of which is connected to the input of the pulse width modulator and the counting input of the N-channel pulse shift register with paraphase outputs Q., Q. ..QNQH connected to the corresponding inputs of a five-channel control signal generation node, to the remaining inputs of which paraphase outputs S, S of the pulse width modulator are connected, and outputs M1-M5 are connected to the corresponding control inputs of the keys of the inverter cell The connections between the inputs and outputs M2, M4, M5 of the control signal generation node are defined by the following logical expressions:  QZS + QZQN., S + QN., QNS; (Q1S + QaQN., S + QN., QNS;., S + QZQN, S, characterized in that, in order to expand the range of regulation and improve the quality of the output electricity by reducing the harmonic ratio of the output voltage, the pulse shift register is made seven-fold, and the connection between the inputs of the formation unit UP5144814 6 equal signals and outputs Ml, M1 Q6S + QZS + Q, Q-,; MZ performed implementing logical., 0 -, L „.jr-p. Mj Q6S + Q, S + Q, Q7. expression: X6 X2 ABOUT 7G / 2 TC FIG. 2 2I