PH12015501117A1 - Substrate for mounting semiconductor element and method for manufacturing said substrate - Google Patents

Substrate for mounting semiconductor element and method for manufacturing said substrate

Info

Publication number
PH12015501117A1
PH12015501117A1 PH12015501117A PH12015501117A PH12015501117A1 PH 12015501117 A1 PH12015501117 A1 PH 12015501117A1 PH 12015501117 A PH12015501117 A PH 12015501117A PH 12015501117 A PH12015501117 A PH 12015501117A PH 12015501117 A1 PH12015501117 A1 PH 12015501117A1
Authority
PH
Philippines
Prior art keywords
resist layer
layer
substrate
bottom resist
semiconductor element
Prior art date
Application number
PH12015501117A
Other versions
PH12015501117B1 (en
Inventor
Hosomomi Shigeru
Original Assignee
Sh Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sh Materials Co Ltd filed Critical Sh Materials Co Ltd
Publication of PH12015501117B1 publication Critical patent/PH12015501117B1/en
Publication of PH12015501117A1 publication Critical patent/PH12015501117A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142Sealing arrangements between parts, e.g. adhesion promotors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Provided is a substrate for mounting a semiconductor element, said substrate having improved adhesion between an electrode layer and a resin due to said electrode layer having roughened side surfaces and a cross-section shaped substantially like an inverted trapezoid. Also provided is a method for manufacturing said substrate, said method being characterized by containing the following steps, in this order: a) a step in which a two-layer resist layer comprising a bottom resist layer and a top resist layer is formed, from resists having different main photosensitivity wavelengths, on the surface of a metal plate; b) a step in which, with the bottom resist layer unexposed, the top resist layer is exposed using a prescribed pattern; c) a developing step in which a prescribed pattern of openings is formed in the top resist layer and the same prescribed pattern of openings is formed in the unexposed bottom resist layer, thereby partially revealing the surface of the metal plate; d) a step in which the bottom resist layer is exposed and cured; e) a step in which a prescribed plating layer is formed on the parts of the metal-plate surface revealed by the bottom resist layer; f) a step in which the entire two-layer resist layer, i.e. the bottom resist layer and the top resist layer, is removed; and g) a step in which the side surfaces of the plating layer formed in step e) are roughened.
PH12015501117A 2012-11-20 2015-05-20 Substrate for mounting semiconductor element and method for manufacturing said substrate PH12015501117A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012254654A JP6099369B2 (en) 2012-11-20 2012-11-20 Semiconductor device mounting substrate and manufacturing method thereof
PCT/JP2013/079765 WO2014080745A1 (en) 2012-11-20 2013-11-01 Substrate for mounting semiconductor element and method for manufacturing said substrate

Publications (2)

Publication Number Publication Date
PH12015501117B1 PH12015501117B1 (en) 2015-08-17
PH12015501117A1 true PH12015501117A1 (en) 2015-08-17

Family

ID=50775931

Family Applications (1)

Application Number Title Priority Date Filing Date
PH12015501117A PH12015501117A1 (en) 2012-11-20 2015-05-20 Substrate for mounting semiconductor element and method for manufacturing said substrate

Country Status (7)

Country Link
JP (1) JP6099369B2 (en)
KR (1) KR101691763B1 (en)
CN (1) CN104813465A (en)
MY (1) MY169149A (en)
PH (1) PH12015501117A1 (en)
TW (1) TWI637424B (en)
WO (1) WO2014080745A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109378270A (en) * 2018-09-29 2019-02-22 大连芯冠科技有限公司 The preparation method of the more field plates of power device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3626075B2 (en) * 2000-06-20 2005-03-02 九州日立マクセル株式会社 Manufacturing method of semiconductor device
JP2002374066A (en) * 2001-06-14 2002-12-26 Ibiden Co Ltd Method for manufacturing multilayered printed circuit substrate
JP3960302B2 (en) * 2002-12-18 2007-08-15 Tdk株式会社 Substrate manufacturing method
WO2006009030A1 (en) * 2004-07-15 2006-01-26 Dai Nippon Printing Co., Ltd. Semiconductor device and semiconductor device producing substrate and production methods therefor
JP4508064B2 (en) * 2005-09-30 2010-07-21 住友金属鉱山株式会社 Manufacturing method of wiring board for semiconductor device
JP5370330B2 (en) * 2010-10-01 2013-12-18 住友金属鉱山株式会社 Manufacturing method of semiconductor device mounting substrate

Also Published As

Publication number Publication date
WO2014080745A1 (en) 2014-05-30
KR20150087388A (en) 2015-07-29
PH12015501117B1 (en) 2015-08-17
JP6099369B2 (en) 2017-03-22
TWI637424B (en) 2018-10-01
TW201430907A (en) 2014-08-01
KR101691763B1 (en) 2017-01-09
CN104813465A (en) 2015-07-29
MY169149A (en) 2019-02-18
JP2014103277A (en) 2014-06-05

Similar Documents

Publication Publication Date Title
PH12015501133A1 (en) Substrate for mounting semiconductor element and method for manufacturing said substrate
IN2014DN03390A (en)
ATE557324T1 (en) METHOD FOR PRODUCING MULTI-LAYER METAL PARTS USING UV-LIGA TECHNOLOGY
MY186932A (en) Photosensitive resin composition
WO2007104171A3 (en) Uv-liga process for fabricating a multilayer metal structure having adjacent layers that are not entirely superposed, and structure obtained
MY171428A (en) Method for metallization of solar cell substrates
TW200637448A (en) Method for fabricating conducting bump structures of circuit board
MY174577A (en) Photosensitive resin composition and photosensitive resin laminate
PH12014502113A1 (en) Multi-layer substrate for semiconductor packaging
JP2014103295A5 (en)
JP2013098566A5 (en)
EP2715451A4 (en) Pattern forming method, actinic ray-sensitive or radiation-sensitive resin composition, resist film, method for manufacturing electronic device, and electronic device
JP2012114400A5 (en)
TW200746968A (en) Method for fabricating electrical connecting structure of circuit board
JP2015216344A5 (en)
TW200723982A (en) Wiring board manufacturing method
JP2012173708A5 (en)
WO2012143460A3 (en) Method for manufacturing a solar cell
PH12015501117A1 (en) Substrate for mounting semiconductor element and method for manufacturing said substrate
TWM433640U (en) Package structure of semiconductor light emitting device
CN103539366A (en) Cofferdam type glue sticking process
WO2011010889A3 (en) Flexible printed circuit board and method for manufacturing the same
JP2013507763A5 (en)
WO2013064592A3 (en) Wafer scale technique for interconnecting vertically stacked semiconductor dies
JP2014011335A5 (en)