MY169149A - Substrate for mounting semiconductor element and method for manufacturing said substrate - Google Patents

Substrate for mounting semiconductor element and method for manufacturing said substrate

Info

Publication number
MY169149A
MY169149A MYPI2015701633A MYPI2015701633A MY169149A MY 169149 A MY169149 A MY 169149A MY PI2015701633 A MYPI2015701633 A MY PI2015701633A MY PI2015701633 A MYPI2015701633 A MY PI2015701633A MY 169149 A MY169149 A MY 169149A
Authority
MY
Malaysia
Prior art keywords
resist layer
substrate
light
layer
forming
Prior art date
Application number
MYPI2015701633A
Inventor
Shigeru Hosomomi
Original Assignee
Ohkuchi Mat Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ohkuchi Mat Co Ltd filed Critical Ohkuchi Mat Co Ltd
Publication of MY169149A publication Critical patent/MY169149A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

Provided is a substrate for mounting a semiconductor element (1) with enhanced adhesiveness between an electrode layer and resin and a method for manufacturing the substrate thanks to a substantially inverted-trapezoidal sectional shape and roughened side surfaces (90) of the electrode layer. The method for manufacturing a substrate for mounting a semiconductor element includes following steps in sequence: a) a step of forming, on a front surface of a metal plate (20), a two-layered resist layer formed of a lower resist layer (30) and an upper resist layer (40) by using resists each having a different main photosensitive wavelength; b) a step of light-exposing the upper resist layer in a predetermined pattern while the lower resist layer is in a non-light-exposed state; c) a developing step of forming openings in a predetermined pattern in the upper resist layer and forming further openings with the pattern of the upper resist layer in the non-light-exposed lower resist layer to partially expose the front surface of the metal plate; d) a step of light-exposing and curing the lower resist layer; e) a step of forming predetermined plated layers (10) on the front surface of the metal plate exposed from the lower resist layer; f) a step of entirely peeling off the two-layer resist layer formed of the lower resist layer and the upper resist layer; and g) a step of roughening side surfaces of each of the plated layer formed in the step (e).
MYPI2015701633A 2012-11-20 2013-11-01 Substrate for mounting semiconductor element and method for manufacturing said substrate MY169149A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012254654A JP6099369B2 (en) 2012-11-20 2012-11-20 Semiconductor device mounting substrate and manufacturing method thereof

Publications (1)

Publication Number Publication Date
MY169149A true MY169149A (en) 2019-02-18

Family

ID=50775931

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2015701633A MY169149A (en) 2012-11-20 2013-11-01 Substrate for mounting semiconductor element and method for manufacturing said substrate

Country Status (7)

Country Link
JP (1) JP6099369B2 (en)
KR (1) KR101691763B1 (en)
CN (1) CN104813465A (en)
MY (1) MY169149A (en)
PH (1) PH12015501117A1 (en)
TW (1) TWI637424B (en)
WO (1) WO2014080745A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109378270A (en) * 2018-09-29 2019-02-22 大连芯冠科技有限公司 The preparation method of the more field plates of power device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3626075B2 (en) * 2000-06-20 2005-03-02 九州日立マクセル株式会社 Manufacturing method of semiconductor device
JP2002374066A (en) * 2001-06-14 2002-12-26 Ibiden Co Ltd Method for manufacturing multilayered printed circuit substrate
JP3960302B2 (en) * 2002-12-18 2007-08-15 Ｔｄｋ株式会社 Substrate manufacturing method
WO2006009030A1 (en) * 2004-07-15 2006-01-26 Dai Nippon Printing Co., Ltd. Semiconductor device and semiconductor device producing substrate and production methods therefor
JP4508064B2 (en) * 2005-09-30 2010-07-21 住友金属鉱山株式会社 Manufacturing method of wiring board for semiconductor device
JP5370330B2 (en) * 2010-10-01 2013-12-18 住友金属鉱山株式会社 Manufacturing method of semiconductor device mounting substrate

Also Published As

Publication number Publication date
WO2014080745A1 (en) 2014-05-30
KR20150087388A (en) 2015-07-29
PH12015501117B1 (en) 2015-08-17
JP6099369B2 (en) 2017-03-22
TWI637424B (en) 2018-10-01
TW201430907A (en) 2014-08-01
KR101691763B1 (en) 2017-01-09
PH12015501117A1 (en) 2015-08-17
CN104813465A (en) 2015-07-29
JP2014103277A (en) 2014-06-05

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