PH12015501133A1 - Substrate for mounting semiconductor element and method for manufacturing said substrate - Google Patents

Substrate for mounting semiconductor element and method for manufacturing said substrate

Info

Publication number
PH12015501133A1
PH12015501133A1 PH12015501133A PH12015501133A PH12015501133A1 PH 12015501133 A1 PH12015501133 A1 PH 12015501133A1 PH 12015501133 A PH12015501133 A PH 12015501133A PH 12015501133 A PH12015501133 A PH 12015501133A PH 12015501133 A1 PH12015501133 A1 PH 12015501133A1
Authority
PH
Philippines
Prior art keywords
resist layer
substrate
layer
bottom resist
semiconductor element
Prior art date
Application number
PH12015501133A
Other versions
PH12015501133B1 (en
Inventor
Hosomomi Shigeru
Original Assignee
Sh Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sh Materials Co Ltd filed Critical Sh Materials Co Ltd
Publication of PH12015501133A1 publication Critical patent/PH12015501133A1/en
Publication of PH12015501133B1 publication Critical patent/PH12015501133B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Provided is a substrate for mounting a semiconductor element, said substrate having improved adhesion between an electrode layer and a resin due to said electrode layer having a roughened surface and a cross-section shaped substantially like an inverted trapezoid. Also provided is a method for manufacturing said substrate, said method being characterized by containing the following steps, in this order: a) a step in which a two-layer resist layer consisting of a bottom resist layer and a top resist layer is formed, from resists having different main photosensitivity wavelengths, on the surface of a metal plate; b) a step in which, with the bottom resist layer unexposed, the top resist layer is exposed using a prescribed pattern; c) a developing step in which a prescribed pattern of openings is formed in the top resist layer and openings are also formed in the unexposed bottom resist layer, thereby partially revealing the surface of the metal plate; d) a step in which the bottom resist layer is exposed and thereby cured; e) a step in which a plating layer is formed on the parts of the metal-plate surface revealed by the bottom resist layer; f) a step in which the surface of said plating layer is roughened by an etching treatment; g) a step in which the resulting roughened surface is plated with a noble metal for bonding purposes; and h) a step in which both resist layers are removed.
PH12015501133A 2012-11-21 2015-05-21 Substrate for mounting semiconductor element and method for manufacturing said substrate PH12015501133B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012254958A JP6099370B2 (en) 2012-11-21 2012-11-21 Semiconductor device mounting substrate and manufacturing method thereof
PCT/JP2013/079766 WO2014080746A1 (en) 2012-11-21 2013-11-01 Substrate for mounting semiconductor element and method for manufacturing said substrate

Publications (2)

Publication Number Publication Date
PH12015501133A1 true PH12015501133A1 (en) 2015-07-27
PH12015501133B1 PH12015501133B1 (en) 2015-07-27

Family

ID=50775932

Family Applications (1)

Application Number Title Priority Date Filing Date
PH12015501133A PH12015501133B1 (en) 2012-11-21 2015-05-21 Substrate for mounting semiconductor element and method for manufacturing said substrate

Country Status (7)

Country Link
JP (1) JP6099370B2 (en)
KR (1) KR101691762B1 (en)
CN (1) CN104813464A (en)
MY (1) MY179632A (en)
PH (1) PH12015501133B1 (en)
TW (1) TWI605553B (en)
WO (1) WO2014080746A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6497615B2 (en) 2015-03-04 2019-04-10 パナソニックＩｐマネジメント株式会社 Mounting board and LED module using the same
JP6555927B2 (en) * 2015-05-18 2019-08-07 大口マテリアル株式会社 Semiconductor device mounting lead frame and semiconductor device manufacturing method
JP6641807B2 (en) * 2015-09-07 2020-02-05 大口マテリアル株式会社 Optical semiconductor device and method of manufacturing the same
JP2017168510A (en) * 2016-03-14 2017-09-21 Ｓｈマテリアル株式会社 Semiconductor element mounting substrate, semiconductor device, method of manufacturing semiconductor element mounting substrate, and method of manufacturing semiconductor device
JP6826073B2 (en) * 2018-05-31 2021-02-03 デクセリアルズ株式会社 Polarizing plate and its manufacturing method, and optical equipment

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3626075B2 (en) * 2000-06-20 2005-03-02 九州日立マクセル株式会社 Manufacturing method of semiconductor device
JP3960302B2 (en) * 2002-12-18 2007-08-15 Ｔｄｋ株式会社 Substrate manufacturing method
JP2004253433A (en) * 2003-02-18 2004-09-09 Matsushita Electric Ind Co Ltd Printed wiring board, modular component using it, and method for manufacturing same
JP2005077955A (en) * 2003-09-02 2005-03-24 Sanyo Electric Co Ltd Etching method and method for manufacturing circuit device by using same
JP4508064B2 (en) * 2005-09-30 2010-07-21 住友金属鉱山株式会社 Manufacturing method of wiring board for semiconductor device
JP5151438B2 (en) * 2007-12-10 2013-02-27 大日本印刷株式会社 Semiconductor device and manufacturing method thereof, and substrate for semiconductor device and manufacturing method thereof
JP5370330B2 (en) * 2010-10-01 2013-12-18 住友金属鉱山株式会社 Manufacturing method of semiconductor device mounting substrate

Also Published As

Publication number Publication date
CN104813464A (en) 2015-07-29
WO2014080746A1 (en) 2014-05-30
KR20150087387A (en) 2015-07-29
TW201436119A (en) 2014-09-16
MY179632A (en) 2020-11-11
JP6099370B2 (en) 2017-03-22
JP2014103293A (en) 2014-06-05
PH12015501133B1 (en) 2015-07-27
KR101691762B1 (en) 2017-01-09
TWI605553B (en) 2017-11-11

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