NO991859L - FremgangsmÕte for Õ utf°re fase-sammenlikning, samt fasekomparator - Google Patents

FremgangsmÕte for Õ utf°re fase-sammenlikning, samt fasekomparator

Info

Publication number
NO991859L
NO991859L NO991859A NO991859A NO991859L NO 991859 L NO991859 L NO 991859L NO 991859 A NO991859 A NO 991859A NO 991859 A NO991859 A NO 991859A NO 991859 L NO991859 L NO 991859L
Authority
NO
Norway
Prior art keywords
signal
state machine
phase
compared
handshaking
Prior art date
Application number
NO991859A
Other languages
English (en)
Norwegian (no)
Other versions
NO991859D0 (no
Inventor
Olli Piirainen
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Publication of NO991859L publication Critical patent/NO991859L/no
Publication of NO991859D0 publication Critical patent/NO991859D0/no

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Information Transfer Systems (AREA)
  • Control Of Electric Motors In General (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Measuring Phase Differences (AREA)
  • Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
  • Pyrane Compounds (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Measurement Of Current Or Voltage (AREA)
NO991859A 1997-08-20 1999-04-19 FremgangsmÕte for Õ utf°re fase-sammenlikning, samt fasekomparator NO991859D0 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI973421A FI103538B1 (fi) 1997-08-20 1997-08-20 Menetelmä vaihevertailun suorittamiseksi ja vaihevertailija
PCT/FI1998/000634 WO1999009654A2 (en) 1997-08-20 1998-08-18 Method for performing phase comparison, and phase comparator

Publications (2)

Publication Number Publication Date
NO991859L true NO991859L (no) 1999-04-19
NO991859D0 NO991859D0 (no) 1999-04-19

Family

ID=8549392

Family Applications (1)

Application Number Title Priority Date Filing Date
NO991859A NO991859D0 (no) 1997-08-20 1999-04-19 FremgangsmÕte for Õ utf°re fase-sammenlikning, samt fasekomparator

Country Status (11)

Country Link
US (1) US6532257B1 (fi)
EP (1) EP0938779B1 (fi)
JP (1) JP4166841B2 (fi)
CN (1) CN1169297C (fi)
AT (1) ATE231308T1 (fi)
AU (1) AU745305B2 (fi)
DE (1) DE69810748T2 (fi)
ES (1) ES2191956T3 (fi)
FI (1) FI103538B1 (fi)
NO (1) NO991859D0 (fi)
WO (1) WO1999009654A2 (fi)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6873183B1 (en) * 2003-05-12 2005-03-29 Xilinx, Inc. Method and circuit for glitchless clock control
US7129765B2 (en) 2004-04-30 2006-10-31 Xilinx, Inc. Differential clock tree in an integrated circuit
CN115800992B (zh) * 2023-02-07 2023-06-02 浪潮电子信息产业股份有限公司 一种握手信号的拆分电路、方法、装置、设备及存储介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3130156C2 (de) 1981-07-30 1986-11-27 Siemens AG, 1000 Berlin und 8000 München Digitaler Frequenz-Phasenkomparator
US4814726A (en) 1987-08-17 1989-03-21 National Semiconductor Corporation Digital phase comparator/charge pump with zero deadband and minimum offset
EP0520558A1 (en) * 1991-06-27 1992-12-30 Koninklijke Philips Electronics N.V. Phase locked loop and digital phase comparator for use in a phase-locked loop
GB2262415B (en) * 1991-12-13 1995-08-16 Digital Equipment Int Handshake synchronization system
US5744983A (en) * 1995-05-03 1998-04-28 Intel Corporation Phase detector with edge-sensitive enable and disable
US5583458A (en) * 1995-05-03 1996-12-10 Intel Corporation Phase detector with edge-sensitive enable and disable
AU729777B2 (en) 1995-12-15 2001-02-08 Ericsson Inc. Discrete phase locked loop
US5920207A (en) * 1997-11-05 1999-07-06 Hewlett Packard Company Asynchronous phase detector having a variable dead zone
US6239626B1 (en) * 2000-01-07 2001-05-29 Cisco Technology, Inc. Glitch-free clock selector

Also Published As

Publication number Publication date
JP2001505028A (ja) 2001-04-10
DE69810748T2 (de) 2003-10-02
CN1169297C (zh) 2004-09-29
CN1237289A (zh) 1999-12-01
FI103538B (fi) 1999-07-15
DE69810748D1 (de) 2003-02-20
EP0938779A2 (en) 1999-09-01
AU745305B2 (en) 2002-03-21
FI973421A0 (fi) 1997-08-20
JP4166841B2 (ja) 2008-10-15
EP0938779B1 (en) 2003-01-15
AU8809598A (en) 1999-03-08
NO991859D0 (no) 1999-04-19
ES2191956T3 (es) 2003-09-16
US6532257B1 (en) 2003-03-11
WO1999009654A2 (en) 1999-02-25
FI103538B1 (fi) 1999-07-15
WO1999009654A3 (en) 1999-06-03
FI973421A (fi) 1999-02-21
ATE231308T1 (de) 2003-02-15

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