NO964401L - Fremgangsmåte og anordning ved styring av et lager - Google Patents

Fremgangsmåte og anordning ved styring av et lager

Info

Publication number
NO964401L
NO964401L NO964401A NO964401A NO964401L NO 964401 L NO964401 L NO 964401L NO 964401 A NO964401 A NO 964401A NO 964401 A NO964401 A NO 964401A NO 964401 L NO964401 L NO 964401L
Authority
NO
Norway
Prior art keywords
memory
bit positions
control
digital information
sum
Prior art date
Application number
NO964401A
Other languages
English (en)
Norwegian (no)
Other versions
NO964401D0 (no
Inventor
Eva Charlotte Alvenkrona
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of NO964401D0 publication Critical patent/NO964401D0/no
Publication of NO964401L publication Critical patent/NO964401L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Electrotherapy Devices (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Detection And Correction Of Errors (AREA)
  • Warehouses Or Storage Devices (AREA)
  • Selective Calling Equipment (AREA)
  • Communication Control (AREA)
  • Sliding-Contact Bearings (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
NO964401A 1994-04-19 1996-10-16 Fremgangsmåte og anordning ved styring av et lager NO964401L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9401318A SE503316C2 (sv) 1994-04-19 1994-04-19 Förfarande för övervakning av ett minne samt kretsanordning härför
PCT/SE1995/000420 WO1995028674A2 (fr) 1994-04-19 1995-04-18 Methode et dispositif de commande d'une memoire

Publications (2)

Publication Number Publication Date
NO964401D0 NO964401D0 (no) 1996-10-16
NO964401L true NO964401L (no) 1996-12-13

Family

ID=20393700

Family Applications (1)

Application Number Title Priority Date Filing Date
NO964401A NO964401L (no) 1994-04-19 1996-10-16 Fremgangsmåte og anordning ved styring av et lager

Country Status (14)

Country Link
US (1) US5577055A (fr)
EP (1) EP0756727B1 (fr)
JP (1) JP2989669B2 (fr)
KR (1) KR100301098B1 (fr)
CN (1) CN1146248A (fr)
AT (1) ATE212455T1 (fr)
AU (1) AU682767B2 (fr)
BR (1) BR9507465A (fr)
CA (1) CA2186977C (fr)
DE (1) DE69525154T2 (fr)
FI (1) FI964196A0 (fr)
NO (1) NO964401L (fr)
SE (1) SE503316C2 (fr)
WO (1) WO1995028674A2 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19650993A1 (de) * 1996-11-26 1998-05-28 Francotyp Postalia Gmbh Anordnung und Verfahren zur Verbesserung der Datensicherheit mittels Ringpuffer
US6904552B2 (en) * 2001-03-15 2005-06-07 Micron Technolgy, Inc. Circuit and method for test and repair
US20020133769A1 (en) * 2001-03-15 2002-09-19 Cowles Timothy B. Circuit and method for test and repair
JP2002288041A (ja) * 2001-03-23 2002-10-04 Sony Corp 情報処理装置および方法、プログラム格納媒体、並びにプログラム
CN100338600C (zh) * 2003-01-03 2007-09-19 宇东科技股份有限公司 读取传感器的方法
US8583971B2 (en) * 2010-12-23 2013-11-12 Advanced Micro Devices, Inc. Error detection in FIFO queues using signature bits
US9311975B1 (en) * 2014-10-07 2016-04-12 Stmicroelectronics S.R.L. Bi-synchronous electronic device and FIFO memory circuit with jump candidates and related methods
JP2016167210A (ja) * 2015-03-10 2016-09-15 株式会社東芝 メモリコントローラ、データストレージデバイス、及び、データ書き込み方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4019033A (en) * 1975-12-29 1977-04-19 Honeywell Information Systems, Inc. Control store checking system and method
US4271521A (en) * 1979-07-09 1981-06-02 The Anaconda Company Address parity check system
IL67664A (en) * 1982-01-19 1987-01-30 Tandem Computers Inc Computer memory system with data,address and operation error detection
US4692893A (en) * 1984-12-24 1987-09-08 International Business Machines Corp. Buffer system using parity checking of address counter bit for detection of read/write failures
US4809278A (en) * 1986-04-21 1989-02-28 Unisys Corporation Specialized parity detection system for wide memory structure
US5047927A (en) * 1988-10-28 1991-09-10 National Semiconductor Corporation Memory management in packet data mode systems
EP0463210B1 (fr) * 1990-06-27 1995-05-31 International Business Machines Corporation Méthode et appareil de contrôle d'adresse et de contenu d'un dispositif de mémoire
DE4104198A1 (de) * 1991-02-12 1992-08-13 Basf Ag Verfahren zur herstellung von formteilen mit guten oberflaecheneigenschaften
DE69129851T2 (de) * 1991-09-13 1999-03-25 International Business Machines Corp., Armonk, N.Y. Konfigurierbare gigabit/s Vermittlunganpassungseinrichtung
US5426639A (en) * 1991-11-29 1995-06-20 At&T Corp. Multiple virtual FIFO arrangement
DE69124743T2 (de) * 1991-11-29 1997-08-14 Ibm Vorrichtung zur Speicherung und Durchschaltung und Verfahren zur Datensicherung während der Speicherung
US5477553A (en) * 1994-07-22 1995-12-19 Professional Computer Systems, Inc. Compressed memory address parity checking apparatus and method

Also Published As

Publication number Publication date
WO1995028674A2 (fr) 1995-10-26
AU682767B2 (en) 1997-10-16
KR970702525A (ko) 1997-05-13
JPH09505680A (ja) 1997-06-03
FI964196A (fi) 1996-10-18
CA2186977A1 (fr) 1995-10-26
FI964196A0 (fi) 1996-10-18
BR9507465A (pt) 1997-09-16
JP2989669B2 (ja) 1999-12-13
WO1995028674A3 (fr) 1995-11-30
EP0756727A1 (fr) 1997-02-05
DE69525154T2 (de) 2002-09-05
US5577055A (en) 1996-11-19
ATE212455T1 (de) 2002-02-15
SE9401318L (sv) 1995-10-20
NO964401D0 (no) 1996-10-16
AU2378495A (en) 1995-11-10
KR100301098B1 (ko) 2001-10-26
SE503316C2 (sv) 1996-05-13
EP0756727B1 (fr) 2002-01-23
CN1146248A (zh) 1997-03-26
DE69525154D1 (de) 2002-03-14
CA2186977C (fr) 2000-10-03
SE9401318D0 (sv) 1994-04-19

Similar Documents

Publication Publication Date Title
EP1870902A3 (fr) Dispositif de mémoire à semi-conducteurs et procédé de stockage correspondant
MY127318A (en) Memory apparatus and memory access restricting method
WO2002029589A1 (fr) Dispositif de comparaison, systeme et procede de communication de donnees
CA2242740A1 (fr) Appareil et methode de traitement de donnees
MY126422A (en) Data storage, data processing system and method
NO964401L (no) Fremgangsmåte og anordning ved styring av et lager
TW336305B (en) Decoding method and the electronic device
TW359833B (en) Digital audio recorder and player with address backup function
EP0353610A3 (fr) Dispositif de multiplexage
CA2017298A1 (fr) Compteur kilometrique electronique
GB2246004B (en) Serial-accessed memory data accessing circuit involving low operating current,and method thereof
TW376522B (en) DRAM with variable internal operation frequency
EP0658902A3 (fr) Mémoire à semi-conducteurs avec un circuit d'écriture/lecture de données à haute vitesse et basse puissance.
TW353180B (en) A method and apparatus for bit cell ground choking for improved memory write margin
EP0841654A3 (fr) Appareil et méthode de commande de mémorisation de données décodées d'image à visualiser dans une mémoire de visualisation
MX9604850A (es) Metodo y dispositivo para controlar una memoria.
GB2305750A (en) Recording audio to IC card with silence detection
KR910020648A (ko) 디지탈 오디오 신호 판독 장치
EP0645710A3 (fr) Procédé de test du fonctionnement de mémoire non-faible au plan de la technique de la signalisation pour au moins deux canaux des données utiles stockées et agencement pour réaliser le procédé.
EP1087380A3 (fr) Dispositif et procédé de reproduction
MX9601051A (es) Metodo y dispositivo para controlar una memoria.
TW326529B (en) Memory device and its control method
EP0858075A3 (fr) Commande de mémoire dans un appareil d'enregistrement et/ou de reproduction
KR100188269B1 (ko) Cd 체인저의 백업 데이타 독출방법
TW347500B (en) Data order determining device