NO950174D0 - PLL syntetiserer og fremgangsmåte for styring av samme - Google Patents

PLL syntetiserer og fremgangsmåte for styring av samme

Info

Publication number
NO950174D0
NO950174D0 NO950174A NO950174A NO950174D0 NO 950174 D0 NO950174 D0 NO 950174D0 NO 950174 A NO950174 A NO 950174A NO 950174 A NO950174 A NO 950174A NO 950174 D0 NO950174 D0 NO 950174D0
Authority
NO
Norway
Prior art keywords
pll
synthesizes
processes
controlling
same
Prior art date
Application number
NO950174A
Other languages
English (en)
Other versions
NO950174L (no
Inventor
Kazuo Yamashita
Akiharu Inoue
Masahiko Egawa
Hiroaki Sakuma
Nobuyuki Adachi
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Publication of NO950174D0 publication Critical patent/NO950174D0/no
Publication of NO950174L publication Critical patent/NO950174L/no

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/20Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a harmonic phase-locked loop, i.e. a loop which can be locked to one of a number of harmonically related frequencies applied to it
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
NO950174A 1994-01-19 1995-01-17 PLL syntetiserer og fremgangsmåte for styring av samme NO950174L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6004180A JP2875472B2 (ja) 1994-01-19 1994-01-19 Pllシンセサイザ及びその制御方法

Publications (2)

Publication Number Publication Date
NO950174D0 true NO950174D0 (no) 1995-01-17
NO950174L NO950174L (no) 1995-07-20

Family

ID=11577519

Family Applications (1)

Application Number Title Priority Date Filing Date
NO950174A NO950174L (no) 1994-01-19 1995-01-17 PLL syntetiserer og fremgangsmåte for styring av samme

Country Status (8)

Country Link
EP (1) EP0664617B1 (no)
JP (2) JP2875472B2 (no)
KR (1) KR100306671B1 (no)
CN (1) CN1057882C (no)
CA (1) CA2139904C (no)
DE (1) DE69500892T2 (no)
NO (1) NO950174L (no)
TW (1) TW317399U (no)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0782271B1 (en) * 1995-12-28 2002-03-13 Thomson Consumer Electronics, Inc. Phase locked loop with controllable response time
US5802450A (en) * 1996-04-19 1998-09-01 Ericsson Inc. Transmit sequencing
JPH10233816A (ja) * 1997-02-21 1998-09-02 Sharp Corp デジタル衛星受信機
JP4138264B2 (ja) * 2001-03-16 2008-08-27 富士通株式会社 Pll周波数シンセサイザ
GB2393863B (en) * 2001-09-14 2004-09-15 Nec Corp PLL synthesizer in a cellular phone
US6819197B2 (en) 2002-01-29 2004-11-16 Qualcomm Incorporated Multiple bandwidth phase lock filters for multimode radios
CN100349378C (zh) * 2002-04-19 2007-11-14 陈为怀 网同步可集成从时钟锁相环
JP4029138B2 (ja) 2002-05-20 2008-01-09 富士通株式会社 周波数シンセサイザ回路
FR2855341B1 (fr) 2003-05-22 2005-08-05 Eads Telecom Circuit de commande de decalage en tension pour pll
KR100738345B1 (ko) 2005-12-14 2007-07-12 주식회사 대우일렉트로닉스 클럭 발생 장치 및 방법
JP4730153B2 (ja) * 2006-03-15 2011-07-20 株式会社デンソー フィルタ回路
CN100465593C (zh) * 2006-06-06 2009-03-04 北京航空航天大学 电阻拾振式硅微机械谐振传感器的锁相闭环系统
US7672645B2 (en) 2006-06-15 2010-03-02 Bitwave Semiconductor, Inc. Programmable transmitter architecture for non-constant and constant envelope modulation
US20080007365A1 (en) * 2006-06-15 2008-01-10 Jeff Venuti Continuous gain compensation and fast band selection in a multi-standard, multi-frequency synthesizer
JP5423967B2 (ja) * 2008-02-12 2014-02-19 日本電気株式会社 クロック・データ再生回路
US8791732B2 (en) 2011-05-09 2014-07-29 Mediatek Inc. Phase locked loop
CN105099444B (zh) * 2014-04-29 2018-05-25 龙芯中科技术有限公司 环路滤波方法、环路滤波器及锁相环
RU2680751C1 (ru) * 2017-12-22 2019-02-26 Акционерное общество "Концерн "Созвездие" Петлевой фильтр с коммутацией полосы пропускания системы ФАПЧ синтезатора частоты (варианты)
CN110190846B (zh) * 2019-04-15 2023-05-23 合肥酷芯微电子有限公司 锁相环防频率过冲电路
JP7276207B2 (ja) * 2020-03-10 2023-05-18 株式会社デンソー 温度検出装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3729688A (en) * 1971-12-15 1973-04-24 Motorola Inc Oscillator with switchable filter control voltage input for rapidly switching to discrete frequency outputs
US4745371A (en) * 1985-08-02 1988-05-17 Libera Developments Limited Phase-locked digital synthesizer
US4752749A (en) * 1986-12-22 1988-06-21 Rockwell International Corporation Fast response tuner
US4937536A (en) * 1988-08-19 1990-06-26 Hughes Aircraft Company Fast settling phase lock loop
JP2798142B2 (ja) * 1990-06-15 1998-09-17 三菱電機株式会社 周波数シンセサイザ
IT1271932B (it) * 1993-02-09 1997-06-10 Italtel Spa Sintetizzatore di frequenza pll specialmente per sistemi frequency- hopping con modulazione diretta di frequenza

Also Published As

Publication number Publication date
JPH07212228A (ja) 1995-08-11
NO950174L (no) 1995-07-20
CA2139904A1 (en) 1995-07-20
EP0664617B1 (en) 1997-10-22
DE69500892T2 (de) 1998-02-12
KR100306671B1 (ko) 2001-12-01
EP0664617A3 (en) 1996-02-14
JPH11191735A (ja) 1999-07-13
TW317399U (en) 1997-10-01
CN1057882C (zh) 2000-10-25
JP2875472B2 (ja) 1999-03-31
CN1115522A (zh) 1996-01-24
EP0664617A2 (en) 1995-07-26
DE69500892D1 (de) 1997-11-27
KR950035096A (ko) 1995-12-30
CA2139904C (en) 1999-11-02

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