NO884808L - Fremgangsmaate til generering av et korreksjonssignal i endigital taktgjenvinningsinnretning. - Google Patents

Fremgangsmaate til generering av et korreksjonssignal i endigital taktgjenvinningsinnretning.

Info

Publication number
NO884808L
NO884808L NO88884808A NO884808A NO884808L NO 884808 L NO884808 L NO 884808L NO 88884808 A NO88884808 A NO 88884808A NO 884808 A NO884808 A NO 884808A NO 884808 L NO884808 L NO 884808L
Authority
NO
Norway
Prior art keywords
phase
digital signal
auxiliary data
clock
dht1
Prior art date
Application number
NO88884808A
Other languages
English (en)
Other versions
NO884808D0 (no
Inventor
Imre Sarkoezi
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of NO884808D0 publication Critical patent/NO884808D0/no
Publication of NO884808L publication Critical patent/NO884808L/no

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Engineering & Computer Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
  • Television Signal Processing For Recording (AREA)
  • Measuring Fluid Pressure (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Optical Recording Or Reproduction (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Dc Digital Transmission (AREA)
NO88884808A 1987-10-27 1988-10-27 Fremgangsmaate til generering av et korreksjonssignal i endigital taktgjenvinningsinnretning. NO884808L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3736351 1987-10-27

Publications (2)

Publication Number Publication Date
NO884808D0 NO884808D0 (no) 1988-10-27
NO884808L true NO884808L (no) 1989-05-02

Family

ID=6339185

Family Applications (1)

Application Number Title Priority Date Filing Date
NO88884808A NO884808L (no) 1987-10-27 1988-10-27 Fremgangsmaate til generering av et korreksjonssignal i endigital taktgjenvinningsinnretning.

Country Status (10)

Country Link
US (1) US4955040A (no)
EP (1) EP0313953B1 (no)
JP (1) JPH01147936A (no)
AT (1) ATE77026T1 (no)
AU (1) AU586586B2 (no)
CA (1) CA1292288C (no)
DE (1) DE3871717D1 (no)
ES (1) ES2031567T3 (no)
GR (1) GR3005453T3 (no)
NO (1) NO884808L (no)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4972443A (en) * 1987-11-24 1990-11-20 Siemens Aktiengesellschaft Method and arrangement for generating a correction signal for a digital clock recovery means
ATE110505T1 (de) * 1989-02-23 1994-09-15 Siemens Ag Verfahren und anordnung zum anpassen eines taktes an ein plesiochrones datensignal und zu dessen abtakten mit dem angepassten takt.
US5077529A (en) * 1989-07-19 1991-12-31 Level One Communications, Inc. Wide bandwidth digital phase locked loop with reduced low frequency intrinsic jitter
JP3121448B2 (ja) * 1991-09-06 2000-12-25 ゼロックス コーポレイション クロック発生回路
SE469616B (sv) * 1991-12-23 1993-08-02 Ellemtel Utvecklings Ab Anordning foer foerskjutning av fasen hos en klocksignal samt saett och anordning foer taktaatervinning hos en digital datasignal
US5784543A (en) * 1995-12-04 1998-07-21 Xerox Corporation Clock multiplier
DE69833410T2 (de) 1998-08-21 2006-09-07 Lucent Technologies Inc. Vorrichtung zur Phasenanpassung

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3582789A (en) * 1969-01-21 1971-06-01 Motorola Inc Asynchronous data signal reception
GB1421966A (en) * 1973-05-18 1976-01-21 Plessey Co Ltd Circuit arrangements for use in telecommunications switching systems
DE2641547C2 (de) * 1976-09-15 1980-11-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Übernahme von PCM Informationen
JPS5642825A (en) * 1979-09-14 1981-04-21 Clarion Co Ltd Compensating circuit for data reading clock
US4320515A (en) * 1980-03-07 1982-03-16 Harris Corporation Bit synchronizer
US4400667A (en) * 1981-01-12 1983-08-23 Sangamo Weston, Inc. Phase tolerant bit synchronizer for digital signals
JPS58202680A (ja) * 1982-05-21 1983-11-25 Toshiba Corp 位相同期回路
JPS5957530A (ja) * 1982-09-27 1984-04-03 Hitachi Ltd 位相同期回路
JPS5963835A (ja) * 1982-10-04 1984-04-11 Hitachi Ltd ビツト同期回路
NL8301625A (nl) * 1983-05-06 1984-12-03 Nederlanden Staat Synchronisatieinrichting met kloksignaalfasekeuze.
JPS59221045A (ja) * 1983-05-30 1984-12-12 Toshiba Corp デ−タ送受信タイミング制御方式
JPS59225640A (ja) * 1983-06-06 1984-12-18 Nitsuko Ltd クロツク位相同期方式
US4672639A (en) * 1984-05-24 1987-06-09 Kabushiki Kaisha Toshiba Sampling clock pulse generator
FR2604043B1 (fr) * 1986-09-17 1993-04-09 Cit Alcatel Dispositif de recalage d'un ou plusieurs trains de donnees binaires de debits identiques ou sous-multiples sur un signal de reference d'horloge synchrone
AR242878A1 (es) * 1986-11-27 1993-05-31 Siemens Ag Disposicion de circuito para derivar una senal de reloj auxiliar de datos a partir de la frecuencia y/o de la fase de reloj de una senal digital sincronica o plesiocronica.

Also Published As

Publication number Publication date
ES2031567T3 (es) 1992-12-16
GR3005453T3 (no) 1993-05-24
EP0313953B1 (de) 1992-06-03
NO884808D0 (no) 1988-10-27
AU586586B2 (en) 1989-07-13
DE3871717D1 (de) 1992-07-09
ATE77026T1 (de) 1992-06-15
CA1292288C (en) 1991-11-19
US4955040A (en) 1990-09-04
EP0313953A1 (de) 1989-05-03
JPH01147936A (ja) 1989-06-09
AU2441588A (en) 1989-04-27

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