NO750873L - - Google Patents

Info

Publication number
NO750873L
NO750873L NO750873A NO750873A NO750873L NO 750873 L NO750873 L NO 750873L NO 750873 A NO750873 A NO 750873A NO 750873 A NO750873 A NO 750873A NO 750873 L NO750873 L NO 750873L
Authority
NO
Norway
Prior art keywords
data
address
control memory
ram
memory
Prior art date
Application number
NO750873A
Other languages
English (en)
Norwegian (no)
Inventor
B Valastro
F Stipcevic
Original Assignee
Ericsson L M Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson L M Pty Ltd filed Critical Ericsson L M Pty Ltd
Publication of NO750873L publication Critical patent/NO750873L/no

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Machine Translation (AREA)
NO750873A 1974-03-15 1975-03-14 NO750873L (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AUPB692874 1974-03-15

Publications (1)

Publication Number Publication Date
NO750873L true NO750873L (es) 1975-09-16

Family

ID=3765861

Family Applications (1)

Application Number Title Priority Date Filing Date
NO750873A NO750873L (es) 1974-03-15 1975-03-14

Country Status (16)

Country Link
US (1) US4081610A (es)
JP (1) JPS50133712A (es)
AU (1) AU7906875A (es)
BE (1) BE826694A (es)
BR (1) BR7501494A (es)
CA (1) CA1018670A (es)
DE (1) DE2511348A1 (es)
DK (1) DK105675A (es)
ES (1) ES435531A1 (es)
FI (1) FI750740A (es)
FR (1) FR2264360B3 (es)
GB (1) GB1500368A (es)
IT (1) IT1034252B (es)
NL (1) NL7503082A (es)
NO (1) NO750873L (es)
SE (1) SE7502917L (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4093827A (en) * 1976-02-17 1978-06-06 Thomson-Csf Symmetrical time division matrix and a network equipped with this kind of matrix
US4525831A (en) * 1983-06-22 1985-06-25 Gte Automatic Electric Inc. Interface arrangement for buffering communication information between a transmitting and receiving stage of a time-space-time digital switching system
KR100466695B1 (ko) * 2001-08-10 2005-01-24 (주)종현엔지니어링건축사사무소 조립식 건물의 지붕구조체와 벽체 간의 결합구조 및 방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789827A (fr) * 1971-10-12 1973-04-09 Int Standard Electric Corp Perfectionnements aux reseaux de commutation temporelle
BE791917A (fr) * 1971-11-25 1973-03-16 Post Office Perfectionnements aux systemes de telecommunication multiplex adivisiondans le temps
BE795164A (fr) * 1972-02-08 1973-05-29 Ericsson Telefon Ab L M Procede de commande de portes de jonctions communes dans un central a modulation par impulsions codees
FR2180171A5 (es) * 1972-04-11 1973-11-23 Materiel Telephonique
US3761894A (en) * 1972-05-12 1973-09-25 Bell Telephone Labor Inc Partitioned ramdom access memories for increasing throughput rate
FR2224961B1 (es) * 1973-04-06 1977-04-29 Voyer Paul
US3867579A (en) * 1973-12-21 1975-02-18 Bell Telephone Labor Inc Synchronization apparatus for a time division switching system

Also Published As

Publication number Publication date
ES435531A1 (es) 1976-12-16
GB1500368A (en) 1978-02-08
BE826694A (fr) 1975-06-30
FI750740A (es) 1975-09-16
AU7906875A (en) 1976-09-16
US4081610A (en) 1978-03-28
SE7502917L (es) 1975-09-16
BR7501494A (pt) 1975-12-16
DE2511348A1 (de) 1975-09-18
NL7503082A (nl) 1975-09-17
IT1034252B (it) 1979-09-10
FR2264360B3 (es) 1977-11-18
DK105675A (es) 1975-09-16
CA1018670A (en) 1977-10-04
FR2264360A1 (es) 1975-10-10
JPS50133712A (es) 1975-10-23

Similar Documents

Publication Publication Date Title
US4771420A (en) Time slot interchange digital switched matrix
US3974340A (en) Data switching apparatus and method
JP4659792B2 (ja) メモリ構造
EP0416281A2 (en) Data buffer
US4755971A (en) Buffer memory for an input line of a digital interface
US5708618A (en) Multiport field memory
JP2004534443A (ja) 一段スイッチの構造
EP0520425B1 (en) Semiconductor memory device
EP0209193A1 (en) Method of switching time slots in a tdm-signal and arrangement for performing the method
US5351238A (en) Method of controlling a frame phase of a time-division switch and frame phase variable time-division switch
NO750873L (es)
GB1470701A (en) Digital switching system
US6438719B1 (en) Memory supervision
US6961343B1 (en) Cross-connection switch
US4009349A (en) Switching station for PCM telecommunication system
US5822316A (en) ATM switch address generating circuit
JP3761962B2 (ja) タイムスイッチメモリのデータ制御装置
US3906209A (en) Wrong addressing detector
JP2914289B2 (ja) 時分割スイッチの制御方式
US6442097B2 (en) Virtual channel DRAM
US6515986B1 (en) Method and apparatus for switching frame-oriented serial data
JPH0683511B2 (ja) 時分割交換方式
JPS59156097A (ja) 時分割スイツチの出力制御方式
SU1474663A2 (ru) Многоканальное устройство дл сопр жени каналов св зи с ЦВМ
JPH03143139A (ja) パケットスイツチ