NO20034843D0 - EEPROM med et asymmetrisk tynt vindu - Google Patents
EEPROM med et asymmetrisk tynt vinduInfo
- Publication number
- NO20034843D0 NO20034843D0 NO20034843A NO20034843A NO20034843D0 NO 20034843 D0 NO20034843 D0 NO 20034843D0 NO 20034843 A NO20034843 A NO 20034843A NO 20034843 A NO20034843 A NO 20034843A NO 20034843 D0 NO20034843 D0 NO 20034843D0
- Authority
- NO
- Norway
- Prior art keywords
- eeprom
- thin window
- asymmetrical
- asymmetrical thin
- window
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/847,810 US6369422B1 (en) | 2001-05-01 | 2001-05-01 | Eeprom cell with asymmetric thin window |
| PCT/US2002/007307 WO2002089214A1 (en) | 2001-05-01 | 2002-03-11 | Eeprom cell with asymmetric thin window |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| NO20034843D0 true NO20034843D0 (no) | 2003-10-30 |
| NO20034843L NO20034843L (no) | 2004-01-02 |
Family
ID=25301568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NO20034843A NO20034843L (no) | 2001-05-01 | 2003-10-30 | EEPROM med et asymmetrisk tynt vindu |
Country Status (9)
| Country | Link |
|---|---|
| US (2) | US6369422B1 (no) |
| EP (1) | EP1388172A1 (no) |
| JP (1) | JP2004527128A (no) |
| KR (1) | KR20040015239A (no) |
| CN (1) | CN1263152C (no) |
| CA (1) | CA2445592A1 (no) |
| NO (1) | NO20034843L (no) |
| TW (1) | TW548782B (no) |
| WO (1) | WO2002089214A1 (no) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6624027B1 (en) * | 2002-05-09 | 2003-09-23 | Atmel Corporation | Ultra small thin windows in floating gate transistors defined by lost nitride spacers |
| US20050239250A1 (en) * | 2003-08-11 | 2005-10-27 | Bohumil Lojek | Ultra dense non-volatile memory array |
| US6905926B2 (en) * | 2003-09-04 | 2005-06-14 | Atmel Corporation | Method of making nonvolatile transistor pairs with shared control gate |
| CA2520140C (en) * | 2004-05-06 | 2007-05-15 | Sidense Corp. | Split-channel antifuse array architecture |
| US8735297B2 (en) | 2004-05-06 | 2014-05-27 | Sidense Corporation | Reverse optical proximity correction method |
| US9123572B2 (en) | 2004-05-06 | 2015-09-01 | Sidense Corporation | Anti-fuse memory cell |
| US7755162B2 (en) * | 2004-05-06 | 2010-07-13 | Sidense Corp. | Anti-fuse memory cell |
| CN100403551C (zh) * | 2005-03-08 | 2008-07-16 | 联华电子股份有限公司 | 高压元件结构 |
| KR100691006B1 (ko) * | 2005-04-29 | 2007-03-09 | 주식회사 하이닉스반도체 | 메모리 소자의 셀 트랜지스터 구조 및 그 제조방법 |
| US20070166971A1 (en) * | 2006-01-17 | 2007-07-19 | Atmel Corporation | Manufacturing of silicon structures smaller than optical resolution limits |
| KR100784082B1 (ko) * | 2006-06-29 | 2007-12-10 | 주식회사 하이닉스반도체 | 반도체 메모리 소자 및 그것의 제조 방법 |
| US20080119022A1 (en) * | 2006-11-22 | 2008-05-22 | Atmel Corporation | Method of making eeprom transistors |
| KR100789409B1 (ko) * | 2007-01-02 | 2007-12-28 | 삼성전자주식회사 | 이이피롬 소자 및 그 제조방법 |
| CN101752381B (zh) * | 2008-12-10 | 2013-07-24 | 上海华虹Nec电子有限公司 | Otp器件结构及其制备方法 |
| CN101989551B (zh) * | 2009-08-06 | 2012-01-25 | 中芯国际集成电路制造(上海)有限公司 | 不对称晶体管的形成方法 |
| JP5839958B2 (ja) * | 2010-12-29 | 2016-01-06 | セイコーインスツル株式会社 | 半導体不揮発性メモリ装置 |
| US8850379B2 (en) | 2012-01-18 | 2014-09-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of and system for generating optimized semiconductor component layout |
| WO2014066997A1 (en) * | 2012-10-29 | 2014-05-08 | Sidense Corporation | A reverse optical proximity correction method |
| CN104733461B (zh) * | 2013-12-23 | 2018-02-06 | 上海华虹宏力半导体制造有限公司 | Eeprom的结构及其制造方法 |
| US10840333B2 (en) * | 2018-10-31 | 2020-11-17 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor arrangement and method of manufacture |
| US11515314B2 (en) * | 2020-06-04 | 2022-11-29 | Globalfoundries Singapore Pte. Ltd. | One transistor two capacitors nonvolatile memory cell |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5103814A (en) | 1988-04-28 | 1992-04-14 | Timothy Maher | Self-compensating patient respirator |
| US5334550A (en) | 1989-01-09 | 1994-08-02 | Texas Instruments Incorporated | Method of producing a self-aligned window at recessed intersection of insulating regions |
| US5066992A (en) | 1989-06-23 | 1991-11-19 | Atmel Corporation | Programmable and erasable MOS memory device |
| US5102814A (en) | 1990-11-02 | 1992-04-07 | Intel Corporation | Method for improving device scalability of buried bit line flash EPROM devices having short reoxidation beaks and shallower junctions |
| US5094968A (en) | 1990-11-21 | 1992-03-10 | Atmel Corporation | Fabricating a narrow width EEPROM with single diffusion electrode formation |
| US5086325A (en) | 1990-11-21 | 1992-02-04 | Atmel Corporation | Narrow width EEPROM with single diffusion electrode formation |
| US5198381A (en) | 1991-09-12 | 1993-03-30 | Vlsi Technology, Inc. | Method of making an E2 PROM cell with improved tunneling properties having two implant stages |
| US5379253A (en) | 1992-06-01 | 1995-01-03 | National Semiconductor Corporation | High density EEPROM cell array with novel programming scheme and method of manufacture |
| US5424233A (en) | 1994-05-06 | 1995-06-13 | United Microflectronics Corporation | Method of making electrically programmable and erasable memory device with a depression |
| US5640032A (en) | 1994-09-09 | 1997-06-17 | Nippon Steel Corporation | Non-volatile semiconductor memory device with improved rewrite speed |
| JP3710880B2 (ja) | 1996-06-28 | 2005-10-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| US5844269A (en) * | 1996-07-02 | 1998-12-01 | National Semiconductor Corporation | EEPROM cell having reduced capacitance across the layer of tunnel oxide |
| US5904524A (en) | 1996-08-08 | 1999-05-18 | Altera Corporation | Method of making scalable tunnel oxide window with no isolation edges |
| US5953254A (en) * | 1996-09-09 | 1999-09-14 | Azalea Microelectronics Corp. | Serial flash memory |
| US5861333A (en) | 1996-10-25 | 1999-01-19 | United Microelectonics Corp. | Method of tunnel window process for EEPROM cell technology |
| US5895240A (en) | 1997-06-30 | 1999-04-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making stepped edge structure of an EEPROM tunneling window |
| US5973356A (en) | 1997-07-08 | 1999-10-26 | Micron Technology, Inc. | Ultra high density flash memory |
| US5936274A (en) | 1997-07-08 | 1999-08-10 | Micron Technology, Inc. | High density flash memory |
| US6187634B1 (en) * | 1997-11-19 | 2001-02-13 | Altera Corporation | Process for making an EEPROM active area castling |
| US6171907B1 (en) * | 1997-12-19 | 2001-01-09 | Nexflash Technologies, Inc. | Method for fabricating tunnel window in EEPROM cell with reduced cell pitch |
| US5972752A (en) | 1997-12-29 | 1999-10-26 | United Semiconductor Corp. | Method of manufacturing a flash memory cell having a tunnel oxide with a long narrow top profile |
| EP0994512B1 (en) * | 1998-10-15 | 2004-09-22 | STMicroelectronics S.r.l. | Simplified DPCC process for manufacturing FLOTOX EEPROM non-autoaligned semiconductor memory cells |
| FR2800200B1 (fr) * | 1999-10-21 | 2002-01-04 | St Microelectronics Sa | Procede de fabrication de points memoire eeprom |
-
2001
- 2001-05-01 US US09/847,810 patent/US6369422B1/en not_active Expired - Fee Related
- 2001-11-02 US US10/053,473 patent/US6486031B1/en not_active Expired - Fee Related
-
2002
- 2002-03-11 KR KR10-2003-7014298A patent/KR20040015239A/ko not_active Application Discontinuation
- 2002-03-11 EP EP02715090A patent/EP1388172A1/en not_active Withdrawn
- 2002-03-11 CN CNB028091337A patent/CN1263152C/zh not_active Expired - Fee Related
- 2002-03-11 CA CA002445592A patent/CA2445592A1/en not_active Abandoned
- 2002-03-11 JP JP2002586408A patent/JP2004527128A/ja active Pending
- 2002-03-11 WO PCT/US2002/007307 patent/WO2002089214A1/en not_active Application Discontinuation
- 2002-04-02 TW TW091106599A patent/TW548782B/zh not_active IP Right Cessation
-
2003
- 2003-10-30 NO NO20034843A patent/NO20034843L/no unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002089214A1 (en) | 2002-11-07 |
| KR20040015239A (ko) | 2004-02-18 |
| CN1263152C (zh) | 2006-07-05 |
| CA2445592A1 (en) | 2002-11-07 |
| US6369422B1 (en) | 2002-04-09 |
| TW548782B (en) | 2003-08-21 |
| CN1505841A (zh) | 2004-06-16 |
| NO20034843L (no) | 2004-01-02 |
| EP1388172A1 (en) | 2004-02-11 |
| US6486031B1 (en) | 2002-11-26 |
| US20020164856A1 (en) | 2002-11-07 |
| JP2004527128A (ja) | 2004-09-02 |
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