NL8902629A - Geintegreerde cmos-schakeling. - Google Patents

Geintegreerde cmos-schakeling. Download PDF

Info

Publication number
NL8902629A
NL8902629A NL8902629A NL8902629A NL8902629A NL 8902629 A NL8902629 A NL 8902629A NL 8902629 A NL8902629 A NL 8902629A NL 8902629 A NL8902629 A NL 8902629A NL 8902629 A NL8902629 A NL 8902629A
Authority
NL
Netherlands
Prior art keywords
transistors
row
channel
rows
channel transistors
Prior art date
Application number
NL8902629A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8902629A priority Critical patent/NL8902629A/nl
Priority to AT90202798T priority patent/ATE147543T1/de
Priority to EP90202798A priority patent/EP0425032B1/en
Priority to DE69029642T priority patent/DE69029642T2/de
Priority to UA4831588A priority patent/UA27693C2/uk
Priority to JP2284126A priority patent/JP3060235B2/ja
Priority to SU4831588/25A priority patent/RU2025829C1/ru
Priority to KR1019900016859A priority patent/KR0185976B1/ko
Publication of NL8902629A publication Critical patent/NL8902629A/nl
Priority to US07/804,468 priority patent/US5250823A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11803Masterslice integrated circuits using field effect technology
    • H01L27/11807CMOS gate arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Logic Circuits (AREA)
NL8902629A 1989-10-24 1989-10-24 Geintegreerde cmos-schakeling. NL8902629A (nl)

Priority Applications (9)

Application Number Priority Date Filing Date Title
NL8902629A NL8902629A (nl) 1989-10-24 1989-10-24 Geintegreerde cmos-schakeling.
AT90202798T ATE147543T1 (de) 1989-10-24 1990-10-19 Integrierte cmos-schaltung
EP90202798A EP0425032B1 (en) 1989-10-24 1990-10-19 Integrated CMOS circuit
DE69029642T DE69029642T2 (de) 1989-10-24 1990-10-19 Integrierte CMOS-Schaltung
UA4831588A UA27693C2 (uk) 1989-10-24 1990-10-22 Інтегральна схема на комплементарних моп-транзисторах
JP2284126A JP3060235B2 (ja) 1989-10-24 1990-10-22 Cmos集積回路
SU4831588/25A RU2025829C1 (ru) 1989-10-24 1990-10-22 Интегральная схема на комплементарных моп-транзисторах
KR1019900016859A KR0185976B1 (en) 1989-10-24 1990-10-22 Integrated cmos circuit
US07/804,468 US5250823A (en) 1989-10-24 1991-12-05 Integrated CMOS gate-array circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8902629A NL8902629A (nl) 1989-10-24 1989-10-24 Geintegreerde cmos-schakeling.
NL8902629 1989-10-24

Publications (1)

Publication Number Publication Date
NL8902629A true NL8902629A (nl) 1991-05-16

Family

ID=19855506

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8902629A NL8902629A (nl) 1989-10-24 1989-10-24 Geintegreerde cmos-schakeling.

Country Status (8)

Country Link
EP (1) EP0425032B1 (ja)
JP (1) JP3060235B2 (ja)
KR (1) KR0185976B1 (ja)
AT (1) ATE147543T1 (ja)
DE (1) DE69029642T2 (ja)
NL (1) NL8902629A (ja)
RU (1) RU2025829C1 (ja)
UA (1) UA27693C2 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5391943A (en) * 1994-01-10 1995-02-21 Mahant-Shetti; Shivaling S. Gate array cell with predefined connection patterns

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130140A (ja) * 1983-12-17 1985-07-11 Toshiba Corp 半導体集積回路装置
JPH0695570B2 (ja) * 1985-02-07 1994-11-24 三菱電機株式会社 半導体集積回路装置

Also Published As

Publication number Publication date
JP3060235B2 (ja) 2000-07-10
JPH03152970A (ja) 1991-06-28
RU2025829C1 (ru) 1994-12-30
DE69029642D1 (de) 1997-02-20
KR0185976B1 (en) 1999-04-15
EP0425032A1 (en) 1991-05-02
DE69029642T2 (de) 1997-07-10
KR910008818A (ko) 1991-05-31
UA27693C2 (uk) 2000-10-16
ATE147543T1 (de) 1997-01-15
EP0425032B1 (en) 1997-01-08

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Legal Events

Date Code Title Description
A1B A search report has been drawn up
BV The patent application has lapsed