NL7205270A - - Google Patents
Info
- Publication number
- NL7205270A NL7205270A NL7205270A NL7205270A NL7205270A NL 7205270 A NL7205270 A NL 7205270A NL 7205270 A NL7205270 A NL 7205270A NL 7205270 A NL7205270 A NL 7205270A NL 7205270 A NL7205270 A NL 7205270A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19712119059 DE2119059C3 (de) | 1971-04-20 | Speicher mit aus M OS-Feldeffekttransistoren aufgebauten Speicherzellen | |
| US00359573A US3848236A (en) | 1971-04-20 | 1973-05-11 | Threshold circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7205270A true NL7205270A (en:Method) | 1972-10-24 |
Family
ID=25760988
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7205270A NL7205270A (en:Method) | 1971-04-20 | 1972-04-19 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US3765002A (en:Method) |
| FR (1) | FR2133892B1 (en:Method) |
| GB (1) | GB1388601A (en:Method) |
| LU (1) | LU65183A1 (en:Method) |
| NL (1) | NL7205270A (en:Method) |
Families Citing this family (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3765002A (en) * | 1971-04-20 | 1973-10-09 | Siemens Ag | Accelerated bit-line discharge of a mosfet memory |
| FR2258783B1 (en:Method) * | 1974-01-25 | 1977-09-16 | Valentin Camille | |
| US3946368A (en) * | 1974-12-27 | 1976-03-23 | Intel Corporation | System for compensating voltage for a CCD sensing circuit |
| US3965460A (en) * | 1975-01-02 | 1976-06-22 | Motorola, Inc. | MOS speed-up circuit |
| US3932848A (en) * | 1975-01-20 | 1976-01-13 | Intel Corporation | Feedback circuit for allowing rapid charging and discharging of a sense node in a static memory |
| US4150308A (en) * | 1977-10-25 | 1979-04-17 | Motorola, Inc. | CMOS level shifter |
| DE2926514A1 (de) * | 1979-06-30 | 1981-01-15 | Ibm Deutschland | Elektrische speicheranordnung und verfahren zu ihrem betrieb |
| DE3072118D1 (en) | 1979-12-26 | 1988-09-22 | Toshiba Kk | A driver circuit for charge coupled device |
| US4291392A (en) * | 1980-02-06 | 1981-09-22 | Mostek Corporation | Timing of active pullup for dynamic semiconductor memory |
| JPS5837636B2 (ja) * | 1980-07-31 | 1983-08-17 | 富士通株式会社 | 半導体記憶装置 |
| JPS5841596B2 (ja) * | 1980-11-28 | 1983-09-13 | 富士通株式会社 | スタティック型半導体記憶装置 |
| JPH0831278B2 (ja) * | 1981-03-09 | 1996-03-27 | 富士通株式会社 | メモリ回路 |
| US4389705A (en) * | 1981-08-21 | 1983-06-21 | Mostek Corporation | Semiconductor memory circuit with depletion data transfer transistor |
| US4477885A (en) * | 1982-01-18 | 1984-10-16 | Fairchild Camera & Instrument Corporation | Current dump circuit for bipolar random access memories |
| JPS5916195A (ja) * | 1982-07-19 | 1984-01-27 | Toshiba Corp | 半導体記憶装置 |
| JPS59151400A (ja) * | 1983-02-17 | 1984-08-29 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPS6134619A (ja) * | 1984-07-26 | 1986-02-18 | Mitsubishi Electric Corp | Ｍｏｓトランジスタ回路 |
| US4675846A (en) * | 1984-12-17 | 1987-06-23 | International Business Machines Corporation | Random access memory |
| JP2504743B2 (ja) * | 1985-03-18 | 1996-06-05 | 日本電気株式会社 | 半導体記憶装置 |
| EP0257912A3 (en) * | 1986-08-29 | 1989-08-23 | Kabushiki Kaisha Toshiba | Static semiconductor memory device |
| NL8602450A (nl) * | 1986-09-29 | 1988-04-18 | Philips Nv | Geintegreerde geheugenschakeling met een enkelvoudige-schrijfbus circuit. |
| JP2621176B2 (ja) * | 1987-05-14 | 1997-06-18 | ソニー株式会社 | ワンチツプマイクロコンピユータ |
| JPH01140496A (ja) * | 1987-11-27 | 1989-06-01 | Nec Corp | 半導体記憶装置 |
| FR2659165A1 (fr) * | 1990-03-05 | 1991-09-06 | Sgs Thomson Microelectronics | Memoire ultra-rapide comportant un limiteur de la tension de drain des cellules. |
| JPH04238197A (ja) * | 1991-01-22 | 1992-08-26 | Nec Corp | センスアンプ回路 |
| US5412606A (en) * | 1994-03-29 | 1995-05-02 | At&T Corp. | Memory precharge technique |
| DE69517807T2 (de) * | 1995-07-28 | 2001-02-15 | Stmicroelectronics S.R.L., Agrate Brianza | Generatorschaltung zur Modulierung der Neigung eines Signals, insbesondere für Lesedatenverriegelungsschaltungen |
| EP0756379B1 (en) * | 1995-07-28 | 2003-09-24 | STMicroelectronics S.r.l. | Unbalanced latch and fuse circuit including the same |
| TW297126B (en) * | 1995-09-13 | 1997-02-01 | Siemens Ag | Arrangement of memory cells arranged in the form of a matrix |
| US6654301B2 (en) | 2001-09-27 | 2003-11-25 | Sun Microsystems, Inc. | Multiple discharge capable bit line |
| US7177212B2 (en) * | 2004-01-23 | 2007-02-13 | Agere Systems Inc. | Method and apparatus for reducing leakage current in a read only memory device using shortened precharge phase |
| US7480183B2 (en) * | 2006-07-05 | 2009-01-20 | Panasonic Corporation | Semiconductor memory device, and read method and read circuit for the same |
| US7808827B2 (en) * | 2007-11-06 | 2010-10-05 | Spansion Llc | Controlled bit line discharge for channel erases in nonvolatile memory |
| US9715345B2 (en) * | 2014-04-25 | 2017-07-25 | Micron Technology, Inc. | Apparatuses and methods for memory management |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3364362A (en) * | 1963-10-07 | 1968-01-16 | Bunker Ramo | Memory selection system |
| US3275996A (en) * | 1965-12-30 | 1966-09-27 | Rca Corp | Driver-sense circuit arrangement |
| US3467952A (en) * | 1966-02-09 | 1969-09-16 | Nippon Electric Co | Field effect transistor information storage circuit |
| US3765002A (en) * | 1971-04-20 | 1973-10-09 | Siemens Ag | Accelerated bit-line discharge of a mosfet memory |
-
1972
- 1972-03-24 US US00237654A patent/US3765002A/en not_active Expired - Lifetime
- 1972-04-17 GB GB1755272A patent/GB1388601A/en not_active Expired
- 1972-04-18 LU LU65183D patent/LU65183A1/xx unknown
- 1972-04-19 NL NL7205270A patent/NL7205270A/xx unknown
- 1972-04-19 FR FR7213772A patent/FR2133892B1/fr not_active Expired
-
1973
- 1973-05-11 US US00359573A patent/US3848236A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| FR2133892A1 (en:Method) | 1972-12-01 |
| DE2119059A1 (de) | 1972-10-26 |
| US3848236A (en) | 1974-11-12 |
| LU65183A1 (en:Method) | 1972-12-11 |
| DE2119059B2 (de) | 1976-09-23 |
| FR2133892B1 (en:Method) | 1976-10-29 |
| US3765002A (en) | 1973-10-09 |
| GB1388601A (en) | 1975-03-26 |