NL6616899A - - Google Patents

Info

Publication number
NL6616899A
NL6616899A NL6616899A NL6616899A NL6616899A NL 6616899 A NL6616899 A NL 6616899A NL 6616899 A NL6616899 A NL 6616899A NL 6616899 A NL6616899 A NL 6616899A NL 6616899 A NL6616899 A NL 6616899A
Authority
NL
Netherlands
Application number
NL6616899A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6616899A publication Critical patent/NL6616899A/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Architecture (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
NL6616899A 1965-12-01 1966-11-30 NL6616899A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US51076765A 1965-12-01 1965-12-01

Publications (1)

Publication Number Publication Date
NL6616899A true NL6616899A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1967-06-02

Family

ID=24032110

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6616899A NL6616899A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1965-12-01 1966-11-30

Country Status (5)

Country Link
US (1) US3654615A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE1538604B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR1502554A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB1132728A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
NL (1) NL6616899A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3827031A (en) * 1973-03-19 1974-07-30 Instr Inc Element select/replace apparatus for a vector computing system
DE2445368A1 (de) * 1974-09-23 1976-04-01 Siemens Ag Verfahren zur herstellung fuer maskenvorlagen fuer integrierte halbleiterschaltungen
US4495559A (en) * 1981-11-02 1985-01-22 International Business Machines Corporation Optimization of an organization of many discrete elements
US4613940A (en) * 1982-11-09 1986-09-23 International Microelectronic Products Method and structure for use in designing and building electronic systems in integrated circuits
JPS59154055A (ja) * 1983-02-22 1984-09-03 Hitachi Ltd 論理回路基板上の素子配置方法
US4630219A (en) * 1983-11-23 1986-12-16 International Business Machines Corporation Element placement method
US4615011A (en) * 1983-12-19 1986-09-30 Ibm Iterative method for establishing connections and resulting product
US4754408A (en) * 1985-11-21 1988-06-28 International Business Machines Corporation Progressive insertion placement of elements on an integrated circuit
JPH0793358B2 (ja) * 1986-11-10 1995-10-09 日本電気株式会社 ブロック配置処理方式
JPS63278249A (ja) * 1986-12-26 1988-11-15 Toshiba Corp 半導体集積回路装置の配線方法
JP2543155B2 (ja) * 1988-04-21 1996-10-16 松下電器産業株式会社 ブロック形状最適化方法
US5159682A (en) * 1988-10-28 1992-10-27 Matsushita Electric Industrial Co., Ltd. System for optimizing a physical organization of elements of an integrated circuit chip through the convergence of a redundancy function
JP3032224B2 (ja) * 1990-02-21 2000-04-10 株式会社東芝 半導体集積回路の論理セル配置方法
US5237514A (en) * 1990-12-21 1993-08-17 International Business Machines Corporation Minimizing path delay in a machine by compensation of timing through selective placement and partitioning
US5225991A (en) * 1991-04-11 1993-07-06 International Business Machines Corporation Optimized automated macro embedding for standard cell blocks
JP2601586B2 (ja) * 1991-10-15 1997-04-16 富士通株式会社 配置要素の配置配線方法
US5694328A (en) * 1992-08-06 1997-12-02 Matsushita Electronics Corporation Method for designing a large scale integrated (LSI) layout
US5513119A (en) * 1993-08-10 1996-04-30 Mitsubishi Semiconductor America, Inc. Hierarchical floorplanner for gate array design layout
US5535134A (en) * 1994-06-03 1996-07-09 International Business Machines Corporation Object placement aid
JP3504394B2 (ja) * 1995-09-08 2004-03-08 松下電器産業株式会社 部品配列のデータ作成方法
US5740067A (en) * 1995-10-19 1998-04-14 International Business Machines Corporation Method for clock skew cost calculation
US5745735A (en) * 1995-10-26 1998-04-28 International Business Machines Corporation Localized simulated annealing
US5844811A (en) * 1996-06-28 1998-12-01 Lsi Logic Corporation Advanced modular cell placement system with universal affinity driven discrete placement optimization
US6099583A (en) * 1998-04-08 2000-08-08 Xilinx, Inc. Core-based placement and annealing methods for programmable logic devices
JP3167980B2 (ja) * 1999-03-15 2001-05-21 インターナショナル・ビジネス・マシーンズ・コーポレ−ション コンポーネントの配置方法、コンポーネント配置装置、コンポーネント配置制御プログラムを格納した記憶媒体
AU2003207767A1 (en) * 2002-02-01 2003-09-02 California Institute Of Technology Hardware-assisted fast router
AU2003259919A1 (en) * 2002-08-21 2004-03-11 California Institute Of Technology Element placement method and apparatus
US7143381B2 (en) * 2002-12-31 2006-11-28 Intel Corporation Resonance reduction arrangements
US7119607B2 (en) 2002-12-31 2006-10-10 Intel Corporation Apparatus and method for resonance reduction
US7285487B2 (en) * 2003-07-24 2007-10-23 California Institute Of Technology Method and apparatus for network with multilayer metalization
US20070136699A1 (en) * 2005-12-08 2007-06-14 International Business Machines Corporation Dependency matrices and methods of using the same for testing or analyzing an integrated circuit
US20090138249A1 (en) * 2007-11-28 2009-05-28 International Business Machines Corporation Defining operational elements in a business process model
US9208277B1 (en) * 2011-08-19 2015-12-08 Cadence Design Systems, Inc. Automated adjustment of wire connections in computer-assisted design of circuits

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3126635A (en) * 1964-03-31 Line terminating system
US3369163A (en) * 1961-12-29 1968-02-13 Hughes Aircraft Co Straight line motor control for an x-y plotter
US3307154A (en) * 1962-10-11 1967-02-28 Compugraphic Corp Data processing apparatus for line justification in type composing machines
US3325786A (en) * 1964-06-02 1967-06-13 Rca Corp Machine for composing ideographs

Also Published As

Publication number Publication date
GB1132728A (en) 1968-11-06
DE1538604B2 (de) 1971-06-24
DE1538604A1 (de) 1969-10-09
FR1502554A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1968-02-07
US3654615A (en) 1972-04-04

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