NL194627C - Halfgeleidergeheugen met vooraf ingestelde gegevensfunctie. - Google Patents

Halfgeleidergeheugen met vooraf ingestelde gegevensfunctie. Download PDF

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Publication number
NL194627C
NL194627C NL9301365A NL9301365A NL194627C NL 194627 C NL194627 C NL 194627C NL 9301365 A NL9301365 A NL 9301365A NL 9301365 A NL9301365 A NL 9301365A NL 194627 C NL194627 C NL 194627C
Authority
NL
Netherlands
Prior art keywords
data
memory cell
signal
preset
capacitor
Prior art date
Application number
NL9301365A
Other languages
English (en)
Dutch (nl)
Other versions
NL9301365A (nl
NL194627B (nl
Inventor
Tetsuya Matsumura
Masahiko Yosjimoto
Keisuke Okada
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of NL9301365A publication Critical patent/NL9301365A/nl
Publication of NL194627B publication Critical patent/NL194627B/xx
Application granted granted Critical
Publication of NL194627C publication Critical patent/NL194627C/nl

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072Circuits for initialization, powering up or down, clearing memory or presetting

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
NL9301365A 1992-08-12 1993-08-05 Halfgeleidergeheugen met vooraf ingestelde gegevensfunctie. NL194627C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP21511992 1992-08-12
JP4215119A JP2676177B2 (ja) 1992-08-12 1992-08-12 半導体メモリ

Publications (3)

Publication Number Publication Date
NL9301365A NL9301365A (nl) 1994-03-01
NL194627B NL194627B (nl) 2002-05-01
NL194627C true NL194627C (nl) 2002-09-03

Family

ID=16667060

Family Applications (1)

Application Number Title Priority Date Filing Date
NL9301365A NL194627C (nl) 1992-08-12 1993-08-05 Halfgeleidergeheugen met vooraf ingestelde gegevensfunctie.

Country Status (4)

Country Link
US (1) US5377142A (de)
JP (1) JP2676177B2 (de)
DE (1) DE4325362C2 (de)
NL (1) NL194627C (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5781756A (en) * 1994-04-01 1998-07-14 Xilinx, Inc. Programmable logic device with partially configurable memory cells and a method for configuration
FR2731569B1 (fr) * 1995-03-07 1997-04-25 Thomson Tubes Electroniques Dispositif de recopie de tension a grande linearite
JPH09162304A (ja) * 1995-12-12 1997-06-20 Mitsubishi Electric Corp 半導体記憶装置
JPH11126491A (ja) * 1997-08-20 1999-05-11 Fujitsu Ltd 半導体記憶装置
US6256221B1 (en) 1998-01-30 2001-07-03 Silicon Aquarius, Inc. Arrays of two-transistor, one-capacitor dynamic random access memory cells with interdigitated bitlines
US5963468A (en) * 1998-01-30 1999-10-05 Silicon Aquarius, Inc. Low latency memories and systems using the same
US5963497A (en) * 1998-05-18 1999-10-05 Silicon Aquarius, Inc. Dynamic random access memory system with simultaneous access and refresh operations and methods for using the same
FR2784782B1 (fr) * 1998-10-16 2003-12-12 St Microelectronics Sa Architecture de memoire vive, morte et mixte
US6982897B2 (en) * 2003-10-07 2006-01-03 International Business Machines Corporation Nondestructive read, two-switch, single-charge-storage device RAM devices
DE10348675B3 (de) * 2003-10-15 2005-06-09 Infineon Technologies Ag Modul für eine bidirektionale optische Signalübertragung
DE10350168B4 (de) * 2003-10-28 2008-07-03 Qimonda Ag Speicheranordnung und Verfahren zum Betreiben einer solchen
GB2437989B (en) * 2006-05-09 2009-09-09 Micron Technology Inc Method, apparatus, and system for providing initial state random access memory
WO2011105310A1 (en) 2010-02-26 2011-09-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9443844B2 (en) 2011-05-10 2016-09-13 Semiconductor Energy Laboratory Co., Ltd. Gain cell semiconductor memory device and driving method thereof
JP6298657B2 (ja) * 2013-03-07 2018-03-20 株式会社半導体エネルギー研究所 半導体装置
JP6405100B2 (ja) * 2013-03-08 2018-10-17 株式会社半導体エネルギー研究所 半導体装置
WO2024035561A1 (en) * 2022-08-09 2024-02-15 Rambus Inc. Memory with interleaved preset

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5311335A (en) * 1976-05-26 1978-02-01 Litton Systems Inc Microwave cooking utensils
DE2633558C2 (de) * 1976-07-26 1978-08-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen Speicherbaustein
JPS587918B2 (ja) * 1980-07-11 1983-02-12 保田紙工株式会社 玩具花火用紙管への紙栓の取付け方法
JPH0713872B2 (ja) * 1987-11-24 1995-02-15 三菱電機株式会社 半導体記憶装置
US4970689A (en) * 1988-03-07 1990-11-13 International Business Machines Corporation Charge amplifying trench memory cell
JP2683919B2 (ja) * 1988-07-29 1997-12-03 三菱電機株式会社 半導体記憶装置
JPH0330184A (ja) * 1989-06-27 1991-02-08 Hitachi Ltd 半導体記憶装置
US5040143A (en) * 1990-05-22 1991-08-13 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
JPH04192175A (ja) * 1990-11-26 1992-07-10 Mitsubishi Electric Corp 画面表示装置

Also Published As

Publication number Publication date
DE4325362A1 (de) 1994-02-17
JPH0660641A (ja) 1994-03-04
NL9301365A (nl) 1994-03-01
DE4325362C2 (de) 1996-09-12
NL194627B (nl) 2002-05-01
JP2676177B2 (ja) 1997-11-12
US5377142A (en) 1994-12-27

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Legal Events

Date Code Title Description
A1A A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
ZD Corrections to earlier publications

Free format text: PAT. BUL. 11/2002, HEADING P, SECTION 2, PAGE 1596, INT. CL. G11C 11/407, PATENT NUMBER 194627: THELAST NAME OF THE INVENTOR "YOSJIMOTO" SHOULD BE MODIFIED INTO: YOSHIMOTO IN THE PAMPHLET OF PATENT NUMBER 194627, ISSUED 20021101: ON THE FRONT PAGE THE LAST NAME OF THE INVENTOR "YOSJIMOTO" SHOULD BE MODIFIED INTO: YOSHIMOTO

V1 Lapsed because of non-payment of the annual fee

Effective date: 20100301