NL1031939A1 - Werkwijze voor fotolithografie bij het vervaardigen van een halfgeleider. - Google Patents

Werkwijze voor fotolithografie bij het vervaardigen van een halfgeleider.

Info

Publication number
NL1031939A1
NL1031939A1 NL1031939A NL1031939A NL1031939A1 NL 1031939 A1 NL1031939 A1 NL 1031939A1 NL 1031939 A NL1031939 A NL 1031939A NL 1031939 A NL1031939 A NL 1031939A NL 1031939 A1 NL1031939 A1 NL 1031939A1
Authority
NL
Netherlands
Prior art keywords
photolithography
semiconductor
manufacture
Prior art date
Application number
NL1031939A
Other languages
English (en)
Other versions
NL1031939C2 (nl
Inventor
Chin-Hsiang Lin
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of NL1031939A1 publication Critical patent/NL1031939A1/nl
Application granted granted Critical
Publication of NL1031939C2 publication Critical patent/NL1031939C2/nl

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G03F7/405—Treatment with inorganic or organometallic reagents after imagewise removal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Weting (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Light Receiving Elements (AREA)
NL1031939A 2005-10-31 2006-06-01 Werkwijze voor fotolithografie bij het vervaardigen van een halfgeleider. NL1031939C2 (nl)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US73182805P 2005-10-31 2005-10-31
US73182805 2005-10-31
US11/347,513 US7220680B1 (en) 2005-10-31 2006-02-03 Method for photolithography in semiconductor manufacturing
US34751306 2006-02-03

Publications (2)

Publication Number Publication Date
NL1031939A1 true NL1031939A1 (nl) 2007-05-02
NL1031939C2 NL1031939C2 (nl) 2008-04-15

Family

ID=37996983

Family Applications (1)

Application Number Title Priority Date Filing Date
NL1031939A NL1031939C2 (nl) 2005-10-31 2006-06-01 Werkwijze voor fotolithografie bij het vervaardigen van een halfgeleider.

Country Status (6)

Country Link
US (1) US7220680B1 (nl)
JP (1) JP4562716B2 (nl)
KR (1) KR100833120B1 (nl)
CN (1) CN1959940B (nl)
NL (1) NL1031939C2 (nl)
TW (1) TWI298514B (nl)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080296562A1 (en) * 2007-05-31 2008-12-04 Murduck James M Methods and apparatus for fabricating carbon nanotubes and carbon nanotube devices
US8518818B2 (en) 2011-09-16 2013-08-27 Taiwan Semiconductor Manufacturing Co., Ltd. Reverse damascene process
CN106783120B (zh) * 2016-12-13 2018-03-27 深圳顺络电子股份有限公司 一种电子元件电极的制作方法及电子元件

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4774164A (en) * 1987-04-06 1988-09-27 Tegal Corporation Chrome mask etch
JPH04240729A (ja) * 1991-01-24 1992-08-28 Toshiba Corp パターン形成方法
US5370969A (en) * 1992-07-28 1994-12-06 Sharp Kabushiki Kaisha Trilayer lithographic process
JP3385708B2 (ja) * 1994-03-23 2003-03-10 住友電気工業株式会社 微細構造体の形成方法
JPH08293484A (ja) * 1995-04-20 1996-11-05 Matsushita Electron Corp プラズマ処理方法
US6445006B1 (en) * 1995-12-20 2002-09-03 Advanced Technology Materials, Inc. Microelectronic and microelectromechanical devices comprising carbon nanotube components, and methods of making same
EP0845288A1 (en) * 1996-11-27 1998-06-03 Thiopaq Sulfur Systems B.V. Process for biological removal of sulphide
JP3467372B2 (ja) * 1997-02-25 2003-11-17 松下電器産業株式会社 パターン形成方法及び半導体処理方法
KR20010037979A (ko) * 1999-10-21 2001-05-15 박종섭 반도체 소자의 제조방법
TW575786B (en) * 2000-03-14 2004-02-11 Takashi Nishi Exposure controlling photomask and production method thereof
US6750150B2 (en) * 2001-10-18 2004-06-15 Macronix International Co., Ltd. Method for reducing dimensions between patterns on a photoresist
US7008872B2 (en) * 2002-05-03 2006-03-07 Intel Corporation Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures
US6774051B2 (en) * 2002-06-12 2004-08-10 Macronix International Co., Ltd. Method for reducing pitch
US6924081B1 (en) * 2003-07-10 2005-08-02 Marc David Levenson Photosensitive material for immersion photolithography
US6905958B2 (en) * 2003-07-25 2005-06-14 Intel Corporation Protecting metal conductors with sacrificial organic monolayers
KR100681970B1 (ko) * 2005-06-08 2007-02-15 후지쯔 가부시끼가이샤 에칭 내성 막 및 그의 제조 방법, 표면 경화 레지스트 패턴및 그의 제조 방법, 및 반도체 장치 및 그의 제조 방법

Also Published As

Publication number Publication date
KR20070046703A (ko) 2007-05-03
TWI298514B (en) 2008-07-01
CN1959940A (zh) 2007-05-09
US7220680B1 (en) 2007-05-22
JP2007129217A (ja) 2007-05-24
JP4562716B2 (ja) 2010-10-13
TW200723362A (en) 2007-06-16
NL1031939C2 (nl) 2008-04-15
CN1959940B (zh) 2011-02-02
KR100833120B1 (ko) 2008-05-28
US20070099432A1 (en) 2007-05-03

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RD2N Patents in respect of which a decision has been taken or a report has been made (novelty report)

Effective date: 20080212

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