MY192268A - Lead frame and method for manufacturing the same - Google Patents
Lead frame and method for manufacturing the sameInfo
- Publication number
- MY192268A MY192268A MYPI2018700506A MYPI2018700506A MY192268A MY 192268 A MY192268 A MY 192268A MY PI2018700506 A MYPI2018700506 A MY PI2018700506A MY PI2018700506 A MYPI2018700506 A MY PI2018700506A MY 192268 A MY192268 A MY 192268A
- Authority
- MY
- Malaysia
- Prior art keywords
- dam bar
- leads
- site
- lead frame
- same
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000000463 material Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49544—Deformation absorbing parts in the lead frame plane, e.g. meanderline shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4828—Etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017021716A JP6798670B2 (ja) | 2017-02-08 | 2017-02-08 | リードフレーム及びその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MY192268A true MY192268A (en) | 2022-08-15 |
Family
ID=63037345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MYPI2018700506A MY192268A (en) | 2017-02-08 | 2018-02-08 | Lead frame and method for manufacturing the same |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US10304760B2 (enExample) |
| JP (1) | JP6798670B2 (enExample) |
| CN (1) | CN108417553B (enExample) |
| MY (1) | MY192268A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11545418B2 (en) * | 2018-10-24 | 2023-01-03 | Texas Instruments Incorporated | Thermal capacity control for relative temperature-based thermal shutdown |
| US11581195B2 (en) * | 2020-12-21 | 2023-02-14 | Alpha And Omega Semiconductor International Lp | Semiconductor package having wettable lead flank and method of making the same |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6700186B2 (en) * | 2000-12-21 | 2004-03-02 | Mitsui High-Tec, Inc. | Lead frame for a semiconductor device, a semiconductor device made from the lead frame, and a method of making a semiconductor device |
| KR20020093250A (ko) * | 2001-06-07 | 2002-12-16 | 삼성전자 주식회사 | 리드 노출형 리드 프레임 및 그를 이용한 리드 노출형반도체 패키지 |
| US7259460B1 (en) * | 2004-06-18 | 2007-08-21 | National Semiconductor Corporation | Wire bonding on thinned portions of a lead-frame configured for use in a micro-array integrated circuit package |
| US7968377B2 (en) * | 2005-09-22 | 2011-06-28 | Stats Chippac Ltd. | Integrated circuit protruding pad package system |
| JP5214911B2 (ja) * | 2006-12-27 | 2013-06-19 | 株式会社デンソー | モールドパッケージの製造方法 |
| JP2009088412A (ja) * | 2007-10-02 | 2009-04-23 | Renesas Technology Corp | 半導体装置の製造方法 |
| JP5899614B2 (ja) * | 2010-11-26 | 2016-04-06 | 大日本印刷株式会社 | リードフレームおよびリードフレームの製造方法 |
| JP6087153B2 (ja) * | 2013-01-10 | 2017-03-01 | 株式会社三井ハイテック | リードフレーム |
| JP6143468B2 (ja) * | 2013-01-11 | 2017-06-07 | 株式会社三井ハイテック | リードフレーム |
| KR101486790B1 (ko) * | 2013-05-02 | 2015-01-28 | 앰코 테크놀로지 코리아 주식회사 | 강성보강부를 갖는 마이크로 리드프레임 |
| JP6319644B2 (ja) * | 2013-10-01 | 2018-05-09 | 大日本印刷株式会社 | リードフレームおよびその製造方法、ならびに半導体装置の製造方法 |
| US9252063B2 (en) * | 2014-07-07 | 2016-02-02 | Infineon Technologies Ag | Extended contact area for leadframe strip testing |
| CN104659010B (zh) * | 2015-02-11 | 2018-03-16 | 江苏长电科技股份有限公司 | 一种四方扁平无引脚型态封装的引线框结构与封装体结构 |
| JP6603538B2 (ja) * | 2015-10-23 | 2019-11-06 | 新光電気工業株式会社 | リードフレーム及びその製造方法 |
-
2017
- 2017-02-08 JP JP2017021716A patent/JP6798670B2/ja not_active Expired - Fee Related
-
2018
- 2018-02-08 CN CN201810127202.0A patent/CN108417553B/zh active Active
- 2018-02-08 MY MYPI2018700506A patent/MY192268A/en unknown
- 2018-02-08 US US15/891,755 patent/US10304760B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US10304760B2 (en) | 2019-05-28 |
| CN108417553B (zh) | 2022-04-26 |
| CN108417553A (zh) | 2018-08-17 |
| US20180226327A1 (en) | 2018-08-09 |
| JP6798670B2 (ja) | 2020-12-09 |
| JP2018129405A (ja) | 2018-08-16 |
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