MX9701491A - Filtro en un sistema de recuperacion de tiempo. - Google Patents

Filtro en un sistema de recuperacion de tiempo.

Info

Publication number
MX9701491A
MX9701491A MX9701491A MX9701491A MX9701491A MX 9701491 A MX9701491 A MX 9701491A MX 9701491 A MX9701491 A MX 9701491A MX 9701491 A MX9701491 A MX 9701491A MX 9701491 A MX9701491 A MX 9701491A
Authority
MX
Mexico
Prior art keywords
signal
interpolator
transmitter
coupled
phase error
Prior art date
Application number
MX9701491A
Other languages
English (en)
Other versions
MXPA97001491A (es
Inventor
Paul Gothard Knutson
Kumar Ramaswamy
David Lowell Mcneely
Original Assignee
Thomson Consumer Electronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Consumer Electronics filed Critical Thomson Consumer Electronics
Publication of MX9701491A publication Critical patent/MX9701491A/es
Publication of MXPA97001491A publication Critical patent/MXPA97001491A/es

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41Structure of client; Structure of client peripherals
    • H04N21/426Internal components of the client ; Characteristics thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334Processing of samples having at least three levels, e.g. soft decisions
    • H04L7/0335Gardner detector
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multimedia (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Details Of Television Systems (AREA)
  • Color Television Systems (AREA)

Abstract

Un sistema de recuperacion de tiempo para un receptor de señales digitales, recibe una señal de un transmisor, representando símbolos sucesivos. Los símbolos se someten a la exhibicion de regímenes de símbolos multiples. El sistema deriva una señal que habilita muestras de la señal de entrada recibida y emplea un solo oscilador fijo de frecuencias. Una fuente (10) de muestras que representan la señal recibida, se prueban en una frecuencia fija. Un interpolador (12) se acopla a la fuente de muestras y se responde a una señal de control. El interpolador produce muestras tomadas en tiempos sincronizados con los símbolos sucesivos del transmisor. Un detector de error de fases (16) se acopla al interpolador, detecta un error de faces entre los tiempos de muestras de las muestras sincronizadas del transmisor producidas por el interpolador y toma el tiempo de los símbolos de transmisor sucesivos y suministra una señal de error de fases. La señal de error de fases se acopla a una terminal de entrada de una sumadora (32) y una fuente (31) de una señal de retraso nominal se acopla a la otra. Un retraso controlado numéricamente (34-36) produce la señal de control para el interpolador en respuesta a la señal de la sumadora. Una señal de salida del interpolador se filtra mediante un filtro de configuracion de pulsos no adaptable, fijo (14).
MXPA/A/1997/001491A 1996-02-27 1997-02-27 Filtro en un sistema de recuperacion de tiempo MXPA97001491A (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US1233996P 1996-02-27 1996-02-27
US60/012,339 1996-02-27
US72177996A 1996-09-25 1996-09-25
US08/721,779 1996-09-25

Publications (2)

Publication Number Publication Date
MX9701491A true MX9701491A (es) 1998-06-30
MXPA97001491A MXPA97001491A (es) 1998-10-30

Family

ID=

Also Published As

Publication number Publication date
JPH09247570A (ja) 1997-09-19
EP0793365A3 (en) 2004-01-07
ID16352A (id) 1997-09-25
SG64964A1 (en) 1999-05-25
BR9701069A (pt) 1998-06-30
EP0793365A2 (en) 1997-09-03

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