DE69431893D1 - Übertragungssystem mit Empfänger mit verbesserten Taktmitteln - Google Patents
Übertragungssystem mit Empfänger mit verbesserten TaktmittelnInfo
- Publication number
- DE69431893D1 DE69431893D1 DE69431893T DE69431893T DE69431893D1 DE 69431893 D1 DE69431893 D1 DE 69431893D1 DE 69431893 T DE69431893 T DE 69431893T DE 69431893 T DE69431893 T DE 69431893T DE 69431893 D1 DE69431893 D1 DE 69431893D1
- Authority
- DE
- Germany
- Prior art keywords
- receiver
- filter
- transmission system
- clock means
- cir
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B15/00—Suppression or limitation of noise or interference
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Circuits Of Receivers In General (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Electric Clocks (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP93201326 | 1993-05-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69431893D1 true DE69431893D1 (de) | 2003-01-30 |
DE69431893T2 DE69431893T2 (de) | 2003-09-11 |
Family
ID=8213820
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69431893T Expired - Fee Related DE69431893T2 (de) | 1993-05-07 | 1994-05-03 | Übertragungssystem mit Empfänger mit verbesserten Taktmitteln |
Country Status (5)
Country | Link |
---|---|
US (1) | US5570396A (de) |
JP (1) | JP3693301B2 (de) |
KR (1) | KR100337097B1 (de) |
AT (1) | ATE230180T1 (de) |
DE (1) | DE69431893T2 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2800951A1 (fr) * | 1999-11-10 | 2001-05-11 | Koninkl Philips Electronics Nv | Estimation de l'instant d'echantillonnage optimal dans un systeme de transmissions par paquets tdma |
US7289555B2 (en) * | 2003-02-05 | 2007-10-30 | Fujitsu Limited | Method and system for signal processing using vector output from scalar data |
US7324589B2 (en) * | 2003-02-05 | 2008-01-29 | Fujitsu Limited | Method and system for providing error compensation to a signal using feedback control |
US7830956B2 (en) * | 2003-02-05 | 2010-11-09 | Fujitsu Limited | Method and system for processing a sampled signal |
US20040202694A1 (en) * | 2003-04-11 | 2004-10-14 | Vascular Control Systems, Inc. | Embolic occlusion of uterine arteries |
KR20070114557A (ko) * | 2006-05-29 | 2007-12-04 | 삼성전자주식회사 | 퓨즈를 갖는 반도체 기억 소자 및 그 형성 방법 |
US7817757B2 (en) * | 2006-05-30 | 2010-10-19 | Fujitsu Limited | System and method for independently adjusting multiple offset compensations applied to a signal |
US7804894B2 (en) | 2006-05-30 | 2010-09-28 | Fujitsu Limited | System and method for the adjustment of compensation applied to a signal using filter patterns |
US7848470B2 (en) * | 2006-05-30 | 2010-12-07 | Fujitsu Limited | System and method for asymmetrically adjusting compensation applied to a signal |
US7764757B2 (en) * | 2006-05-30 | 2010-07-27 | Fujitsu Limited | System and method for the adjustment of offset compensation applied to a signal |
US7839958B2 (en) | 2006-05-30 | 2010-11-23 | Fujitsu Limited | System and method for the adjustment of compensation applied to a signal |
US7760798B2 (en) * | 2006-05-30 | 2010-07-20 | Fujitsu Limited | System and method for adjusting compensation applied to a signal |
US7804921B2 (en) | 2006-05-30 | 2010-09-28 | Fujitsu Limited | System and method for decoupling multiple control loops |
US7787534B2 (en) * | 2006-05-30 | 2010-08-31 | Fujitsu Limited | System and method for adjusting offset compensation applied to a signal |
US7801208B2 (en) * | 2006-05-30 | 2010-09-21 | Fujitsu Limited | System and method for adjusting compensation applied to a signal using filter patterns |
US7817712B2 (en) * | 2006-05-30 | 2010-10-19 | Fujitsu Limited | System and method for independently adjusting multiple compensations applied to a signal |
US7839955B2 (en) * | 2006-05-30 | 2010-11-23 | Fujitsu Limited | System and method for the non-linear adjustment of compensation applied to a signal |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3978407A (en) * | 1975-07-23 | 1976-08-31 | Codex Corporation | Fast start-up adaptive equalizer communication system using two data transmission rates |
FR2478914B1 (fr) * | 1980-03-19 | 1986-01-31 | Ibm France | Procede et dispositif pour l'ajustement initial de l'horloge d'un recepteur de donnees synchrone |
FR2571566B1 (fr) * | 1984-10-09 | 1987-01-23 | Labo Electronique Physique | Dispositif de reception de donnees numeriques comportant un dispositif de recuperation adaptative de rythme |
US4794341A (en) * | 1985-11-05 | 1988-12-27 | Signal Processors Limited | Digital filters and demodulators |
NL8800490A (nl) * | 1988-02-26 | 1989-09-18 | At & T & Philips Telecomm | Ontvanger van een stelsel voor het met gegeven baudsnelheid overdragen van datasymbolen. |
US4912729A (en) * | 1988-05-16 | 1990-03-27 | U.S. Philips Corporation | Phase-locked-loop circuit and bit detection arrangement comprising such a phase-locked-loop circuit |
NL9001576A (nl) * | 1990-07-11 | 1992-02-03 | Philips Nv | Ontvanger van een stelsel voor het met gegeven baudsnelheid overdragen van datasymbolen. |
US5309482A (en) * | 1992-03-30 | 1994-05-03 | Novatel Communications Ltd. | Receiver having an adjustable matched filter |
-
1994
- 1994-05-02 JP JP09355694A patent/JP3693301B2/ja not_active Expired - Fee Related
- 1994-05-03 DE DE69431893T patent/DE69431893T2/de not_active Expired - Fee Related
- 1994-05-03 AT AT94201229T patent/ATE230180T1/de not_active IP Right Cessation
- 1994-05-06 KR KR1019940009895A patent/KR100337097B1/ko not_active IP Right Cessation
- 1994-05-06 US US08/240,041 patent/US5570396A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69431893T2 (de) | 2003-09-11 |
JP3693301B2 (ja) | 2005-09-07 |
JPH06334567A (ja) | 1994-12-02 |
US5570396A (en) | 1996-10-29 |
ATE230180T1 (de) | 2003-01-15 |
KR100337097B1 (ko) | 2002-10-25 |
KR940027378A (ko) | 1994-12-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |