BR9701069A - Sistema de recepção de sinal para processar um sinal de entrada que representa símbolos sucessivos - Google Patents
Sistema de recepção de sinal para processar um sinal de entrada que representa símbolos sucessivosInfo
- Publication number
- BR9701069A BR9701069A BR9701069A BR9701069A BR9701069A BR 9701069 A BR9701069 A BR 9701069A BR 9701069 A BR9701069 A BR 9701069A BR 9701069 A BR9701069 A BR 9701069A BR 9701069 A BR9701069 A BR 9701069A
- Authority
- BR
- Brazil
- Prior art keywords
- receiving system
- successive symbols
- input signal
- representing successive
- signal receiving
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
- H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
- H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
- H04L7/0335—Gardner detector
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Details Of Television Systems (AREA)
- Color Television Systems (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US1233996P | 1996-02-27 | 1996-02-27 | |
US72177996A | 1996-09-25 | 1996-09-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
BR9701069A true BR9701069A (pt) | 1998-06-30 |
Family
ID=26683445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR9701069A BR9701069A (pt) | 1996-02-27 | 1997-02-25 | Sistema de recepção de sinal para processar um sinal de entrada que representa símbolos sucessivos |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0793365A3 (pt) |
JP (1) | JPH09247570A (pt) |
BR (1) | BR9701069A (pt) |
ID (1) | ID16352A (pt) |
SG (1) | SG64964A1 (pt) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI98584C (fi) * | 1995-05-05 | 1997-07-10 | Nokia Technology Gmbh | Menetelmä ja piirijärjestely vastaanotetun signaalin käsittelemiseksi |
US6493163B1 (en) * | 2000-03-03 | 2002-12-10 | Cirrus Logic, Inc. | Increased lock range PLL for constrained data |
GB0418133D0 (en) * | 2004-08-13 | 2004-09-15 | Ttp Communications Ltd | Sample acquisition timing adjustment |
GB2460417B (en) | 2008-05-28 | 2011-04-06 | Mirics Semiconductor Ltd | Broadcast receiver system |
GB2460418B (en) * | 2008-05-28 | 2010-04-14 | Mirics Semiconductor Ltd | Broadcast receiver system |
US8312346B2 (en) | 2009-05-01 | 2012-11-13 | Mirics Semiconductor Limited | Systems and methods for communications |
-
1997
- 1997-01-29 SG SG1997000192A patent/SG64964A1/en unknown
- 1997-02-20 EP EP97400376A patent/EP0793365A3/en not_active Withdrawn
- 1997-02-25 ID IDP970565A patent/ID16352A/id unknown
- 1997-02-25 BR BR9701069A patent/BR9701069A/pt not_active Application Discontinuation
- 1997-02-26 JP JP9057164A patent/JPH09247570A/ja not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
MX9701491A (es) | 1998-06-30 |
JPH09247570A (ja) | 1997-09-19 |
SG64964A1 (en) | 1999-05-25 |
ID16352A (id) | 1997-09-25 |
EP0793365A2 (en) | 1997-09-03 |
EP0793365A3 (en) | 2004-01-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FB34 | Technical and formal requirements: requirement - article 34 of industrial property law | ||
B07A | Technical examination (opinion): publication of technical examination (opinion) [chapter 7.1 patent gazette] | ||
B09B | Patent application refused [chapter 9.2 patent gazette] |
Free format text: INDEFERIDO COM BASE NO ART. 8O COMBINADO COM O ART. 13 DA LPI |
|
B09B | Patent application refused [chapter 9.2 patent gazette] |
Free format text: MANTIDO O INDEFERIMENTO UMA VEZ QUE NAO FOI APRESENTADO RECURSO DENTRO DO PRAZO LEGAL. |