MX337351B - Aparato y metodo para transmitir y recibir un codigo de comprobacion de paridad de baja densidad casi-ciclico en un sistema de comunicacion multimedia. - Google Patents
Aparato y metodo para transmitir y recibir un codigo de comprobacion de paridad de baja densidad casi-ciclico en un sistema de comunicacion multimedia.Info
- Publication number
- MX337351B MX337351B MX2015008533A MX2015008533A MX337351B MX 337351 B MX337351 B MX 337351B MX 2015008533 A MX2015008533 A MX 2015008533A MX 2015008533 A MX2015008533 A MX 2015008533A MX 337351 B MX337351 B MX 337351B
- Authority
- MX
- Mexico
- Prior art keywords
- parity check
- quasi
- check matrix
- transmitting
- communication system
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6544—IEEE 802.16 (WIMAX and broadband wireless access)
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1171—Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
Abstract
Se proporcionan un aparato y método para transmitir y recibir un código de Comprobación de Paridad de Baja Densidad (LDPC) casi-cíclico en un sistema de comunicación multimedia. En el método de transmisión de LDPC casi-cíclico, un aparato de transmisión de señal genera un código LDPC casi-cíclico, y transmite el código LDPC casi-cíclico a un aparato de recepciones señal, en donde el código LDPC casi cíclico es generado al codificar un vector de palabra de información que utiliza una matriz de comprobación de paridad hijo que se genera al realizar una de una operación de escalamiento, una operación de separación de fila y una operación de fusión de fila sobre una matriz de comprobación de paridad padre, y en donde la operación de escalamiento es una operación en la cual se determina un tamaño de la matriz de comprobación de paridad hijo, la operación de separación de fila es una operación en la cual se separa cada una de las filas incluidas en la matriz de comprobación de paridad padre, y la operación de fusión de fila es una operación en la cual se fusionan las filas incluidas en la matriz de comprobación de paridad padre.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20110117855 | 2011-11-11 | ||
| KR1020120111459A KR101922990B1 (ko) | 2011-11-11 | 2012-10-08 | 멀티미디어 통신 시스템에서 준순환 저밀도 패리티 검사 부호 송/수신 장치 및 방법 |
| PCT/KR2012/009466 WO2013070022A1 (en) | 2011-11-11 | 2012-11-09 | Apparatus and method for transmitting and receiving a quasi-cyclic low density parity check code in a multimedia communication system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MX337351B true MX337351B (es) | 2016-02-29 |
Family
ID=48662109
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2015008533A MX337351B (es) | 2011-11-11 | 2012-11-09 | Aparato y metodo para transmitir y recibir un codigo de comprobacion de paridad de baja densidad casi-ciclico en un sistema de comunicacion multimedia. |
| MX2014005472A MX2014005472A (es) | 2011-11-11 | 2012-11-09 | Aparato y metodo para transmitir y recibir un codigo de comprobacion de paridad de baja densidad casi-ciclico en un sistema de comunicacion multimedia. |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2014005472A MX2014005472A (es) | 2011-11-11 | 2012-11-09 | Aparato y metodo para transmitir y recibir un codigo de comprobacion de paridad de baja densidad casi-ciclico en un sistema de comunicacion multimedia. |
Country Status (8)
| Country | Link |
|---|---|
| US (3) | US8918697B2 (es) |
| EP (1) | EP2777164B1 (es) |
| JP (1) | JP6113179B2 (es) |
| KR (1) | KR101922990B1 (es) |
| CN (1) | CN103931105B (es) |
| CA (1) | CA2854738C (es) |
| MX (2) | MX337351B (es) |
| WO (1) | WO2013070022A1 (es) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2525497A1 (en) | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
| EP2552043A1 (en) * | 2011-07-25 | 2013-01-30 | Panasonic Corporation | Spatial multiplexing for bit-interleaved coding and modulation with quasi-cyclic LDPC codes |
| WO2017214851A1 (zh) * | 2016-06-14 | 2017-12-21 | 华为技术有限公司 | 一种信号传输的方法、发射端及接收端 |
| WO2018029616A1 (en) * | 2016-08-12 | 2018-02-15 | Telefonaktiebolaget Lm Ericsson (Publ) | Determining elements of base matrices for quasi-cyclic ldpc codes having variable code lengths |
| WO2018117651A1 (en) * | 2016-12-20 | 2018-06-28 | Samsung Electronics Co., Ltd. | Apparatus and method for channel encoding/decoding in communication or broadcasting system |
| CN109891755A (zh) * | 2017-01-06 | 2019-06-14 | Lg 电子株式会社 | 多lpdc 码中选择ldpc 基本码的方法及其设备 |
| KR102449782B1 (ko) * | 2018-05-04 | 2022-10-04 | 에스케이하이닉스 주식회사 | 준순환 저밀도 패리티 체크 코드의 패리티 체크 행렬 변환 회로, 이를 포함하는 에러 정정 회로 및 이의 동작 방법 |
| US10886944B2 (en) * | 2018-09-24 | 2021-01-05 | National Chiao Tung University | Low-density parity-check code scaling method |
| CN111064475A (zh) * | 2018-10-16 | 2020-04-24 | 华为技术有限公司 | 基于低密度奇偶校验码的译码方法及装置 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6633856B2 (en) * | 2001-06-15 | 2003-10-14 | Flarion Technologies, Inc. | Methods and apparatus for decoding LDPC codes |
| KR20040036460A (ko) * | 2002-10-26 | 2004-04-30 | 삼성전자주식회사 | Ｌｄｐｃ 복호화 장치 및 그 방법 |
| KR100809619B1 (ko) * | 2003-08-26 | 2008-03-05 | 삼성전자주식회사 | 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법 |
| US7127659B2 (en) * | 2004-08-02 | 2006-10-24 | Qualcomm Incorporated | Memory efficient LDPC decoding methods and apparatus |
| US7752520B2 (en) * | 2004-11-24 | 2010-07-06 | Intel Corporation | Apparatus and method capable of a unified quasi-cyclic low-density parity-check structure for variable code rates and sizes |
| US7900127B2 (en) * | 2005-01-10 | 2011-03-01 | Broadcom Corporation | LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices |
| JP4598085B2 (ja) * | 2006-01-10 | 2010-12-15 | 三菱電機株式会社 | 検査行列生成方法 |
| US7805652B1 (en) * | 2006-02-10 | 2010-09-28 | Marvell International Ltd. | Methods for generating and implementing quasi-cyclic irregular low-density parity check codes |
| US8086929B2 (en) * | 2006-11-17 | 2011-12-27 | Lg Electronics Inc. | Method of executing LDPC coding using parity check matrix |
| WO2008092040A2 (en) * | 2007-01-24 | 2008-07-31 | Qualcomm Incorporated | Ldpc encoding and decoding of packets of variable sizes |
| JP4858335B2 (ja) | 2007-07-10 | 2012-01-18 | ソニー株式会社 | 符号化方法および符号化装置 |
| WO2009104898A2 (en) | 2008-02-18 | 2009-08-27 | Samsung Electronics Co., Ltd. | Apparatus and method for encoding and decoding channel in a communication system using low-density parity-check codes |
| KR20090093778A (ko) * | 2008-02-29 | 2009-09-02 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 장치 및 방법 |
| US8341492B2 (en) * | 2008-07-28 | 2012-12-25 | Broadcom Corporation | Quasi-cyclic LDPC (low density parity check) code construction |
| CN101662290B (zh) * | 2008-08-26 | 2013-08-28 | 华为技术有限公司 | 生成准循环ldpc码及编码的方法与装置 |
| US8103931B2 (en) * | 2008-08-27 | 2012-01-24 | Mitsubishi Electric Research Laboratories, Inc. | Method for constructing large-girth quasi-cyclic low-density parity-check codes |
| CN101753149A (zh) * | 2008-12-10 | 2010-06-23 | 国家广播电影电视总局广播科学研究院 | 一种准循环低密度奇偶校验码的构造方法 |
| US8495450B2 (en) * | 2009-08-24 | 2013-07-23 | Samsung Electronics Co., Ltd. | System and method for structured LDPC code family with fixed code length and no puncturing |
| JP5442024B2 (ja) | 2009-11-17 | 2014-03-12 | 三菱電機株式会社 | 誤り訂正符号化方法および装置ならびにそれを用いた通信システム |
| US20110154168A1 (en) * | 2009-12-18 | 2011-06-23 | Electronics And Telecommunications Research Institute | Effective high-speed ldpc encoding method and apparatus using the same |
| US8656244B1 (en) * | 2010-10-29 | 2014-02-18 | Massachusetts Institute Of Technology | Rate adaptive nonbinary LDPC codes with low encoding complexity |
-
2012
- 2012-10-08 KR KR1020120111459A patent/KR101922990B1/ko active IP Right Grant
- 2012-11-09 JP JP2014540953A patent/JP6113179B2/ja active Active
- 2012-11-09 EP EP12848353.4A patent/EP2777164B1/en active Active
- 2012-11-09 MX MX2015008533A patent/MX337351B/es unknown
- 2012-11-09 CA CA2854738A patent/CA2854738C/en active Active
- 2012-11-09 WO PCT/KR2012/009466 patent/WO2013070022A1/en active Application Filing
- 2012-11-09 CN CN201280055114.5A patent/CN103931105B/zh active Active
- 2012-11-09 MX MX2014005472A patent/MX2014005472A/es active IP Right Grant
- 2012-11-12 US US13/674,651 patent/US8918697B2/en active Active
-
2014
- 2014-12-22 US US14/579,146 patent/US9059741B2/en active Active
-
2015
- 2015-06-15 US US14/739,825 patent/US9800267B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2014535240A (ja) | 2014-12-25 |
| WO2013070022A9 (en) | 2014-04-17 |
| JP6113179B2 (ja) | 2017-04-12 |
| WO2013070022A1 (en) | 2013-05-16 |
| KR20130052506A (ko) | 2013-05-22 |
| CA2854738A1 (en) | 2013-05-16 |
| US20150280743A1 (en) | 2015-10-01 |
| US9800267B2 (en) | 2017-10-24 |
| EP2777164A1 (en) | 2014-09-17 |
| US9059741B2 (en) | 2015-06-16 |
| US8918697B2 (en) | 2014-12-23 |
| US20150113361A1 (en) | 2015-04-23 |
| EP2777164A4 (en) | 2015-07-29 |
| MX2014005472A (es) | 2014-08-08 |
| KR101922990B1 (ko) | 2018-11-28 |
| CA2854738C (en) | 2020-01-21 |
| CN103931105A (zh) | 2014-07-16 |
| CN103931105B (zh) | 2017-09-08 |
| US20130124938A1 (en) | 2013-05-16 |
| EP2777164B1 (en) | 2018-10-17 |
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