MX2019009820A - Metodo para realizar la codificacion sobre la base de la matriz de verificacion de paridad del codigo de verificacion de paridad de baja densidad (ldpc) en el sistema de comunicacion inalambrico y terminal que usa el mismo. - Google Patents
Metodo para realizar la codificacion sobre la base de la matriz de verificacion de paridad del codigo de verificacion de paridad de baja densidad (ldpc) en el sistema de comunicacion inalambrico y terminal que usa el mismo.Info
- Publication number
- MX2019009820A MX2019009820A MX2019009820A MX2019009820A MX2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A
- Authority
- MX
- Mexico
- Prior art keywords
- parity check
- matrix
- terminal
- performing encoding
- check matrix
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
- H04L1/0042—Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computational Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
Abstract
Un método para realizar la codificación sobre la base de una matriz de verificación de paridad de un código de verificación de paridad de baja densidad de acuerdo con la presente modalidad, que comprende las etapas de: generar una matriz de verificación de paridad por medio de una terminal, en donde la matriz de verificación de paridad corresponde a una matriz característica, cada componente de la matriz característica corresponde a un valor de índice de desplazamiento determinado a través de una operación de módulo entre un componente correspondiente en una matriz básica y Zc, que es un valor de elevación, y la matriz básica es una matriz de 42 x 52; y realizar la codificación de datos de entrada, por medio de la terminal, usando la matriz de verificación de paridad, en donde el valor de elevación está asociado con la longitud de los datos de entrada.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201762479253P | 2017-03-30 | 2017-03-30 | |
US201762479420P | 2017-03-31 | 2017-03-31 | |
US201762525219P | 2017-06-27 | 2017-06-27 | |
PCT/KR2018/003798 WO2018182369A1 (ko) | 2017-03-30 | 2018-03-30 | 무선 통신 시스템에서 ldpc 부호의 패리티 검사 행렬을 기반으로 부호화를 수행하는 방법 및 이를 이용한 단말 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2019009820A true MX2019009820A (es) | 2019-11-28 |
Family
ID=63676697
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2019009820A MX2019009820A (es) | 2017-03-30 | 2018-03-30 | Metodo para realizar la codificacion sobre la base de la matriz de verificacion de paridad del codigo de verificacion de paridad de baja densidad (ldpc) en el sistema de comunicacion inalambrico y terminal que usa el mismo. |
Country Status (14)
Country | Link |
---|---|
US (2) | US11211951B2 (es) |
EP (1) | EP3605894A4 (es) |
JP (1) | JP6974493B2 (es) |
KR (1) | KR102065427B1 (es) |
CN (1) | CN110402554B (es) |
AU (1) | AU2018246848B2 (es) |
BR (1) | BR112019019253B1 (es) |
CA (1) | CA3057817C (es) |
CL (1) | CL2019002497A1 (es) |
MX (1) | MX2019009820A (es) |
PH (1) | PH12019502212A1 (es) |
RU (1) | RU2719688C1 (es) |
SG (1) | SG11201907654TA (es) |
WO (1) | WO2018182369A1 (es) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2018182369A1 (ko) * | 2017-03-30 | 2018-10-04 | 엘지전자 주식회사 | 무선 통신 시스템에서 ldpc 부호의 패리티 검사 행렬을 기반으로 부호화를 수행하는 방법 및 이를 이용한 단말 |
CN109314527B (zh) * | 2017-05-05 | 2021-10-26 | 联发科技股份有限公司 | Qc-ldpc编码方法、装置及非暂时性计算机可读介质 |
WO2019017749A1 (en) * | 2017-07-21 | 2019-01-24 | Samsung Electronics Co., Ltd. | APPARATUS AND METHOD FOR CHANNEL ENCODING AND DECODING IN A COMMUNICATION OR BROADCASTING SYSTEM |
CN109391367B (zh) * | 2017-08-11 | 2022-12-30 | 华为技术有限公司 | 通信方法和装置 |
CN111066251B (zh) | 2017-08-18 | 2024-09-06 | 上海诺基亚贝尔股份有限公司 | 用于nr的ldpc基础图的使用 |
TWI757609B (zh) * | 2018-08-03 | 2022-03-11 | 日商索尼股份有限公司 | 用於通訊的傳輸設備和方法、接收設備和方法 |
US11581907B2 (en) * | 2020-12-18 | 2023-02-14 | Sr Technologies, Inc. | System and method for reception of wireless local area network packets with bit errors |
WO2024130465A1 (zh) * | 2022-12-19 | 2024-06-27 | 华为技术有限公司 | 数据传输的方法和装置 |
WO2024152363A1 (zh) * | 2023-01-20 | 2024-07-25 | 华为技术有限公司 | 一种基于ldpc码的通信方法和通信装置 |
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EP1983651B1 (en) * | 2002-07-30 | 2014-11-05 | IPR Licensing, Inc. | Device for multiple-input multiple output (MIMO) radio communication |
US7334181B2 (en) * | 2003-09-04 | 2008-02-19 | The Directv Group, Inc. | Method and system for providing short block length low density parity check (LDPC) codes |
KR100922956B1 (ko) | 2003-10-14 | 2009-10-22 | 삼성전자주식회사 | 저밀도 패리티 검사 코드의 부호화 방법 |
US7581157B2 (en) * | 2004-06-24 | 2009-08-25 | Lg Electronics Inc. | Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system |
KR101042747B1 (ko) | 2005-06-21 | 2011-06-20 | 삼성전자주식회사 | 구조적 저밀도 패리티 검사 부호를 사용하는 통신시스템에서 데이터 송수신 장치 및 방법 |
KR101119111B1 (ko) | 2006-05-04 | 2012-03-16 | 엘지전자 주식회사 | Ldpc 부호를 이용한 데이터 재전송 방법 |
KR101128804B1 (ko) * | 2006-06-07 | 2012-03-23 | 엘지전자 주식회사 | 참조 행렬을 이용한 lpdc 부호화 및 복호화 방법 |
KR101191196B1 (ko) | 2006-06-07 | 2012-10-15 | 엘지전자 주식회사 | 패리티 검사 행렬을 이용하여 부호화 및 복호화하는 방법 |
CN100423454C (zh) * | 2006-06-14 | 2008-10-01 | 北京新岸线移动多媒体技术有限公司 | 一类低密度奇偶校验码的实现方法 |
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KR20090093778A (ko) * | 2008-02-29 | 2009-09-02 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 장치 및 방법 |
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JP2010114862A (ja) | 2008-10-10 | 2010-05-20 | Panasonic Corp | 符号化器、送信装置及び符号化方法 |
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WO2018182369A1 (ko) * | 2017-03-30 | 2018-10-04 | 엘지전자 주식회사 | 무선 통신 시스템에서 ldpc 부호의 패리티 검사 행렬을 기반으로 부호화를 수행하는 방법 및 이를 이용한 단말 |
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2018
- 2018-03-30 WO PCT/KR2018/003798 patent/WO2018182369A1/ko active Application Filing
- 2018-03-30 KR KR1020187037608A patent/KR102065427B1/ko active IP Right Grant
- 2018-03-30 SG SG11201907654TA patent/SG11201907654TA/en unknown
- 2018-03-30 AU AU2018246848A patent/AU2018246848B2/en active Active
- 2018-03-30 BR BR112019019253-0A patent/BR112019019253B1/pt active IP Right Grant
- 2018-03-30 RU RU2019129807A patent/RU2719688C1/ru active
- 2018-03-30 EP EP18774897.5A patent/EP3605894A4/en active Pending
- 2018-03-30 JP JP2019552942A patent/JP6974493B2/ja active Active
- 2018-03-30 US US16/065,759 patent/US11211951B2/en active Active
- 2018-03-30 CN CN201880016060.9A patent/CN110402554B/zh active Active
- 2018-03-30 MX MX2019009820A patent/MX2019009820A/es unknown
- 2018-03-30 CA CA3057817A patent/CA3057817C/en active Active
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2019
- 2019-01-14 US US16/247,090 patent/US10484132B2/en active Active
- 2019-08-30 CL CL2019002497A patent/CL2019002497A1/es unknown
- 2019-09-25 PH PH12019502212A patent/PH12019502212A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
RU2719688C1 (ru) | 2020-04-21 |
CN110402554A (zh) | 2019-11-01 |
KR102065427B1 (ko) | 2020-01-13 |
AU2018246848B2 (en) | 2020-08-13 |
US10484132B2 (en) | 2019-11-19 |
JP2020517140A (ja) | 2020-06-11 |
BR112019019253A2 (pt) | 2019-12-17 |
KR20190006568A (ko) | 2019-01-18 |
US20190268092A1 (en) | 2019-08-29 |
EP3605894A4 (en) | 2020-11-25 |
PH12019502212A1 (en) | 2020-12-07 |
CA3057817C (en) | 2022-06-14 |
CA3057817A1 (en) | 2018-10-04 |
WO2018182369A1 (ko) | 2018-10-04 |
JP6974493B2 (ja) | 2021-12-01 |
CL2019002497A1 (es) | 2019-12-20 |
US20210203356A1 (en) | 2021-07-01 |
EP3605894A1 (en) | 2020-02-05 |
CN110402554B (zh) | 2022-02-22 |
US11211951B2 (en) | 2021-12-28 |
BR112019019253B1 (pt) | 2020-11-10 |
SG11201907654TA (en) | 2019-09-27 |
AU2018246848A1 (en) | 2019-09-26 |
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